Type Package
TLE 4269 G PG-DSO-8-16
TLE 4269 GM PG-DSO-14-30
TLE 4269 GL PG-DSO-20-35
5-V Low Drop Fixed Voltage Regulator
TLE 4269
^
P-DSO-8-3, -6, -7, -8, -9
P-DSO-14-3, -8, -9, -11, 14
P/PG-DSO-20-1,-6,-7,-9,-14,
-
Data Sheet 1 Rev. 2.4, 2007-03-20
Features
• Output voltage tolerance ≤ ±2%
• 150 mA current capability
• Very low current consumption
• Early warning
• Reset output low down to VQ = 1 V
• Overtemperature protection
• Reverse polarity proof
• Adjustable reset threshold
• Very low drop voltage
• Wide temperature range
• Integrated pull-up resistor at logic outputs
• Green Product (RoHS compliant)
• AEC Qualified
Functional Description
This device an automotive suited voltage regulator with a
fixed 5-V output. The maximum operating voltage is
45 V. The output is able to drive 150 mA load. It is short
circuit protected and the thermal shutdown switches the
output off if the junction temperature is in excess of
150 °C. A reset signal is generated for an output voltage
of VQ< 4.65 V. The reset threshold voltage can be
decreased by external connection of a voltage divider.
The reset delay time can be set by an external capacitor.
Reset and sense output have integrated pull-up
resistors. If the integrated resistors are not desired TLE 4279 can be used. It is also
possible to supervise the input voltage by using an integrated comparator to give a low
voltage warning.
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Data Sheet 2 Rev. 2.4, 2007-03-20
TLE 4269
Figure 1 Pin Configuration (top view)
Table 1 Pin Definitions and Functions (TLE 4269 G)
Pin No. Symbol Function
1I Input; block to GND directly at the IC with a ceramic capacitor.
2SISense Input; if not needed connect to Q.
3RADJReset Threshold Adjust; if not needed connect to GND.
4DReset Delay; to select delay time, connect to GND via capacitor.
5GNDGround
6ROReset Output; the open-collector output is internally linked to Q
via a 20 kΩ pull-up resistor. Keep open, if not needed.
7SOSense Output; the open-collector output is internally linked to
the output via a 20 kΩ pull-up resistor. Keep open, if not needed.
8Q5-V Output; connect to GND with a 10 µF capacitor,
ESR < 10 Ω.
GND
RO
SO
D5
6
7
RADJ
8
4
3
2
1
AEP01668
Q
ΙS
Ι
PG-DSO-8-16
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TLE 4269
Data Sheet 3 Rev. 2.4, 2007-03-20
Figure 2 Pin Configuration (top view)
Table 2 Pin Definitions and Functions (TLE 4269 GM)
Pin No. Symbol Function
1RADJReset Threshold Adjust; if not needed connect to GND.
2DReset Delay; to select delay time; connect to GND via capacitor.
3, 4, 5, 6 GND Ground
7ROReset Output; open-collector output, internally connected to Q
via a pull-up resistor of 20 kΩ. Keep open, if not needed.
8SOSense Output; open-collector output, internally connected to Q
via a 20 kΩ pull-up resistor. Keep open, if not needed.
9Q5-V Output; connect to GND with a 10 µF capacitor,
ESR < 10 Ω.
10, 11, 12 GND Ground
13 I Input; block to GND directly at the IC with a ceramic capacitor.
14 SI Sense Input; if not needed connect to Q.
AEP02248
Q
GND
SI
GND
RO
GND
Ι
10
9
GND GND
1
2
3
4
5
GND
6
7SO
14
13
12
11
D
GND
8
RADJ
PG-DSO-14-30
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Data Sheet 4 Rev. 2.4, 2007-03-20
TLE 4269
Figure 3 Pin Configuration (top view)
Table 3 Pin Definitions and Functions (TLE 4269 GL)
Pin No. Symbol Function
1RADJReset Threshold Adjust; if not needed connect to ground.
2DReset Delay; to select delay time, connect to GND via external
capacitor.
4 - 7,
14 - 17
GND Ground
10 RO Reset Output; the open-collector output is internally linked to Q
via a 20 kΩ pull-up resistor. Keep open, if not needed.
11 SO Sense Output; the open-collector output is internally linked to the
output via a 20 kΩ pull-up resistor. Keep open, if not needed.
12 Q Output; connect to GND with a 10 µF capacitor, ESR < 10 Ω.
19 I Input; block directly at the IC by a ceramic capacitor.
20 SI Sense Input; if not needed connect to Q.
N.C.
12
11
N.C.
N.C.
GND
1
2
3
4
20
5
19
6
18
7
N.C.
17
8
Q
16
9
15
10
14
13
RADJ
D
GND
Ι
AEP01802
N.C.
GND
GND
RO
S
GND
SO
GND
GND
GND
Ι
PG-DSO-20-35
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TLE 4269
Data Sheet 5 Rev. 2.4, 2007-03-20
Circuit Description
The control amplifier compares a reference voltage, made highly accurate by resistance
balancing, with a voltage proportional to the output voltage and drives the base of the
series PNP transistor via a buffer. Saturation control as a function of the load current
prevents any over-saturation of the power element.
The reset output RO is in high-state if the voltage on the delay capacitor CD is greater or
equal VUD. The delay capacitor CD is charged with the current ID for output voltages
greater than the reset threshold VRT. If the output voltage gets lower than VRT (‘reset
condition’) a fast discharge of the delay capacitor CD sets in and as soon as VD gets
lower than VLD the reset output RO is set to low-level.
The time gap for the delay capacitor discharge is the reset reaction time tRR.
The reset threshold VRT can be decreased via an external voltage divider connected to
the pin RADJ. In this case the reset condition is reached if VQ<VRT and
VRADJ <VRAQDJ, TH. Dimensioning the voltage divider (Figure 5) according to:
VTHRES = VRADJ,TH × (RADJ1 + RADJ2) / RADJ2,(1)
the reset threshold can be decreased down to 3.5 V. If the reset-adjust-option is not
needed the RADJ-pin should be connected to GND causing the reset threshold to go to
its default value (typ. 4.65 V).
A built in comparator compares the signal of the pin SI, normally fed by a voltage divider
from the input voltage, with the reference and gives an early warning on the pin SO. It is
also possible to superwise another voltage e.g. of a second regulator, or to build a
watchdog circuit with few external components.
Application Description
The input capacitor CI is necessary for compensating line influences. Using a resistor of
approx. 1 Ω in series with CI, the oscillating circuit consisting of input inductivity and input
capacitance can be damped. The output capacitor CQ is necessary for the stability of the
regulating circuit. Stability is guaranteed at values ≥ 10 µF and an ESR ≤ 10 Ω within the
operating temperature range. For small tolerances of the reset delay the spread of the
capacitance of the delay capacitor and its temperature coefficient should be noted.
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Data Sheet 6 Rev. 2.4, 2007-03-20
TLE 4269
Figure 4 Block Diagram
AEB01669
Control
Saturation
Current and
Reference
Trimming
20 kΩΩk20
Amplifier
Error
Reference
Ι
D
RADJ
SI
Q
RO
SO
&
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TLE 4269
Data Sheet 7 Rev. 2.4, 2007-03-20
Table 4 Absolute Maximum Ratings
Tj = -40 to 150 °C
Parameter Symbol Limit Values Unit Notes
Min. Max.
Input
Input voltage VI-40 45 V –
Input current II– – – internal limited
Sense Input
Input voltage VSI -40 45 V –
Input current ISI 11mA–
Reset Threshold
Voltage VRADJ -0.3 7 V –
Current IRADJ -10 10 mA –
Reset Delay
Voltage VD-0.3 7 V –
Current ID– – – internal limited
Ground
Current IGND 50 – mA –
Reset Output
Voltage VR-0.3 7 V –
Current IR– – – internal limited
Sense Output
Voltage VSO -0.3 7 V –
Current ISO – – – internal limited
5-V Output
Output voltage VQ-0.5 7 V –
Output current IQ-10 – mA –
Temperature
Junction temperature Tj–150°C–
Storage temperature TStg -50 150 °C–
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Data Sheet 8 Rev. 2.4, 2007-03-20
TLE 4269
Operating Range
Input voltage VI–45V –
Junction temperature Tj-40 150 °C–
Thermal Data
Junction-ambient Rthja –
–
–
200
70
70
K/W
K/W
K/W
PG-DSO-8-16
PG-DSO-14-30
PG-DSO-20-35
Junction-pin Rthjp –
–
30
30
K/W
K/W
PG-DSO-14-301)
PG-DSO-20-351)
1) Measured to Pin 4
Table 5 Characteristics
VI = 13.5 V; Tj = -40 °C < Tj < 125 °C
Parameter Symbol Limit Values Unit Measuring
Condition
Min. Typ. Max.
Output voltage VQ4.90 5.00 5.10 V 1 mA ≤ IQ ≤ 100 mA,
6 V ≤ VI ≤ 16 V
Current limit IQ150 200 500 mA –
Current consumption;
Iq = II - IQ
Iq– 240 300 µAIQ ≤ 1 mA, Tj < 85 °C
Current consumption;
Iq = II - IQ
Iq– 250 700 µAIQ = 10 mA
Current consumption;
Iq = II - IQ
Iq–2 8 mAIQ = 50 mA
Drop voltage Vdr –0.250.5VIQ = 100 mA1)
Load regulation ∆VQ–1030mVIQ = 5 mA to 100 mA
Line regulation ∆VQ–1040mVVI = 6 V to 26 V,
IQ = 1 mA
Table 4 Absolute Maximum Ratings (cont’d)
Tj = -40 to 150 °C
Parameter Symbol Limit Values Unit Notes
Min. Max.
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TLE 4269
Data Sheet 9 Rev. 2.4, 2007-03-20
Reset Generator
Switching threshold VRT 4.50 4.65 4.80 V –
Reset adjust switching
threshold
VRADJ, TH 1.26 1.35 1.44 V VQ > 3.5 V
Reset pull-up – 10 20 40 kΩ–
Saturation voltage VRO, SAT –0.10.4VRintern
Upper delay switching
threshold
VUD 1.4 1.8 2.2 V –
Lower delay switching
threshold
VLD 0.3 0.45 0.60 V –
Saturation voltage delay
capacitor
VD, SAT –– 0.1VVQ < VRT
Charge current ID3.0 6.5 9.5 µAVD = 1 V
Delay time L → H td17 28 – ms CD = 100 nF
Delay time H → L tt–1 – µsCD = 100 nF
Input Voltage Sense
Sense threshold high VSI, high 1.24 1.31 1.38 V –
Sense threshold low VSI, low 1.16 1.20 1.28 V –
Sense output low
voltage
VSO, low –0.10.4VVSI < 1.20 V; VQ > 3 V,
Rintern
Sense pull-up – 10 20 40 kΩ–
Sense input current ISI -10.11 µA–
1) Drop voltage = VI - VQ measured when the output voltage has dropped 100 mV from the nominal value
obtained at 13.5 V input.
Table 5 Characteristics (cont’d)
VI = 13.5 V; Tj = -40 °C < Tj < 125 °C
Parameter Symbol Limit Values Unit Measuring
Condition
Min. Typ. Max.
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Data Sheet 10 Rev. 2.4, 2007-03-20
TLE 4269
Figure 5 Measuring Circuit
Figure 6 Reset Timing Diagram
AES01670
1000 Fµ
V
ΙQ
V
Ι
Ι
Ι
D
Ι
GND
Ι
Q
C
D
100 nF
Ι
RADJ
22 Fµ
470 nF
SO
V
TLE 4269
Ι
SI RADJ
Q
C
Ι
V
SΙ
V
R
V
RADJ
D GND R SO
Ι
D
V
ΙS
Q
C
RADJ1
RADJ2
AED01542
Thermal
t
d
Power-on-Reset Voltage Dip Secondary Overload
at OutputSpike
t
V
LD
V
RO, SAT
RT
V
t
RR
<
RR
t
at Input Undervoltage
Shutdown
V
V
RO
D
V
t
t
t
t
Q
V
V
I
V
UD
d
d
I
C
D
D
=
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Data Sheet 11 Rev. 2.4, 2007-03-20
TLE 4269
Figure 7 Sense Timing Diagram
AED03049
t
Sense
t
SI, High
V
SI, Low
V
Input
Voltage
High
Low
Output
Sense
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Data Sheet 12 Rev. 2.4, 2007-03-20
TLE 4269
Charge Current ID versus
Temperature Tj
Drop Voltage Vdr versus
Output Current IQ
Switching Voltage VUD and VLD versus
Temperature Tj
Reset Adjust Switching Threshold
VRADJ,TH versus Temperature Tj
AED01803
-40
Ι
D
04080120 C 160
0
Ι
V= 13.5 V
2
4
6
8
10
12
14
16
Aµ
1.0 V=VC
j
T
AED01805
0
V
dr
mV
0
=25C
Ι
Q
30 60 90 120 180mA
C125=
100
200
300
400
500
j
T
j
T
AED01804
-40
V
04080120 C 160
0
Ι
V= 13.5 V
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
V
V
LD
UD
V
D
j
T
AED01806
-40
V
RADJ, TH
04080120 C 160
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
V
j
T
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Data Sheet 13 Rev. 2.4, 2007-03-20
TLE 4269
Current Consumption IQ versus
Input Voltage VI
Sense Threshold VSI versus
Temperature Tj
Output Voltage VQ versus
Input Voltage VI
Output Voltage VQ versus
Temperature Tj
AED01807
0
Ι
q
mA
10 20 30 40 V50
0
5
10
15
20
25
30
Ι
V
RL=50
Ω
Ω
33=
L
R
Ω
100=
L
R
RL= 200
Ω
AED01809
-40 04080120 C 160
1.0
Ι
V= 13.5 V
V
SI
1.1
1.2
1.3
1.4
1.5
1.6
V
Sense Output High
Sense Output Low
j
T
AED01808
0
V
Q
V
2468V10
0
2
4
6
8
10
12
Ι
V
R
L
=50
Ω
AED01671
-40
VQ
V
04080
120 C 160
4.6
4.7
4.8
4.9
5.0
5.1
Ι
V= 13.5 V
5.2
j
T
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Data Sheet 14 Rev. 2.4, 2007-03-20
TLE 4269
Output Current IQ versus
Input Voltage VI
Current Consumption Iq versus
Output Current IQ
Current Consumption Iq versus
Output Current IQ
AED01810
0
Ι
Q
mA
10 20 30 40 V50
0
=25C
Ι
V
50
100
150
200
250
300
350
C125=
j
T
j
T
AED01812
0
Ι
q
mA
0
=25 C
Ι
Q
13.5 V=V
Ι
mA
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
10 20 30 40 50
j
T
AED01811
0
Ι
q
mA
0
=25 C
Ι
Q
13.5 V=V
Ι
20 40 60 80 120mA
2
4
6
8
10
12
j
T
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TLE 4269
Data Sheet 15 Rev. 2.4, 2007-03-20
Package Outlines
Figure 8 PG-DSO-8-16 (Plastic Dual Small Outline)
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products
and to be compliant with government regulations the device is available as a green
product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable
for Pb-free soldering according to IPC/JEDEC J-STD-020).
1) Does not include plastic or metal protrusion of 0.15 max. per side
-0.06
-0.2
+0.1
5
0.41
8x
1
1)
4
8
1.27
5
A
0.1
0.2
M
A
(1.45)
0.175
1.75 MAX.
B
B
6
±0.2
0.64
4
-0.2
0.19
+0.06
0.35 x 45°
1)
±0.25
MAX.8°
Index
Marking
±0.07
2) Lead width can be 0.61 max. in dambar area
GPS01229
You can find all of our packages, sorts of packing and others in our
Infineon Internet Page “Products”: http://www.infineon.com/products.
Dimensions in mm
SMD = Surface Mounted Device
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Data Sheet 16 Rev. 2.4, 2007-03-20
TLE 4269
Figure 9 PG-DSO-14-30 (Plastic Dual Small Outline)
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products
and to be compliant with government regulations the device is available as a green
product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable
for Pb-free soldering according to IPC/JEDEC J-STD-020).
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Lead width can be 0.61 max. in dambar area
-0.2
8.75 1)
0.64
0.19
+0.06
Index Marking
1.27
+0.10
0.41
0.1
1
14
2)
7
14x
8
0.175
(1.47)
±
0.07
±0.2
6
0.35 x 45˚
-0.2
1.75 MAX.
41)
±0.25
8˚MAX.
-0.06
0.2
M
AB
M
0.2 C
C
B
A
GPS01230
You can find all of our packages, sorts of packing and others in our
Infineon Internet Page “Products”: http://www.infineon.com/products.
Dimensions in mm
SMD = Surface Mounted Device
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TLE 4269
Data Sheet 17 Rev. 2.4, 2007-03-20
Figure 10 PG-DSO-20-35 (Plastic Dual Small Outline)
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products
and to be compliant with government regulations the device is available as a green
product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable
for Pb-free soldering according to IPC/JEDEC J-STD-020).
GPS05094
1.27
0.2 20x
0.35+0.15 2)
12.8 1)
-0.2
110
1120
2.65 MAX.
2.45
20x
0.1
-0.2
0.2-0.1
Index Marking
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Does not include dambar protrusion of 0.05 max. per side
0.35 x 45˚
-0.21)
7.6
8˚ MAX.
±0.3
10.3
0.4+0.8
0.23
+0.09
You can find all of our packages, sorts of packing and others in our
Infineon Internet Page “Products”: http://www.infineon.com/products.
Dimensions in mm
SMD = Surface Mounted Device
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TLE 4269
Revision History
Data Sheet 18 Rev. 2.4, 2007-03-20
Version Date Changes
Rev. 2.4 2007-03-20 Initial version of RoHS-compliant derivate of TLE 4269
Page 1: AEC certified statement added
Page 1 and Page 15 RoHS compliance statement and
Green product feature added
Page 1 and Page 15 Package changed to RoHS
compliant version
Legal Disclaimer updated
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Edition 2007-03-20
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2007 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
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