Rev. 3.0 April 2013
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AOZ1237QI-02
24V/8A Synchronous EZBuck
TM
Regula tor
General Description
The AOZ1237 is a high-efficiency, easy-to-use DC/DC
synchronous buck regulator that operates up to 24V.
The device is capable of supplying 8A of continuous
output current with an output voltage adjustable down to
0.8V (±1.0%).
A proprietary constant on-time PWM control with input
feed-forward result s in ultr a-fast transien t response while
maintaining relatively constant switching frequency over
the entire input voltage range. The switching frequency
can be externally programmed up to 1MHz.
The device featur es multiple protection f unctions such as
VCC under-voltage lockout, cycle-by-cycle current limit,
output over-vol tage protection, sh ort-circuit protection, as
well as thermal shutdown.
The AOZ1237 is available in a 4mm x 4mm QFN-23L
package and is rated over a -40°C to +85°C ambient
temperature range.
Features
Wide input voltage range
– 2.7V to 24V
8A continuous output current
Output voltage adjustable down to 0.8V (±1.0%)
Low RDS(ON) internal NFETs
– 35m high-side
– 8m low-side SRFET™
Constant On-Time with input feed-forward
Programmable frequency up to 1MHz
Selectable PFM light load operation
Ceramic capacitor stable
Adjustable soft start
Power Good output
Integrated bootstrap diode
Cycle-by-cycle current limit
Short-circuit protection
Over voltage protection
Thermal shutdown
Thermally enhanced 4mm x 4mm QFN-23L package
Applications
Portable computers
Compact desktop PCs
Servers
Graphics cards
Set-top boxes
LCD TVs
Cable modems
Point-of-load DC/DC converters
Telecom/Networking/Datacom equipment
Not Recommended For New Designs
Not Recommended For New Designs
Replacement Part: AOZ2261QI
AOZ1237QI-02
Rev. 3.0 April 2013
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Page 2 of 15
Typical Application
Ordering Information
AOS Green Products use reduced levels of Halogens, and are also RoHS compliant.
Please visit www.aosmd.com/media/AOSGreenPolicy.pdf for additional information.
Pin Configuration
Part Number Ambient Temperature Range Package Environmental
AOZ1237QI-02 -40°C to +85°C 23-Pin 4mm x 4mm QFN Green Product
AOZ1237
5V
Output
1.05V, 8A
Input
2.7V to 24V
C3
44μF
R1
2.65kΩ
1%
R3
100kΩ
R2
8.06kΩ
1%
C2
33μF
C5
0.1μF
Power Ground
Analog Ground
Power Good
Off On
VCC
PGOOD
EN
PFM
SS
CSS
RTON
C4
1μF
BST
LX
FB
AGND
PGND
L1
1μH
TON IN
1
23 21 20 19 18
789 1110
2
3
4
5
PGOOD
NC
IN
IN
LX
LX
SS
IN
VCC
BST
PGND
LX
EN
PFM
AGND
FB
23-Pin 4mm x 4mm QFN
(Top View)
17
16
15
13
12
LX
LX
PGND
PGND
PGND
PGND
LX
IN
14
6
TON
22
Not Recommended For New Designs
AOZ1237QI-02
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Pin Description
Pin Number Pin Name Pin Function
1 PGOOD
Power Good Signal Output. PGOOD is an open-drain output used to indicate the status
of the output voltage. It is internally pulled low when the output voltage is 10% lower than
the nominal regulation voltage for 50µs (typical time) or 15% higher than the nominal
regulation voltage. PGOOD is pulled low during soft-start and shut down.
2EN
Enable Input. The AOZ1237 is enabled when EN is pulled high. The device shuts down
when EN is pulled low.
3PFM
PFM Selection Input. Connect PF M pin to VCC/VIN for forced PWM operation. Connect
PFM pin to ground for PFM operation to improve light load efficiency.
4 AGND Analog Ground.
5FB
Feedback Input. Adjust the output voltage with a resistive voltage-divider between the
regulator’s output and AGND.
6 TON On-Time Setting Input. Connect a resistor between VIN and TON to set the on time.
7 NC Not Connected. Connect to IN pins (8 and 9) to help with heat dissipation.
8, 9, 22 IN Supply Input. IN is the regulator inp ut. All IN pins must be connected toge ther.
12, 13, 14, 15, 19 PGND Power Ground.
10, 11, 16, 17, 18 LX Switching Node.
20 BST Bootstrap Capacitor Connection. The AOZ1237 inclu des an internal bootstrap diode.
Connect an external capacitor between BST and LX as shown in the Typical Application
diagram.
21 VCC Supply Input for analog functions. Bypass VCC to AGND with a 1µF ceramic capacitor.
Place the capacitor close to VCC pin.
23 SS Soft-Start Time Setting Pin. Connect a capacitor between SS and AGND to set the
soft-start time.
Not Recommended For New Designs
AOZ1237QI-02
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Absolute Maximum Ratings
Exceeding the Absolute Maximum Ratings may damage the
device.
Note:
1. Devices are inherently ESD sensitive, handling precautions are
required. Human body model rating : 1.5k
in series with 100pF.
2. LX to PGND Transient (t<20ns) ------ -7V to V
IN
+ 7V.
Maximum Operating Ratings
The device is not guaranteed to operate beyon d the
Maximum Operating ratings.
Note:
3. Connect V
CC
to external 5V for V
IN
= 2.7V ~ 6.5V application.
Parameter Rating
IN, TON to AGND -0.3V to 30V
LX to AGND -2V to 30V
BST to AGND -0.3V to 36V
SS, PGOOD, FB, EN, VCC, PFM to
AGND -0.3V to 6V
PGND to AGND -0.3V to +0.3V
Junction Temperature (T
J
) +150°C
Storage Temperature (T
S
) -65°C to +150°C
ESD Rating
(1)
2kV
Parameter Rating
Supply Voltage (V
IN
)2.7V
(3)
to 24V
Output Voltage Range 0.8V to 0.85*V
IN
Ambient Temperature (T
A
) -40°C to +85°C
Package Thermal Resistance
(θ
JA
)40°C/W
(θ
JC
) 4.5°C/W
Symbol Parameter Conditions Min. Typ. Max Units
V
IN
IN Supply Voltage 2.7 24 V
V
UVLO
Under-Voltage Lockout Threshold of VCC V
CC
rising
V
CC
falling 3.2 4.0
3.7 4.4 V
I
q
Quiescent Supply Current of VCC I
OUT
= 0, V
FB
= 1V, V
EN
> 2V 11.5mA
I
OFF
Shutdown Supply Current V
EN
= 0V 120A
V
FB
Feedback Voltage T
A
= 25°C
T
A
= 0°C to 85°C 0.792
0.788 0.800
0.800 0.808
0.812 V
Load Regulation 0.5 %
Line Regulation 1%
I
FB
FB Input Bias Curren t 200 nA
Enable
V
EN
EN Input Threshold Off threshold
On threshold 2.5 0.5 V
V
EN_HYS
EN Input Hysteresis 100 mV
PFM Control
V
PFM
PFM Input Threshold PFM Mode threshold
Force PWM threshold 2.5 0.5 V
V
PFMHYS
PFM Input Hysteresis 100 mV
Modulator
T
ON
On Time R
TON
= 100k, V
IN
= 12V
R
TON
= 100k, V
IN
= 24V 200 250
150 300 ns
T
ON
_
MIN
Minimum On T i me 100 ns
T
OFF
_
MIN
Minimum Off Time 250 400 ns
Electrical Characteristics
T
A
= 25°C, V
IN
= 12V, V
CC
= 5V, EN = 5V, unless otherwise specified. Specifications in BOLD indicate a temperature range of
-40°C to +85°C.
Not Recommended For New Designs
AOZ1237QI-02
Rev. 3.0 April 2013
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Page 5 of 15
Soft-Start
I
SS
_
OUT
SS Source Current V
SS
= 0
C
SS
= 0.001F to 0.1F71015A
Power Good Signal
V
PG_LOW
PGOOD Low Voltage I
OL
= 1mA 0.5 V
PGOOD Leakage Curren t ±1 A
V
PGH
PGOOD Threshold
(Low level to High level)
FB rising (AOZ1237-02)
FB rising (AOZ1237-04)
FB falling (AOZ1237-04 only)
80
85
114
85
90
117
90
95
120 %
V
PGL
PGOOD Threshold
(High level to Low level) FB rising (AOZ1237-02/04 )
FB falling (AOZ1237-02)
FB falling (AOZ1237-04)
117
77
82
120
82
87
123
87
92 %
PGOOD Threshold Hysteresis 3 %
T
PG_L
PGOOD Fault Delay Time (FB falling) 50 s
Under Voltage and Over Voltage Prot ection
V
PL
Under Voltage Threshold FB falling -30 -25 -20 %
T
PL
Under Voltage Delay Time 128 s
V
PH
Over Voltage Threshold FB rising 17 20 23 %
T
UV_LX
Under Voltage Shutdown Blanking Time V
IN
= 12V, V
EN
= 0V, V
CC
= 5V 20 ms
Power Stage Ou tput
R
DS(ON)
High-Side NFET On-Resistance V
IN
= 12V, V
CC
= 5V 35 45 m
High-Side NFET Leakage V
EN
= 0V, V
LX
= 0V 10 A
R
DS(ON)
Low-Side NFET On-Resistance V
LX
= 12V, V
CC
= 5V 8 12 m
Low-Side NFET Leakage V
EN
= 0V 10 A
Over-current and Thermal Protection
I
LIM
Valley Current Limit V
CC
= 5V 11 A
Thermal Shutdown Threshold T
J
rising
T
J
falling 145
100 °C
Symbol Parameter Conditions Min. Typ. Max Units
Electrical Characteristics
(Continued)
T
A
= 25°C, V
IN
= 12V, V
CC
= 5V, EN = 5V, unless otherwise specified. Specifications in BOLD indicate a temperature range of
-40°C to +85°C.
Not Recommended For New Designs
AOZ1237QI-02
Rev. 3.0 April 2013
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Page 6 of 15
Functional Block Diagram
TON
Generator
ISENSE
ILIM_VALLEY
Error Comp
ILIM Comp
0.8V
ISENCE
(AC) FB
Decode
OTP
Reference
& Bias
BST
PG Logic
LX
AGNDPGND
ISENSE (DC)
ISENSE (AC)
Current
Information
Processing
Vcc
IN PGood
UVLO
TON
Timer
Q
TOFF_MIN
S
RQ
Timer
Q
TON
PFM
FB
SS
EN
VCC
Light Load
Threshold
ISENSE
Light Load
Comp
Not Recommended For New Designs
AOZ1237QI-02
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Page 7 of 15
Typical Performance Characteristics
Circuit of Typical Application. TA = 25°C, VIN = 19V, VOUT = 1.05V, fs = 400kHz unless otherwise specified.
Normal Operation
VLX
10V/div
Io
2A/div
Vo ripple
20mV/div
5μs/div
Full Load Start-up
LX
10V/div
Ven
2V/div
ILX
5A/div
Vo
500mV/div
VLX
20V/div
ILX
5A/div
Vo ripple
500mV/div
50μs/div
Full Load Short
50μs/div
Load Transient 0.8A (10%) to 7.2A (90%)
VLX
20V/div
ILX
5A/div
Vo ripple
50mV/div
1ms/div
Not Recommended For New Designs
AOZ1237QI-02
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Page 8 of 15
Detailed Description
The AOZ1237 is a high-efficiency, easy-to-use,
synchronous buck regulator optimized for notebook
computers. The regulator is capable of supplying 8A of
continuous output current with an output voltage
adjustable down to 0.8V. The programmable operating
frequency range of 100kHz to 1MHz enables optimizing
the configuration for PCB area and efficiency.
The input voltage of AOZ1237 can be as low as 4.5V.
The highest input voltage of AOZ1237 can be 24V.
Constant on-time PWM with input feed-forward control
scheme results in ultra-fast transient response while
maintaining relatively constant switching frequency over
the entire input range. True AC current mode control
scheme guarantees the regulator can be stable with a
ceramic output capacitor. The switching frequency can
be externally programmed up to 1MHz. Protection
features include VCC under-voltage lockout, valley
current limit, output over voltage and under voltage
protection, short-circuit protection, and thermal
shutdown.
The AOZ1237 is available in 23-pin 4mm x 4mm QFN
package.
Input Power Architecture
The AOZ1237 integrates an internal linear regulator to
generate 5.3V V CC from input. If input voltage is lower
than 5.3V, the linear regulator operates at low drop-
output mode; the VCC voltage is equal to input voltage
minus the drop-ou tput volta ge of interna l linear regulat or.
Enable and Soft Start
The AOZ1237 has external soft start feature to limit
in-rush current and ensure the output voltage ramps up
smoothly to regulation voltage. A soft start process
begins when VCC rises to 4.1V and voltage on EN pin is
HIGH. An internal current source charges the external
soft-start capacitor; the FB voltage follows the voltage of
soft-start pin (VSS) when it is lower t han 0.8V. Whe n VSS
is higher than 0.8V, the FB voltage is regulated by
internal precise band-gap voltage (0.8V). The soft-start
time can be calculated by the following formula:
TSS(s) = 330 x CSS(nF)
If CSS is 1nF, the soft-start time will be 330µs; if CSS is
10nF, the soft-start time will be 3.3ms.
Constant-On-Time PWM Control with Input
Feed-Forward
The control algorithm of AOZ1237 is constant-on-time
PWM Control with input feed-forward.
The simplified control schematic is shown in Figure 1.
Figure 1. Simplified Control Schematic o f AOZ1 237
The high-side switch on-time is determined solely by a
one-shot whose pulse width can be programmed by one
external resistor and is inversely proportional to input
voltage (IN). The one-shot is triggered when the internal
0.8V is lower than the combined information of FB
voltage a nd the AC curre nt information of inductor, which
is processed and obt ained through the se nsed lower-side
MOSFET current once it tur ns on. The added AC current
information can help the stability of constant-on time
control even with pure ceramic output capacitors, which
have very low ESR. The AC current information has no
DC offset, which does not cause offset with output load
change, which is fundamentally different from other V2
constant-on time control schemes.
The constant-on-time PWM control architecture is a
pseudo-fixed frequency with input voltage feed-forward.
The internal circuit of AOZ1237 sets the on-time of high-
side switch inversely proportional to the IN.
To achieve the flux balance of inductor, the buck
converter has the equation:
Once the product of VIN x TON is constant, the switching
frequency keeps constant and is independent with input
voltage.
An external resist or between the IN and T ON pin set s the
switching frequency according to the following equation:
0.8V
FB Voltage/
AC Current
Information
Comp
Programmable
One-Shot
IN
PWM
+
–
TON 26.3 10 12–RTON
VIN V
----------------------------------------------------------------
=(1)
FSW VOUT
VIN TON
---------------------------
=(2)
FSW VOUT 1012
26.3 RTON
---------------------------------
=(3)
Not Recommended For New Designs
AOZ1237QI-02
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Page 9 of 15
A further simplified equation will be:
If VOUT is 1.8V, RTON is 137k, the switching frequency
will be 500kHz.
This algorithm results in a nearly constant switching
frequency despite the lack of a fixed-frequency cloc k
generator.
True Current Mode Control
The constant-on-time control scheme is intrinsically
unstable if output capacitor’s ESR is not large enough as
an effective current-sense resistor. Ceramic capacitors
usually cannot be used as output capacitor.
The AOZ1237 senses t he low-side MOSFET curr ent and
processes it into DC and AC current information using
AOS proprietary technique. The AC current info rmation is
decoded and added on the FB pin on phase. With AC
current information, the stability of constant-on-time
control is significan tly impr ov ed eve n withou t th e he lp of
output capacitor’s ESR, and thus the pure ceramic
capacitor solution can be applicable. The pure ceramic
capacitor solution can significantly reduce the output
ripple (no ESR caused overshoot and undershoot) and
less board area design.
Valley Current-Limit Protection
The AOZ1237 uses the valley current-limit pr otection by
using RDSON of the lower MOSFET current sensing. To
detect real current information, a minimum constant-off
(250ns typical) is implemented after a constant-on time. If
the current exceeds the valley current- limit threshold, th e
PWM controller is not allowed to initiate a new cycle. The
actual peak current is greater than the valley current-limit
threshold by an amount equal to the inductor ripple
current. Therefore, the exact current-limit characteristic
and maximum load capability are a function of the
inductor value as well as input and output voltages. The
current limit will keep the low-side MOSFET ON and will
not allow anothe r hig h-sid e on- tim e, until the cur re n t in
the low-side MOSFET reduces below the current limit.
Figure 2 shows the inductor current during the current
limit.
Figure 2. Inductor Current
After 128s (typical), the AOZ1237 considers this is a
true failed condition and therefore, turns-off both high-
side and low-side MOSFETs and latches off. When
triggered, only the enable can restart the AOZ1237
again.
Output Voltage Under-Voltage Protection
If the ou tput voltage is lower than 2 5% by over -curr ent or
short circuit, the AOZ1237 will wait for 128s (typical)
and turns-off both high-side and low-side MOSFETs and
latches off. When triggered, only the enable can restart
the AOZ1237 again.
Output Voltage Over-Voltage Protection
The threshold of OVP is set 20% higher than 800mV.
When the VFB voltage exceeds the OVP threshold,
AOZ1237-02 will shutdown.
Power Good Output
The power good (PGOOD) output, which is an open
drain output, requires the pull-up resistor. When the
output voltage is 15% below than the nominal regulation
voltage for 50s (typical), the PGOOD is pulled low.
When the output voltage is 20% higher than the nominal
regulation voltage, the PGOOD is also pulled low.
FSW kHz
38000 VOUT
V
RTON k
-----------------------------------------------
=(4)
Inductor
Current
Time
Ilim
Not Recommended For New Designs
AOZ1237QI-02
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Page 10 of 15
Application Information
The basic AOZ1237 application circuit is shown in page
2. Component selection is explained below.
Input Capacitor
The input capacitor m ust be connected to t he IN pins and
PGND pin of the AOZ1237 to maintain steady input
voltage and filter out the pulsing input current. A small
decoupling capacitor, usually 1F, should be connected
to the VCC pin and AGND pin for stable operation of the
AOZ1237. The voltage rating of input capacitor must be
greater than maximum input voltage plus ripple voltage.
The input ripple voltage can be approximated by
equation below:
Since the input current is discontinuous in a buck
converter, the current stress on the input capacitor is
another concern when selecting the capacitor. For a buck
circuit, the RMS value of input capacitor current can be
calculated by:
if let m equal the conversion ratio:
The relation between the input capacitor RMS current
and voltage conversion ratio is calculated and shown in
Figure 3. It can be seen that whe n VO is half of VIN, CIN it
is under the worst curr en t str es s. The worst curr e nt
stress on CIN is 0.5 x IO.
Figure 3. I
CIN
vs. Voltage Conversion Ratio
For reliable operation and best performance, the input
capacitors must have current rating higher than ICIN-RMS
at worst operating conditions. Ceramic capacitors are
preferred for input capacitors because of their low ESR
and high ripple current rating. Depending on the
application circuits, other low ESR tantalum capacitor or
aluminum electrolytic capacitor may also be used. When
selecting ceramic capacitors, X5R or X7R type dielectric
ceramic capacitors are prefer re d for th eir bett er
temperature and voltage characteristics. Note that the
ripple current rating from capacitor manufactures is
based on certain amount of life time. Further de-rating
may be necessary for practical design requirement.
Inductor
The inductor is used to supply constant current to output
when it is driven by a switching voltage. For given input
and output voltage, inductance and switching frequency
together decide the inductor ripple current, which is:
The peak inductor current is:
High inductance gives low inductor ripple current but
requires a larger size inductor to avoid saturation. Low
ripple current reduces inductor core losses. It also
reduces RMS current through inductor and switches,
which results in less conduction loss. Usually, peak to
peak ripple current on inductor is designed to be 30% to
50% of output current.
When selecting the inductor, make sure it is able to
handle the peak current without saturation even at the
highest operating temperature.
The inductor takes the highest current in a buck circuit.
The conduction loss on the indu ctor needs to be checke d
for thermal and efficiency requirements.
Surface mount inductors in different shapes and styles
are available from Coilcraft, Elytone and Murata.
Shielded inductors are small and radiate less EMI noise,
but they do cost more than unshielded inductors. The
choice depends on EMI requirement, price and size.
VIN IO
fC
IN
----------------- 1VO
VIN
---------
–
VO
VIN
---------
=
ICIN_RMS IOVO
VIN
---------1VO
VIN
---------
–
=
VO
VIN
---------m=
ILVO
fL
-----------1VO
VIN
---------
–
=
ILpeak IO
IL
2
--------
+=
0
0.1
0.2
0.3
0.4
0.5
0 0.5 1
m
I
CIN_RMS
(m)
I
O
Not Recommended For New Designs
Rev. 3.0 April 2013
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Page 11 of 15
AOZ1237QI-02
Output Capacitor
The output capacitor is selected based on the DC output
voltage rating, output ripple voltage specification and
ripple current rating.
The selected output capacitor must have a higher rated
voltage specification than the maximum desired output
voltage including ripple. De-rating needs to be
considered for long term reliability.
Output ripple voltage specification is another important
factor for selecting the output capacitor. In a buck con-
verter circuit, output ripple voltage is determined by
inductor value, switching frequency, output capacitor
value and ESR. It can be calculated by the equation
below:
where,
C
O
is output capacitor value and
ESR
CO
is the Equivalent Series Resistor of output capacitor.
When a low ESR ceramic capacitor is used as output
capacitor, the impedance of the capacitor at the
switching frequency dominates. Output ripple is mainly
caused by capacitor value and inductor ripple current.
The output ripple voltage calculation can be simplified to:
If the impedance of ESR at switching frequency
dominates, the out put ripple volt age is mainly decided by
capacitor ESR and inductor ripple current. The output
ripple voltage calculation can be further simplified to:
For lower output ripple voltage across the entire
operating temperature range, X5R or X7R dielectric type
of ceramic, or other low ESR t ant alum are recomme nded
to be used as output capacitors.
In a buck converter, output capacitor current is
continuous. The RMS current of output capacitor is
decided by the peak to peak inductor ripple current.
It can be calculated by:
Usually, the ripple current ra ting of the output ca pacitor is
a smaller issue because of the low current stress. When
the buck inductor is selected to be very small and
inductor ripple current is high, the output capacitor could
be overstressed.
Thermal Management and Layout
Consideration
In the AOZ1237 buck regulator circuit, high pulsing
current flows through two circuit loops. The first loop
starts from the input capacitors, to the VIN pin, to the LX
pins, to the filter inductor, to the output capacitor and
load, and then returns to the input capacitor through
ground. Current flows in the first loop when the high side
switch is on. The se co nd loop st ar t s fr om t he indu ctor, t o
the output capacitors and load, to the low side switch.
Current flows in the second loop when the low side
switch is on.
In PCB layout, minimizing the two loops area reduces the
noise of this circuit and improves efficiency. A ground
plane is strongly recommended to connect the input
capacitor, output capacitor and PGND pin of the
AOZ1237.
In the AOZ1237 buck regulator circuit, the major power
dissipating components are the AOZ1237 and output
inductor. The total power dissipation of the converter
circuit can be measured by input power minus output
power.
The power dissipation of inductor can be approximately
calculated by output current and DCR of inductor and
output current.
The actual junction temperature can be calculated with
power dissipation in the AOZ1237 and thermal
impedance from junction to ambient.
The maximum junction temperature of AOZ1237 is
150ºC, which limits the maximum load current capability.
The thermal performance of the AOZ1237 is strongly
affected by the PCB layout. Extra care should be taken
by users during design process to ensure that the IC will
operate under the recommended environmental
conditions.
VOILESRCO 1
8fC
O
-------------------------
+
=
VOIL1
8fC
O
-------------------------
=
VOILESRCO
=
ICO_RMS
IL
12
----------
=
Ptotal_loss VIN IIN VOIO
–=
Pinductor_loss IO2Rinductor 1.1=
Tjunction Ptotal_loss Pinductor_loss
–
JA
=
Not Recommended For New Designs
AOZ1237QI-02
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Page 12 of 15
Layout Considerations
Several layout tips are listed below for the best electric
and thermal performance.
1. The LX pins and pad are connected to internal low
side switch drain. They are low resistance thermal
conduction path and most noisy switching node.
Connect a large copper plane to LX pin to help
thermal dissipation.
2. The IN pins and pad are connected to internal high
side switch drain. They are also low resistance
thermal conduction path. Connect a large copper
plane to IN pins to help thermal dissipation.
3. Input capa cito rs sho uld be conn ec te d to the IN pin
and the PGND pin as close as possible to reduce the
switching spikes.
4. Decoupling capacitor CVCC should be connected to
VCC and AGND as close as possible.
5. Voltage divider R1 a nd R2 should be placed a s close
as possible to FB and AGND.
6. RTON should be pl aced on PCB on th e o ppo site sid e
of feedback network or away from FB pin and FB
feedback resistor s in or der to avoid u nwan ted t ouch,
which will short TON pin and FB together to ground
and cause improper operation.
7. A ground plane is pref er re d; Pin 19 (PGND) mu st be
connected to the ground plane through via.
8. Keep sensitive signal traces such as feedback trace
far away from the LX pins.
9. Pour copper plane on all unused board area and
connect it to stable DC nodes, like VIN, GND or
VOUT.
ġġġġġġġġġġġġġġġġġġġġ3*1'
3*22'
(1
3)0
$*1'
)%
721
1&
,1
/;
3*1'
%67
9&&
,1
66
/;
/;
/;
3*1'
3*1'
,1
3*1'
,1
/;
/;
3*1'
/
;
/
;
/
;
/
;
/
;
/
;
1
&
,
1
,
1
,
1
,
1
9LQ
/
;
9RXW
9
&
&
9RXW
Not Recommended For New Designs
Rev. 3.0 April 2013
www.aosmd.com
Page 13 of 15
AOZ1237QI-02
Package Dimensions, QFN 4x4, 23 Lead EP2_S
TOP VIEW
SIDE VIEW
BOTTOM VIEW
D
Notes:
1. Controlling dimensions are in millimeters. Converted inch dimensions are not necessarily exact.
2. Tolerance: ± 0.05 unless otherwise specified.
3. Radius on all corners is 0.152 max., unless otherwise specified.
4. Package wrapage: 0.012 max.
5. No plastic flash allowed on the top and bottom lead surface.
6. Pad planarity: ± 0.102
7. Crack between plastic body and lead is not allowed.
RECOMMENDED LAND PATTERN Dimensions in millimeters Dimensions in inches
UNIT: MM
Symbols Min. Typ. Max.
E
Pin #1 Dot
By Marking
D2 D3
L1
L
E1
e
EE
b
E2 E3
L3
D1
D1
L2
A1
A
A2
0.37
0.50
0.45
0.25 0.25
0.22
3.10
2.71
3.10
3.43
0.37
0.75
0.95
0.26
0.75
1.34
A
A1
A2
E
E1
D
D1
D2
D3
L
L1
L2
L3
b
e
0.80
0.00
3.90
2.95
3.90
0.65
0.85
1.24
0.35
0.57
0.23
0.57
0.20
0.90
—
0.2 REF
4.00
3.05
4.00
0.75
0.95
1.34
0.40
0.62
0.28
0.62
0.25
0.50 BSC
1.00
0.05
4.10
3.15
4.10
0.85
1.05
1.44
0.45
0.67
0.33
0.67
0.30
Symbols Min. Typ. Max.
A
A1
A2
E
E1
D
D1
D2
D3
L
L1
L2
L3
b
e
0.031
0.000
0.154
0.116
0.154
0.026
0.033
0.049
0.014
0.022
0.009
0.022
0.008
0.035
—
0.008 REF
0.157
0.120
0.157
0.030
0.037
0.053
0.016
0.024
0.011
0.024
0.010
0.020 BSC
0.039
0.002
0.141
0.124
0.141
0.033
0.041
0.057
0.018
0.026
0.013
0.026
0.012
Not Recommended For New Designs
AOZ1237QI-02
Rev. 3.0 April 2013
www.aosmd.com
Page 14 of 15
Tape and Reel Dimensions, QFN 4x4, 23 Lead EP2_S
Carrier Tape
Reel
Tape Size
12mm
Reel Size
ø330
M
ø330.0
±2.0
N
ø79.0
±1.0
UNIT: mm
G
M
W1
S
K
H
N
W
V
R
Trailer Tape
300mm min.
or 75 Empty Pockets
Components Tape
Orientation in Pocket
Leader Tape
500mm min.
or 125 Empty Pockets
H
ø13.0
±0.5
W
12.4
+2.0/-0.0
W1
17.0
+2.6/-1.2
K
10.5
±0.2
S
2.0
±0.5
G
—
R
—
V
—
Leader/Trailer and Orientation
UNIT: mm
P1
D1 P2
B0
P0 D0
E2
E1
E
A0 Feeding Direction
Package A0 B0 K0 EE1E2
D0 D1 P0 P1 P2 T
4.35
±0.10 ±0.10
4.35
±0.10
1.10 1.50 1.50 12.00
±0.10
1.75
±0.05
5.50
±0.10
8.00
±0.10
4.00
±0.05
2.00
±0.05
0.30
±0.30
+0.10/-0Min.
QFN 4x4
(12mm)
T
K0
Not Recommended For New Designs
AOZ1237QI-02
Rev. 3.0 April 2013
www.aosmd.com
Page 15 of 15
Part Marking
Part Number Code
Assembly Lot Code
Fab & Assembly Location
Year & Week Code
Z1237QI2
FAYWLT
AOZ1237QI-02
(QFN4x4)
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical impla nt into
the body or (b) support or sustain life, and (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of
the user.
2. A critical component in any component of a life
support, device, or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
LEGAL DISCLAIMER
Alpha and Omega Semiconductor makes no representations or warranties with respect to the accuracy or
completeness of the information provided herein and takes no liabilities for the consequences of use of such
information or any product described herein. Alpha and Omega Semiconductor reserves the right to make changes
to such information at any time without further notice. This document does not constitute the grant of any intellectual
property rights or representation of non-infringement of any third party’s intellectua l property rights.
LIFE SUPPORT POLICY
ALPHA AND OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.
Not Recommended For New Designs
