area ann ot OATEL ADS-044 INNOVATION and EXCELLENCE 14-Bit, 5MHz Sampling A/D Converters FEATURES 14-Bit resolution 5MHz minimum sampling rate No missing codes over full military temperature range Edge-triggered, no pipeline delay Low power, 2.95 Watts Small, 32-pin, ceramic TDIP package * SMT package available * Excellent dynamic performance MIL-STD-883 screening or DESC SMD available GENERAL DESCRIPTION INPUT/OUTPUT CONNECTIONS The low-cost ADS-944 is a high-performance, 14-bit, 5MHz PIN | FUNCTION PIN | FUNCTION sampling A/D converter. This device accurately samples full-scale input signals up to Nyquist frequencies with no 1 | +5V ANALOG SUPPLY 32 | START CONVERT missing codes. The dynamic performance of the ADS-944 has 2 | -5.2V DIGITAL SUPPLY 31 | BIT 1 (MSB) been optimized to achieve a THD of -77dB and a SNR of 760B. 3 | ANALOG INPUT 30 | BIT 1 (MSB) Packaged in a small, 32-pin TDIP, the functionally complete 4 | ANALOG GROUND 29 | BIT2 ADS-944 contains a fast-settling sample-hold amplifier, a 5 | OFFSET ADJUST 28 | BITS subranging (two-pass) A/D converter, an internal reference, 6 | ANALOG GROUND 27 | BIT4 timing and control logic, three-state outputs, and 7 | GAIN ADJUST 26 | BITS error-correction circuitry. Digital input and output levels are TTL. 8 | COMP. BITS 25 | BIT6 Requiring +15V,+5V and 5.2V supplies, the ADS-944 typically 9 | OUTPUT ENABLE 24 | BIT? dissipates 2.95 Watts. The unit is offered with a bipolar input 10 | +5V DIGITAL SUPPLY 23 | BITS range of +1.25V. Models are available for use in either 11 | ANALOG GROUND 22 | BIT9 commercial (0 to +70C) or military (-55 to +125C) operating 12 | +15V SUPPLY 21 | BIT 10 temperature ranges. Typical applications include radar signal 13 | -15V SUPPLY 20 | BIT 11 analysis, medical/graphic imaging, and FFT spectrum analysis. 14 | -5.2V ANALOG SUPPLY 19 | BIT 12 15 | DIGITAL GROUND 18 | BIT 13 16 | EOC 17 | BIT 14 (LSB) 28 BIT 27 BIT 26 BIT 25 BIT BIT 23 BIT 22 BIT 21 BIT 10 20 BIT 11 FLASH 19 BIT 12 18 BIT 13 OFFSET , OFFSET as ADC ADJUST CIRCUIT 2 17 BIT 14 (LSB) START 32 4 j A CONVERT TIMING AND __ CONTROL LOGIC 9 OUTPUT ENABLE EOC 16 GAIN | | GAIN ADJUST ? CIRCUIT EF | > DIGITAL xr att DAC CORRECTION LOGIC BUFFER Le ANALOG 3 FLASH 31 BIT 1(MSB) INPUT S/H >* ADC 30 BIT 1(MSB) Tc 1 29 BIT 2 3-STATE OUTPUT REGISTER oon Oo & Ww bere re died eddy pepe edo eddy 1 2 4, 6,11 10 12 13 14 15 8 +5V -5.2V ANALOG +5V +15V -15V -5.2V DIGITAL COMP. ANALOG DIGITAL GROUND DIGITAL SUPPLY SUPPLY ANALOG GROUND BITS SUPPLY SUPPLY SUPPLY SUPPLY Figure 1. ADS-944 Functional Block DiagramADS-944 D OATEL ABSOLUTE MAXIMUM RATINGS PHYSICAL/ENVIRONMENTAL PARAMETERS LIMITS UNITS | | PARAMETERS MIN. | TYP. | MAX. | UNITS +15V Supply (Pin 12) 0 to +16 Volts Operating Temp. Range, Case -15V Supply (Pin 13) 0 to -16 Volts ADS-944MC 0 +70 C +5V Supply (Pins 1, 10) Oto +6 Volts ADS-944MM/883 -55 +125 C -5.2V Supply (Pins 2, 14) 0 to -6 Voits Thermal Impedance Digital Inputs (Pins 8, 9, 32) -0.3 to +Vop +0.3 Volts Bic 7 CMWatt Analog Input (Pin 3) 5 to +5 Volts Oca _ 21 - C/Watt Lead Temp. (10 seconds) 300 C Storage Temperature Range -65 _ +150 C Package Type 32-pin, metal-sealed, ceramic TDIP or SMT Weight 0.46 ounces (13 grams) FUNCTIONAL SPECIFICATIONS (Ta= +25C, Voc = 15V, +Vop = +5V, -Vpp = -5.2V, SMHz sampling rate, and a minimum 3 minute warmup ' unless otherwise specified.) +25C 0 to +70C ~55 to +125C ANALOG INPUT MIN. | TYP. | MAX. MIN. TYP. | MAX. MIN. | TYP. | MAX. UNITS Input Voltage Range _ +1.25 _ _ +1.25 _ _ 1.25 _ Volts Input Resistance 500 550 _ 500 550 500 550 _ Q Input Capacitance _ 6 15 _ 6 15 _ 6 15 pF DIGITAL INPUTS Logic Levels Logic "1" +2.0 _ _ +2.0 _ _ +2.0 _ _ Volts Logic O" ~ _ +0.8 _ _ +0.8 - _ +0.8 Volts Logic Loading "1" _ _ _ +20 ~ _ +20 _ _ +20 yA Logic Loading "0" _ _ -20 -20 -20 pA Start Convert Positive Pulse Width 40 80 _ 40 80 _ 40 80 _ ns STATIC PERFORMANCE Resolution _ 14 _ _ 14 _ _ 14 _ Bits Integral Nonlinearity (fin = 10kHz) _ +0.75 _ _ 0.75 _ - +10 _ LSB Differential Nonlinearity (fin = 10kHz) -0.95 +05 +12 0.95 +0.5 +12 -0.95 +0.5 +15 LSB Full Scale Absolute Accuracy _ +0.15 +0.4 _ +0.15 +0.4 _ 0.4 +0.8 %FSR Bipolar Zero Error (Tech Note 2) _ +0.1 0.3 _ +0.1 +0.3 _ +0.3 +0.6 %FSR Bipolar Offset Error (Tech Note 2) +0.2 +0.4 _ +0.2 +0.4 _ +03 +0.9 %FSR Gain Error (Tech Note 2) - +0.2 +0.4 - +0.2 +0.4 - +0.4 +15 % No Missing Codes (fin = 10kHz) 14 _ 14 _ _ 14 _ Bits DYNAMIC PERFORMANCE Peak Harmonics (-0.5dB) de to 100kHz _ -85 -77 - 85 -75 - -81 -71 dB 100kHz to 1MHz _ -78 -71 _ -78 -70 _ -75 -67 dB 1MHz to 2.5MHz _ -75 -70 -75 -68 _ -71 -61 dB Total Harmonic Distortion (-0.5d8) dc to 100kHz _ ~82 -76 _ -82 -74 _ -78 -70 dB 100kHz to 1MHz _ -77 ~70 -77 -70 _ -73 -65 dB 1MHz to 2.5MHz _ ~73 -68 _ -73 -65 -70 -60 dB Signal-toNoise Ratio (w/o distortion, -0.5dB) dc to 100kHz 73 76 _ 73 76 _ 71 75 dB 100kHz to 1MHz 73 76 _ 73 76 - 71 75 - dB 1MHz to 2.5MHz _ 73 75 _ 73 75 - 71 75 - dB Signal-toNoise Ratio * (& distortion, -0.5dB) de to 100kHz 71 75 _ 71 75 _ 68 73 dB 100kHz to {MHz 70 73 _ 69 73 _ 65 71 _ dB 1MHz to 2.5MHz 68 71 _ 66 71 _ 62 69 dB Noise _ 135 _ _ 135 _ _ 135 uvrns Two-tone Intermodulation Distortion (fin = 2.45MHz, 1.975MHz, fs = 5MHZz, 0.5dB) _ -82 _ -82 _ -82 dB Input Bandwidth (-3dB) Small Signal (-20dB input) _ 20 _ 20 _ - 20 - MHz Large Signal (-OdB input) _ 13 _ _ 13 - - 13 _ Mrz Feedthrough Rejection (fi, = 2.5MHz) _ 90 90 _ 90 - dB Slew Rate _ +110 _ +110 _ +110 _ Vips Aperture Delay Time _ +10 _ _ +10 _ _ +10 - ns Aperture Uncertainty _ 3 _ ~ 3 _ _ 3 _ ps rms S/H Acquisition Time ( to +0.003%FSR, 2.5V step) _ 85 90 _ 85 90 _ 85 90 ns Overvoltage Recovery Time _ 200 200 _ _ 200 - ns A/D Conversion Rate 5 = _ _ 5 - MHz ae re SES sini =eD OATEL ADS-944 425C 0 to +70C -55 to +125C DIGITAL OUTPUTS MIN. | TYP. | MAX. MIN. TYP. MAX. | MIN. TYP. | MAX. UNITS Logic Levels Logic "1" +2.4 _ _ +2.4 _ _ +2.4 _ _ Volts Lagic "O" _ _ +0.4 _ _ +0.4 _ _ +0.4 Volts Logic Loading "1" _ _ ~4 4 _ -4 mA Logic Loading "0" _ +4 _ _- +4 _ +4 mA Delay, Edge of ENABLE to Output Data Valid/invalid _ _ 10 _ _ 10 _ _ 10 ns Output Coding Offset Binary, Complementary Offset Binary, Twos Complement POWER REQUIREMENTS Power Supply Ranges 6: +15V Supply +14.25 +15.0 +15.75 +1425 +15.0 +15.75 | +14.25 +15.0 +15.75 Volts -15V Supply -14.25 -15.0 -15.75 | -14.25 -15.0 -15.75 | -14.25 -15.0 -15.75 Volts +5V Supply +4.75 +5.0 45.25 44.75 +5.0 +5.25 +4.9 +5.0 +5.25 Volts -5.2V Supply -4.95 5.2 -5.45 -4.95 5.2 -5.45 5.4 -5.2 -.45 Volts Power Supply Currents 7) +15V Supply +36 +45 - +36 +45 +36 +45 mA -15V Supply _ -55 -65 _ -55 -65 55 -65 mA +5V Supply _ +155 +168 _ +155 +168 _ +155 +168 mA ~5.2V Supply _ ~167 -175 _ -167 -175 _ -167 ~175 mA Power Dissipation _ 2.95 3.3 2.95 3.3 _ 2.95 3.3 Watts Power Supply Rejection _ +0.05 _ _ 0.05 _ +0.05 %FSR/%V Footnotes: @ All power supplies should be on before applying a start convert pulse. All supplies and the clock (start convert pulses) must be present during warmup periods. The device must be continuously converting during this time. When COMP. BITS (pin 8) is low, logic loading O" will be 350yA for this pin. This is the time required before the A/D output is valid after the analog input is back within its specified range. The minimum supply voltages of +4.9V and -5.1V for tVpp are required for -55C operation only. The minimum limits are +4.75V and 4.95V when operating at +125C. Typical +5V and 5.2V current drain breakdowns are as follows: @ An 80ns wide start convert pulse is used for all production testing. The start convert pulse should be between 40 - 80ns or +5Vanalog = +85MA -5.2Vanaiog = 114mA 130 ~ 160ns to ensure proper operation. The latter range could +5Vpigital = +ZOMA -5.2Vpigital = S3MA be used for those applications requiring less than a 5MHz +5VTotal = = +155mA ~5.2Vtotal = 167MA sampling rate. @ Effective bits is equal to: - (SNR + Distortion) -1.76 + | 20 log aa | Actual Input Amplitude 6.02 TECHNICAL NOTES two's complement coding. Pin 8 is TTL-compatible and can be in driven with digital logic for those who want dynamic control of 1. Obtaining fully specified performance from the ADS-944 its function. There is an internal pull-up resistor on this pin, requires careful attention to pc-card layout and power supply allowing pin 8 to be either connected to +5V or left open when decoupling. The device's analog and digital ground systems qi , : a logic "1" is needed. are not connected to each other internally. For optimal ; performance, tie all ground pins (4, 6, 11, and 15) directly to a large 4. To enable the three-state outputs, apply a logic O" (low) to analog ground plane beneath the package. Bypass all power OUTPUT ENABLE (pin 9). To disable, apply a logic "1" (high) to supplies to ground with 4.7yF tantalum capacitors in parallel with pin 9. 0.1pF ceramic capacitors. it is very important that the bypass : . reer capacitors be located as close to the unit as possible. . eee & eT) wnfiaiee an white di . nen er vate c onve esi Inductors or ferrite beads can also be used to improve the power cycle. Data for the interrupted and subsequent conversions supply filtering. Refer to Figure 4, the ADS-944 Evaluation Board wil be invalid P Schematic, for more details. 2. The ADS-944 achieves its specified accuracies without the 6. passive nandpass filter is used at the input of the A/D for all need for external calibration. If required, the device's small p 9. initial offset and gain errors can be reduced to zero using the 7. Though the ADS-944's digital outputs are capable of driving adjustment circuitry shown in Figure 2. When using this multiple LSTTL or HCT loads, we recommend the output bits circuitry, or any similar offset and gain-calibration hardware, and the EOC line each drive only a single gate. These gates make adjustments following warmup. To avoid interaction, should be located as close to the unit as possible. If they can always adjust offset before gain. not, 3322 resistors placed in series with each output can aid in : le dinj isolating pc run inductances. The ADS-944 digital outputs 3. Pin 8 (COMP. BITS) selects the ADS-944's digital output Iso : , a: coding. When a logic "1" is applied to pin 8, the output coding should not be connected directly to noisy digital busses. is complementary offset binary. When pin 8 has a logic _"O" 8. Do not enable/disable or complement the output bits during the applied, the output coding becomes offset binary. The MSB output (pin 31) may be used under these conditions to achieve conversion process (from the falling edge of START CONVERT to the falling edge of EOC).ADS-944 D OATEL CALIBRATION PROCEDURE (Refer to Figure 2 and Table 1) Note: Connect pin 5 to ANALOG GROUND (pin 6) for operation without zero/offset adjustment. Connect pin 7 to ANALOG GROUND (pin 6) for operation without gain adjustment. Any offset and/or gain calibration procedures should not be implemented until devices are fully warmed up. To avoid interaction, offset must be adjusted before gain. The ranges of adjustment for the circuit in Figure 2 are guaranteed to compensate for the ADS-944's initial accuracy errors and may not be able to compensate for additional system errors. A/D converters are calibrated by positioning their digital outputs exactly on the transition point between two adjacent digital output codes. This can be accomplished by connecting LED's to the digital outputs and adjusting until certain LED's "flicker" equally between on and off. Other approaches employ digital comparators or microcontrollers to detect when the outputs change from one code to the next. Zero/Offset Adjust Procedure 1. Apply a train of pulses to the START CONVERT input (pin 32) so the converter is continuously converting. Apply +76.3pV to the ANALOG INPUT (pin 3). Adjust the offset potentiometer until the output bits are 10 0000 0000 0000 and the LSB flickers between 0 and 1 with pin 8 tied low (offset binary) or between 01 1111 1111 1111 and 01 1111 1111 1110 with pin 8 tied high (complementary offset binary). Two's complement coding requires using BIT 1 (MSB) (pin 31). With pin 8 tied low, adjust the trimpot until the code flickers between 00 0000 0000 0000 and 00 0000 0000 0001. Gain Adjust Procedure 1. Apply +1.249771V to the ANALOG INPUT (pin 3). 2. Adjust the gain potentiometer until all output bits are 1's For the ADS-944, offset adjusting is normally accomplished at and the LSB flickers between 1 and 0 with pin 8 tied low the point where the MSB is a 1 and all other output bits are O's (offset binary) or until all bits are O's and the LSB flickers and the LSB just changes from a0 toa 1. This digital output between 1 and 0 with pin 8 tied high (complementary offset transition ideally occurs when the applied analog input is binary). +1/5LSB (+76.3pV). 3. Two's complement coding requires using pin 31. With pin 8 Gain adjusting is accomplished when all bits are 1's and the tied low, adjust the gain trimpot until the output code LSB just changes from a 1 toa 0. This transition ideally flickers equally between 01 1111 11111110 and 01 1111 occurs when the analog input is at +full scale minus 11/5 LSBs 11111111. (+1.249771) . 4. Toconfirm proper operation of the device, vary the applied Note: Due to inherent system noise, the averaging of input voltage to obtain the output coding listed in Table 1. several conversions may be needed to accurately adjust both offset and gain to 1LSB of accuracy. -5.2V +5V +5V -5.2V +15V -15 ANALOG ANALOG _ DIGITAL DIGITAL SUPPLY SUPPLY SUPPLY SUPPLY SUPPLY SUPPLY ry a 4.7pF 470F | a.7UF He ee [4 Le 0.1pF O.1uF) 0.1pF 12 11] 14 10 15 2 [ OUTPUT ENABLE 1 git 1 (MSB) es BIT 1 (MSB) 7 1~ *) stant convert es BIT 2 - BIT3 t-22_ Bit 4 ree BIT 5 . BIT 6 . 3) aNaLog INPUT ADS-944 24. Bitz Figure 2. ADS-944 +23 Bite Connection Diagram }22- BIT 9 boo BIT 10 8 BIT 11 fl COMP. BITS | 19 BIT 12 = 8 air is 12. ait 14 (LSB) GAIN OFFSET L416 Eo ADJUST ADJUST -____ #7 5 oo O.1uF Y 2002 Y 20k.) 0.1pF -15V O-A/\A-O +15V -15V O-A/\A- +15V tHD OATEL ADS-944 0 50 100 150 200 250 300 350 400 ns | ! | I I l I I I 7 N N+1 ice START gone yp > CONVERT ' ' 1 ~ r 35ns typ. ' I ' # Conversion Time ' EOC It 150ns typ., 160ns max. \ ; 1 0ns min. ! ag 10ns t ' < 60ns typ. 7m \ ns yp. 1 ' 70ns max. INTERNAL S/H : \ 1 COMMAND Hold Acquisition Time Hotd 115ns typ. jwe 85ns typ. >| 90ns max. ! I ky invalid + Invalid OUTPUT DATA DATA N-1 VALID Data 7 DATA N VALID be Data 140ns min., 150ns typ. 50ns typ. 140ns min., 150ns typ. 60ns mak P SCALE: 10ns/division START CONVERT pulse width: 40 to 80n3 or 130 to 160ns Figure 3. ADS-944 Timing Diagram TIMING The ADS-944 is an edge-triggered device. A conversion is initiated by the rising edge of the start convert pulse and no additional external timing signals are required. The device does not employ pipeline delays to increase its throughput rate. It does not require multiple start convert pulses to bring valid digital data to its output pins. Approximately 10ns after the rising edge of the start convert signal, the ADS-944's internal sample-hold amplifier is driven into the hold mode by the internal S/H control line. After a 35ns delay to allow for S/H output transient settling, the conversion process begins, and the EOC line (pin 16) is driven high. The complete A/D conversion requires approximately 150ns. The falling of EOC signals that the conversion is now complete and digital output data is now valid. This device actually guarantees that digital output data will be _ valid for 10ns prior to the falling edge of EOC. Therefore, EOC can be used to latch data into external registers that have appropriate setup times. Any other available timing edges, including a delayed EOC or the rising edge of the next EOC pulse, can also be used for this purpose. The falling edge of the start convert pulse, though irrelevant to device timing, can cause conversion errors if it occurs at certain times. Therefore, the recommended start convert pulse width is between 40 and 80ns or between 130 and 160ns. DATEL performs ADS-944 production testing at the full 5MHz sampling rate using 80ns start convert pulses. THERMAL REQUIREMENTS All DATEL sampling A/D converters are fully characterized and specified over operating temperature (case) ranges of 0 to +70C and 55 to + 125C. All room-temperature (Ta = +25C) production testing is performed without the use of heat sinks or forced-air cooling. Thermal impedance figures for each device are listed in their respective specification tables. These devices do not normally require heat sinks, however, standard precautionary design and layout procedures should be used to ensure devices do not overheat. The ground and power planes beneath the package, as well as all pcb signal runs to and from the device, should be as heavy as possible to help conduct heat away from the package. Electrically-insulating, thermally-conductive pads may be in- stalled underneath the package. Devices should be soldered to boards rather than socketed, and of course, minimal air flow over the surface can greatly help reduce the package tem- perature. In more severe ambient conditions, the package/junction tem- perature of a given device can be reduced dramatically (typi- cally 35%) by using one of DATELs HS Series heat sinks. See Ordering Information for the assigned part number. See page 1-183 of the DATEL Data Acquisition Components Cata- log for more information on the HS Series. Request DATEL Application Note AN-8, Heat Sinks for DIP Data Converters, or contact DATEL directly, for additional information. Table 1. Output Coding OFF. BINARY COMP. OFF. BIN. TWO'S COMP. OUTPUT CODING INPUT RANGE | BIPOLAR MSB LSB |MSB LSB | MSB LSB +1.25V SCALE 11 1111 1111 1111 |00 0000 0000 0000/01 11711111 1111| +1.249847 | +FS-1LSB 11 1000 0000 0000 | 00 0111 1111 1111] 01 1000 0000 0000] +0.937500 | +3/4 FS 41 0000 0000 0000 | 00 1111 1111 1111 | 01 0000 0000 0000} +0.625000 | +1/2 FS 40 0000 0000 0000 |01 1111 1111 1111 | 00 0000 0000 0000} 0.000000 0 01 0000 0000 0000 | 10 1111 1111 1111] 11.0000 0000 0000| -0.625000 | -1/2FS 00 1000 0000 0000 | 11 0111 1111 1111] 10 1000 0000 0000| -0.937500 | -3/4 FS 00 0000 0000 0001 | 11 1111 1111 1110| 10 0000 0000 0001| -1.249847 | -FS+1LSB 00 0000 0000 0000 | 11 1111 1111 1111] 10 0000 0000 0000| -1.250000 | -FSD OATEL ADS-944 DNBWOYIS pueog UOHeN}eAg PrE-SAV bp enb4 SwHO NI Jad SYOISTSaa 171 n@2 380 92 - 19 AOS 3540 SYaOiTIJedy) T1090 Gas JadS ASIMAaHIG SSAIWN'I S310N tf TF f | | +40-J aateet Cae at i os = ota L ao tf \ : Seine +10- ~ J oT A | = i ~ eC (er j a9 (1 er we : 16 sateet cage | cto 7 _ TL i ae ' = * . 2a | ! ale s " 1 ee SF | | PS - + | i 3 | yey Bet 3 t ' 6 eo Wee AET- Ac- moe ; oT a oft |e 4 3 . a ee | sl | Att 303] i . : 1 or vi < Vile 3 | | cmt : Ta a L Oy si } #22 an ol * , 1 1 ; Fe coat 3 = tL | c ede tz Co : 4-1, Ss wy % es 28 | \ ~ mae taaet eo 7 T | Ade ot ee H ! T > 8 | i ae | | ! : 4 mS Cmte +r Cad at ; aT 38 Lo ee * AAA at = = = 2 : ] al - Fost i i . wee ' | ie Twas Fae 2 e ) i ez 222 co oT De PN Po) fhe tl). | = | ee +-___*q } _T TN AAAS | ett 1 Seemed Cael | | 7 ; | | ae a Cua ST ewes sore | a | ve T et . | ws | Gan eS yes | ose g : 7 T t ' so i _ = Z 4 = | tate _ cit | 9 _ 4 he wz I mi} | 3S soi ta | a ! { t i ' | | | ! 1 LDp OATEL ADS-944 Peak Harmonic vs. Input Frequency THD ve. input Frequency 2 ~ : 5 : 2 1 10 100 1000 10000 1 10 100 1000 10000 Frequency (kHz) Frequency (kHz) SNR vs. Input Frequency SNR+D va. input Frequency SNR (dB) SNR+D (dB) 1 10 100 1000 10000 1 10 100 1000 10000 Frequency (kHz) Frequency (kHz) Figure 5. Typical ADS-944 Dynamic Performance vs. Input Frequency at +25C +0.33 -0.55 0 Codes 16,384 Occurrences -100 -110 -120 -130 -140 Amplitude Relative to Full Scale (dB) Q 250 500 750 1 1.25 15 1.75 2.00 225 25 kHz kHz kHz MHz MHz MHz MHz MHz MHz MHz Frequency 0 Codes 16,384 Figure 6. ADS-944 FFT Figure 7. ADS-944 Histogram and (fin = 2.45MHz, fs = 5MHz, Vin = -0.5dB, 16,384 points) Differential NonlinearityADS-944 D OATEL MECHANICAL DIMENSIONS INCHES (mm) 1,72 MAX. (43.69) 0.100 TYP. 0.235 MAX, (2.540) (5.969) 1.500 (38.100) 0.200 MAX. (5.080) 14 | h UO POUCA Olmension Tolerances (unless otherwise indicated): 2 place decimal (.XX) +0.010 (+0.254) 3 place decimal (.XXX) +0.005 (+0.127) Lead Materlal: Kovar alloy Lead Finish: 50 microinches (minimum) gold plating 1.11 MAX, over 100 microinches (nominal) nickel plating (28.19) (ly rein HTS SEATING 0.010 "30 (0.254) ee | one gg el Puan | oaorae0 | LL gue 0.040 (0.635) | i (1.016) 9000 sooo} The histogram in Figure 8 represents the typical peak-to-peak noise (including quantization noise) associated with the ADS-944. 16,384 conversions were processed with the input 7000 + to the ADS-944 tied to analog ground. w 6000+ 8 ORDERING INFORMATION 5 5000 + MODEL NUMBER OPERATING TEMP. RANGE 8 ADS-944MC 0 to +70C 4000 4 ADS-944MM -55 to +125C ADS-944/883 55 to +125C Contact DATEL for availability of surface-mount (J-lead) 3000 + packaging or for MIL-STD-883 or DESC SMD product specifications. 2000 | ACCESSORIES ADS-B944 Evaluation Board (without ADS-944) 1000 + HS-32 Heat sink for ADS-944 DDIP models Receptacles for PC board mounting can be ordered through 0 __] oo, AMP Inc., Part # 3-331272-8 (Component Lead Socket), 24 Digital Output Code Figure 8. ADS-944 Grounded Input Histogram D OATEL INNOVATION and EXCELLENCE DATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1194 Tel: (508) 339-3000 / Fax: (508) 339-6356 For immediate assistance 1-800-233-2765 required. DS-0265B 13/96/30 DATEL (UK) LTD. Tadley, England Tel: (01256)-880444 DATEL S.A.R.L. Montigny Le Bretonneux, France Tel: 1-34-60-01-01 DATEL GmbH Munchen, Germany Tel: 89-544334-0 DATEL KK Tokyo, Japan Tel: 3-3779-1031, Osaka Tel: 6-354-2C25 DATEL makes no representation that the use of hese products in the circuits described herein, or use of other technical infarmation contained herein, will not infringe upon existing or future patent rights The descriptions contained herein do not imply the granting of licenses to make, use, or sell equipment constructed in accordance therewith. Specifications are subject to change withoul notice. The DATEL logo is a registered DATEL, Inc. trademark