Power LSI series for Digital Camera and Digital Video Camera 4CH Internal Power MOSFET System Switching Regulator BD9866GUL Outline BD9866GUL is a 4ch DC/DC converter IC composed of Buck converter 3-channels and Buck-Boost converter 1-channel.Including power MOSFET of all channels reduces the number of peripheral devices. Each channel is controlled individually, that enables to reduce power consumption of not working channel. Features 1) Includes Buck converter (CH1, 2 and 4), and Buck-Boost converter (CH3), total 4 channels included. 2) Includes Power MOSFET for all channels. 3) Includes Over Current Protection (OCP) for all channels. 4) Includes Short Circuit Protection (SCP.) 5) Includes Undervoltage Lock Out (UVLO.) 6) Includes Thermal Shut Down (TSD.) 7) Includes Power Good(PG) 8) External synchronous oscillation 9) Each channel can be turn on/off individually. 10) Contains internal compensation for all channels. 11) Operation frequency of 1MHz. Key specifications Input voltage range : Output voltage CH1 reference voltage: CH2 reference voltage: CH3 reference voltage: CH4 reference voltage: Load current CH1 load current: CH2 load current: CH3 load current: CH4 load current: Frequency: 4.0V to 14.0V 0.6V1.67% (typ.) 0.8V1.25% (typ.) 0.8V1.25% (typ.) 0.8V1.25% (typ.) 3.0A(max) 2.0A(max) 1.5A(max) 3.0A(max) 1MHz(typ.) Function block diagram Package WLCSP(3.75mmx3.75mm) Use For digital single-lens reflex camera, digital video camera. Step Down DC/DC 1 FET Step Down DC/DC 2 FET FET 1.1V 1.5V FET FET Buck Boost DC/DC 3 FET 5.0V FET FET Step Down DC/DC 4 FET FET 3.3V Figure. 1 Function block diagram Product structure:Sillicon monolithic integrated circuit www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211114001 This product is not designed protection against radio active rays 1/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL Pin assignment(Bottom View) G PVCC1 PVCC1 VREGD PVCC GND VCC PVCC4 F Lx1 CH1G INV1 VREGB VREGA RT PVCC4 E Lx1 CH2G SYNC INV3 INV4 Lx4 Lx4 D PGND1 PGND1 CTL2 INV2 RTSS PGND4 PGND4 C PGND2 PGND2 1pin POST CTL1 CTL4 CTL3 SEL B Lx2 Lx2 PGND SCP PG Lx32 VO3 A PVCC2 PVCC2 PVCC3 Lx31 PGND3 PGND3 Lx32 1 2 3 4 5 6 7 Figure.2 Pin assignment Pin description PINno Symbol I/O G6 VCC - Input supply voltage G4 PVCC - Input supply voltage of internal regulator for driver B3 G1,G2,A1,A2, A3,F7,G7 D1,D2,C1,C2, A5,A6,D6,D7 G5 PGND - Ground terminal PVCC1,2,3,4 - Driver input supply voltage terminal. PGND1,2,3,4 - Ground for internal FET GND - Ground G3 VREGD O Output terminal of 3.5V regulator for lowside driver F5 VREGA O Output terminal of 3.5V regulator for internal reference voltage F4 VREGB O Output terminal of PVCC - 3.5V regulator for highside driver B7 E1,F1,B1,B2, E6,E7 A4 Vo3 O Output voltage terminal for CH3 Lx1,2,4 O Inductor connecting terminal Lx31 O CH3 input side inductor connecting terminal Description A7,B6 Lx32 O CH3 output side inductor connecting terminal F3,D4,E4,E5 INV1,2,3,4 I Error amplifier inverted input terminal E3 SYNC I External oscillator input terminal F6 RT - Oscillator frequency adjustment terminal with external resistor B4 SCP - SCP delay time setting terminal with external capacitor C4,D3,C6,C5 CTL1,2,3,4 I ON/OFF control terminal B5 PG O Power good signal output terminal at SCP F2,E2 CH1,2G O CH1,2 power good signal output terminal D5 RTSS O RT voltage setting terminal C7 SEL I CH2,4 mode select terminal www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 2/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL block diagram Figure. 3 block diagram www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 3/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL Absolute Maximum Ratings Parameter Symbol Limits Maximum Power Supply Voltage VCC, PVCC, PVCC1,2,3,4 -0.3 to 15 V IPVCC1,4 3.5 A Maximum Input Current Units IPVCC2,3 2.5 A VREGA, VREGD, PVCC1,2,3,4-VREGB -0.3 to 7 V Lx1, Lx2, Lx31, Lx4 -0.3 to 15 V Lx32, Vo3 -0.3 to 10.5 V PG -0.3 to 15 V Maximum Input Voltage Power Dissipation CH1,2G -0.3 to 7 V CTL1,2,3,4 -0.3 to 15 V SEL -0.3 to 15 V SYNC -0.3 to 15 V Pd 1.25(*1) W Operating Temperature Topr -25 to +85 Storage Temperature Tstg -55 to +125 Junction Temperature Tjmax 125 (1*)when mounted on a 50mmx50mmx1.75mm glass epoxy 8layer PCB at Ta=25(Derate by 12.5mW/ above 25) Recommended Operating Conditions Parameter Symbol Limits Min Typ Max Units Power Supply Voltage VCC,PVCC 4.0 6.0 14 V VREGA,VREGD Output Capacitor CVREGA,D 0.47 1.0 2.2 F CVREGB 0.47 1.0 2.2 F Capacitor Connected to SCP CSCP 0.001 2.2 F Oscillator Frequency FOSC 0.6 1.0 1.5 MHz OSC Timing Resistor RT 47 82 120 k Capacitor Connected to RTSS CRTSS 1000 10000 pF H Level of SYNC Input voltage VSYNCH 3.0 - VCC V L Level of SYNC Input voltage VSYNCL -0.3 - 0.5 V VREGB Output Capacitor Duty of SYNC Input DSYNC 40 50 60 % Output voltage range of CH3 VVOUT3 4.0 10 V Output Current of CH1 IOUTCH1 (*3) 3 (*3) A Conditions Connect to PVCC 1MHz by connecting 82k 1.1V Output Output Current of CH2 IOUTCH2 A 1.5V Output Output Current of CH3 IOUTCH3 1.5(*3) A 5.0V Output Output Current of CH4 IOUTCH4 3(*3) A 3.3V Output 2 (*) Please connect capacitor to I/O(VCC, PVCC, VREG) so that IC can be operated safety. (*3) Please make a power design total loss of IC not to exceed the power dissipation. Over Current Protection Parameter Symbol Limits Min Typ Max Units CH1 PVCC1 OCP Current IOCP1 3.2 - - A CH2 PVCC2 OCP Current IOCP2 2.2 - - A CH3 PVCC3 OCP Curernt IOCP3 3.0 - - A CH4 PVCC4 OCP Current IOCP4 3.2 - - A www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 4/35 Conditions TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL Electrical Characteristics(Ta=25, VCC=PVCC=6V, RT=82k, CTL1-4=3V, unless otherwise noted) Limits Parameter Symbol Units Conditions Min Typ Max Internal Regulator Regulator output voltage for internal analog circuit Regulator output voltage for bias voltage of Highside FET Regulator output voltage for bias voltage of Lowside FET VREGA 3.3 3.5 3.7 V IVREGA=-1mA VREGB VCC-3.7 VCC-3.5 VCC-3.3 V IVREGB=+1mA VREGD 3.3 3.5 3.7 V IVREGD=-1mA VSTD1 3.2 3.4 3.6 V VHYS1 0.1 0.2 V Threshold voltage of VREG undervoltage lock out VSTD2 2.8 3.0 3.2 V Hysteresis voltage of VREG undervoltage lock out VHYS2 0.1 0.2 V SCP terminal output current ISCP 2.5 5.0 7.5 A SCP terminal detect voltage VTSC 0.45 0.50 0.55 V SCP terminal stand-by voltage VSSC 10 100 mV FOSC 0.9 1.0 1.1 MHz DMAX1,2,4 - - 100 % (*4) , VSCP=0V Lx1,Lx2,Lx4 High Duty Max duty Lx31 DMAX31 - - 100 % Lx31 High Duty Max duty Lx32 DMAX32 74 80 86 % Lx32 Low Duty RTSS terminal stand-by voltage RTSSF - 1 20 mV RTSS terminal input current IRTSSI -7 -5 -3 A RTSS terminal output current IRTSSO 3 5 7 A IINV1,2,3,4 -50 0 50 nA VINV1 0.590 0.600 0.610 V VINV2,3,4 0.790 0.800 0.810 V TSS1 0.7 1.4 2.1 msec TSS2,3,4 0.95 1.9 2.85 msec Under Voltage Lock Out Threshold voltage of VCC undervoltage lock out Hysteresis voltage of VCC undervoltage lock out VCC terminal voltage monitor VCC terminal voltage monitor VREGA,VREGD terminals voltage monitor VREGA,VREGD terminals voltage monitor Short Circuit Protection VSCP=0.1V Oscillator Oscillator frequency of DC/DC converter Max duty Lx1,Lx2,Lx4 RT=82k CTL1-4=0V Error Amplifier INV1-4 terminal input bias current INV1 terminal threshold voltage INV2-4 terminal threshold voltage INV=2.0V Soft Start CH1 Soft start time CH2,3,4 Soft start time (*4) SCP circuit starts to charge when operated 100% Duty, therefore it is possible to use 100% Duty only while SCP voltage doesn't reach to 0.5V. www.rohm.com (c) 2013 ROHM Co., Ltd. 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TSZ2211115001 5/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL Electrical Characteristics(Ta=25, VCC=PVCC=6V, RT=82k, CTL1-4=3V, unless otherwise noted) Parameter Symbol Limits Min Typ Max Units Conditions Driver Lx1 Highside SW on resistance RON1P - 180 300 m ILx1=-50mA Lx1 Lowside SW on resistane RON1N - 75 130 m ILx1=+50mA Lx2 Highside SW on resistance RON2P - 190 305 m ILx2=-50mA Lx2 Lowside SW on resistance RON2N - 100 160 m ILx2=+50mA Lx31 Highside SW on resistance RON31P - 190 305 m ILx31=-50mA Lx31 Lowside SW on resistance RON31N - 115 185 m ILx31=+50mA Lx32 Highside SW on resistance RON32P - 230 370 m Vo3=5.0V, ILx32=-50mA Lx32 Lowside SW on resistance RON32N - 115 185 m ILx32=+50mA Lx4 Highside SW on resistance RON4P - 170 290 m ILx4=-50mA Lx4 Lowside SW on resistance RON4N - 140 230 m ILx4=+50mA Lx1,Lx2,Lx4 terminal discharge resistance RDISLX,2,4 40 100 160 CTL1,2,4=0V RDISVO3 40 100 160 CTL3=0V RONPG - 350 600 PG=1V ILKPG - 0 1.0 A PG=15V CH1G,CH2G terminals high voltage CH1,2GH VREGA -0.5 - - V ICTL1,2G=-100uA CH1G,CH2G terminals low voltage CH1,2GL - - 0.5 V ICTL1,2G=+100uA CTL terminal active voltage VCTLH 2.5 - VCC V CTL1,2,3,4 CTL terminal stand-by voltage VCTLL -0.3 - 0.8 V CTL1,2,3,4 CTL terminal pull-down resistance RCTL 250 400 700 k CTL1,2,3,4 SEL terminal high voltage VSELH 2.5 - VCC V SEL terminal low voltage VSELL -0.3 - 0.8 V SEL terminal pull-down resistance RSEL 250 400 700 k ISTB - 0 5 A Active current(SCP detect state) ICCST - 5 10 mA Active current(DC/DC converter active) ICCAPP - 35 45 mA VO3 terminal discharge resistance Power Good PG terminal on resistance PG terminal leak current Control Circuit Current Stand-by current(IC OFF) www.rohm.com (c) 2013 ROHM Co., Ltd. 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TSZ2211115001 6/35 CTL1-4=0V INV1,2,3,4=0V Circuit current of analog All channels operate with recommended external parts TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL Application circuit1 A (*1) (47pF) ( ) Limit input current for PVCC OCP 150k (8.2k)( ) VREGA INV1 PWMCOMP1 + + 180k CH1 Lx1 Step Down ERRORAMP1 10F PGND1 Limit input current for PVCC OCP 100k VREGA PWMCOMP2 + + 120k PVCC2 Light Load SEL mode Limit input current for PVCC 10F PGND2 PVCC3 OCP + + 39k 4.7F PWMCOMP3 VREGA INV3 Vo2 1.5V Lx2 4.7H (Current mode) C 200k B 4.7F CH2 Step Down ERRORAMP2 24pF Vo1 1.1V 4.7H (Current mode) B INV2 A PVCC1 4.7F Lx31 CH3 PGND3 Cross Converter 4.7H (Voltage mode) ERRORAMP3 C Lx32 Vo3 D Limit input current for PVCC OCP 75k VREGA INV4 PWMCOMP4 + + 24k SCP TIMER 0.01F SCP Vo4 3.3V (Current mode) Substrate CH2G TSD OSC RTSS RT SYNC 82k VREGA 1.0F PGND4 PGND VCC PVCC VREG A RTSS enable 0.01F SEL UVLO VREGA CH CTL 10F Light Load mode VCC VREGA VREGD PROTECTION CH1G CTL1 CTL2 CTL3 CTL4 SEL D Lx4 4.7H --+ SCP TIMEROUT Counter reset SS CLK VREGA 10F PVCC4 4.7F CH4 Step Down ERRORAMP4 Vo3 5.0V VREG D VREG B VREGB PG shutdown VREGD 1.0F 100k SCP TIMEROUT GND 1.0F Figure. 4 Application circuit 1 www.rohm.com (c) 2013 ROHM Co., Ltd. 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TSZ2211115001 7/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL A (*1) (47pF) ( ) Limit input current for PVCC OCP 150k (8.2k)( ) VREGA INV1 PWMCOMP1 + + 180k CH1 Lx1 Step Down ERRORAMP1 10F PGND1 Limit input current for PVCC OCP 100k VREGA PWMCOMP2 + + 120k PVCC2 Light Load SEL mode Limit input current for PVCC 10F PGND2 PVCC3 OCP + + 39k 4.7F PWMCOMP3 VREGA INV3 Vo2 1.5V Lx2 4.7H (Current mode) C 200k B 4.7F CH2 Step Down ERRORAMP2 24pF Vo1 1.1V 4.7H (Current mode) B INV2 A PVCC1 4.7F Lx31 CH3 PGND3 Cross Converter 4.7H (Voltage mode) ERRORAMP3 C Lx32 Vo3 D Limit input current for PVCC OCP 75k VREGA INV4 PWMCOMP4 + + 24k SCP TIMER 0.01F SCP Vo4 3.3V (Current mode) Substrate CH2G TSD OSC RTSS RT SYNC VREGA PGND4 PGND VCC PVCC VREG A RTSS enable 0.01F SEL UVLO VREGA CH CTL 10F Light Load mode VCC VREGA VREGD PROTECTION CH1G CTL1 CTL2 CTL3 CTL4 SEL D Lx4 4.7H --+ SCP TIMEROUT Counter reset SS CLK VREGA 10F PVCC4 4.7F CH4 Step Down ERRORAMP4 Vo3 5.0V VREG D VREG B VREGB PG shutdown VREGD 1.0F 100k SCP TIMEROUT GND 1.0F 82k 1.0F Figure. 5 Application circuit 2 (*1) Add to improve transient characteristics optionally. We are confident that above applied circuit diagram should be recommended, but please thoroughly confirm its characteristics when using it. In addition, when using it with external circuit's constants changed, please make a decision that allows a sufficient margin in light of the fluctuations of external components and ROHM's IC in terms of not only static characteristics but also transient characteristics.. www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 8/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL Timing Chart of startup VCC CTL Start up VREGA,VREGD,VREGB and part of controller VREGA VREGD CH1 Stop Delay Toff1=50usec UVLO (VREG) release=3.0V Internal triangular waveform RTSS RTSS constant point no external synchronization: 0.5V external synchronization: a stable point between 0.5 to 0.83V RTSS Charge Current 60A@RTSS < 0.35V 5A@RTSS > 0.35V 0.35V(typ.) SS1 (internal node) Soft Start by internal counter 0.6V(typ.) Vo1 Constant output Tss1 = 1.4ms SS2-4 (internal node) 0.8V(typ.) Soft Start by internal counter Vo2-4 Constant output Tss2,3,4 = 1.9ms Figure.6 Timing chart of Startup www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 9/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL Timing chart of UVLO operation Figure. 7 Timing chart of UVLO operation (UVLO detect and after release from UVLO, restart with softstart) www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 10/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL Timing chart of SCP detection after startup INV 0.8V(setting voltage) Output stops with SCP latch EOUT (internal node) 3.0V(typ.) SCP Charge the capacitor connected SCP terminal by charge current of 5A 0.5V(typ.) SCP latch is detected when SCP > 0.5V (Latch state is released at UVLO) Latch detect time when capacitor connected to SCP terminal is 0.01F =(CxV)/I =(0.01x0.5)/5=1msec PG Open drain terminal becomes Low by SCP latch Figure. 8 Timing chart of SCP detection after startup (abnormal output in operating) www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 11/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL Timing chart of startup with output shorted to GND Figure. 9 Timing chart of startup with output shorted to GND www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 12/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL Typical Operating Characteristics 5.0 5.0 VCC=14V Ta=-25 to 85 VCC=014V Ta=25 4.0 4.0 3.0 ICC [uA] ICC [uA] 3.0 2.0 2.0 1.0 1.0 0.0 0.0 0 2 4 6 8 VCC [V] 10 12 -50 14 Figure.10 ICC(OFF) - VCC 0 25 50 Temperature [] 75 100 Figure.11 ICC(OFF) - Ta 10.0 10.0 VCC=014V Ta=25 9.0 8.0 8.0 7.0 7.0 6.0 6.0 5.0 5.0 4.0 3.0 4.0 3.0 2.0 2.0 1.0 1.0 0.0 0.0 0 2 4 6 8 VCC [V] 10 12 -50 14 Figure.12 ICC(SCP state) - VCC www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 VCC=7V Ta=-25 to85 9.0 ICC [mA] ICC [mA] -25 -25 0 25 50 Temperature [] 75 100 Figure.13 ICC(SCP state) - Ta 13/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL Typical Operating Characteristics(continued) 3.700 5.0 VCC=014V Ta=25 VCC=7V Ta=-25 to 85 3.660 3.620 4.0 3.580 3.540 VREGA [V] VREGA[V] 3.0 2.0 3.500 3.460 3.420 3.380 1.0 3.340 3.300 0.0 0 2 4 6 8 VCC [V] 10 12 -50 14 Figure.14 VREGA - VCC -25 0 25 50 Temperature [] 75 100 Figure.15 VREGA - Ta 5.0 3.700 VCC=014V Ta=25 VCC=7V Ta=-25 to 85 3.660 4.0 3.620 3.580 3.540 VREGD[V] VREGD[V] 3.0 2.0 1.0 3.500 3.460 3.420 3.380 3.340 0.0 3.300 0 2 4 6 8 VCC[V] 10 12 14 -50 Figure.16 VREGD- VCC www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 -25 0 25 50 Temperature [] 75 100 Figure.17 VREGD - Ta 14/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL Typical Operating Characteristics(continued) 5.0 3.700 VCC=014V Ta=25 3.660 4.0 VCC=7V Ta=-25 to 85 3.620 3.0 3.540 VREGD[V] PVCC-VREGB[V] 3.580 2.0 1.0 3.500 3.460 3.420 3.380 3.340 0.0 3.300 0 2 4 6 8 VCC [V] 10 12 14 -50 Figure.18 (PVCC-VREGB)- VCC 0 25 50 Temperature [] 75 100 Figure.19 (PVCC-VREGB) - Ta 0.700 0.700 VCC=414V Ta=25 0.680 VCC=7V Ta=-25 to 85 0.680 0.660 0.660 0.640 0.640 INV1 threshold voltage[V] INV1 threshold voltage[V] -25 0.620 0.600 0.580 0.560 0.540 0.520 0.620 0.600 0.580 0.560 0.540 0.520 0.500 0.500 4 6 8 10 VCC [V] 12 14 -50 Figure.20 INV1 threshold voltage - VCC www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 -25 0 25 50 Temperature [] 75 100 Figure.21 INV1 threshold voltage - Ta 15/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL Typical Operating Characteristics(continued) 0.900 0.900 VCC=414V Ta=25 0.880 0.860 INV2,3,4 threshold voltage[V] 0.860 INV2,3,4 threshold voltage[V] VCC=7V Ta=-25 to 85 0.880 0.840 0.820 0.800 0.780 0.760 0.740 0.720 0.700 0.840 0.820 0.800 0.780 0.760 0.740 0.720 0.700 4 6 8 10 VCC [V] 12 14 -50 Figure.22 INV2,3,4 threshold voltage- VCC 0 25 50 Temperature [] 75 100 Figure.23 INV2,3,4 threshold voltage- Ta 1200 1200 VCC=414V Ta=25 1150 VCC=7V Ta=-25 to 85 1150 1100 1100 1050 1050 fosc [kHz] fosc [KHz] -25 1000 950 1000 950 900 900 850 850 800 800 4 6 8 10 VCC [V] 12 14 -50 Figure.24 fosc - VCC www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 -25 0 25 50 Temperature [] 75 100 Figure.25 fosc - Ta 16/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL 5.0 5.0 4.0 4.0 3.0 3.0 CH1G[V] CH1G[V] Typical Operating Characteristics(continued) 2.0 VCC=3.83.3V Ta=25 1.0 2.0 VCC=3.33.8V Ta=25 1.0 0.0 0.0 3.30 3.40 3.50 3.60 VCC [V] 3.70 3.30 3.80 3.50 3.60 3.70 3.80 VCC [V] Figure.26 UVLO VCC detect threshold voltage Figure.27 UVLO VCC reset threshold voltage 5.0 5.0 4.0 4.0 3.0 3.0 CH1G[V] CH1G[V] 3.40 2.0 VREGA=3.22.9V Ta=25 1.0 VREGA=2.93.2V Ta=25 2.0 1.0 0.0 0.0 2.90 2.95 3.00 3.05 3.10 VREGA [V] 3.15 2.90 3.20 Figure.28 UVLO VREGA detect threshold voltage www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 2.95 3.00 3.05 3.10 VREGA [V] 3.15 3.20 Figure.29 UVLO VREGA reset threshold voltage 17/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL Typical Operating Characteristics(continued) 5.0 4.0 4.0 3.0 3.0 CH1G[V] CH1G[V] 5.0 2.0 VREGD=3.22.9V Ta=25 1.0 VREGD=2.93.2V Ta=25 2.0 1.0 0.0 0.0 2.90 2.95 3.00 3.05 3.10 VREGD [V] 3.15 3.20 2.90 5.0 5.0 4.0 4.0 3.0 3.0 2.0 VCC=7V CTL=3.01.0V Ta=25 1.0 3.00 3.05 3.10 VREGD[V] 3.15 3.20 Figure.31 UVLO VREGD reset threshold voltage VREGA[V] VREGA[V] Figure.30 UVLO VREGD detect threshold voltage 2.95 2.0 VCC=7V CTL=1.03.0V Ta=25 1.0 0.0 0.0 1.00 1.40 1.80 2.20 CTL1,2,3,4 [V] 2.60 3.00 1.00 Figure.32 CTL OFF threshold voltage www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 1.40 1.80 2.20 CTL1,2,3,4 [V] 2.60 3.00 Figure.33 CTL ON threshold voltage 18/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL Typical Operating Characteristics(continued) 200.0 200.0 175.0 150.0 150.0 25 125.0 ON RESISTANCE[mohm] ON RESISTANCE[mohm] VCC=7V ILx1=150mA 175.0 85 -30 100.0 75.0 50.0 VCC=7V ILx1=-1-50mA 25.0 125.0 100.0 75.0 85 50.0 25.0 -30 0.0 0.0 0 10 20 30 ILx1 [mA] 40 50 0 10 Figure.34 Lx1 High side FET RON (Ta=-30, 25, 85) 200.0 175.0 175.0 85 25 -30 100.0 75.0 50.0 VCC=7V ILx2=-1-50mA 25.0 40 50 VCC=7V ILx2=150mA 150.0 ON RESISTANCE[mohm] 125.0 20 30 ILx1 [mA] Figure.35 Lx1 Low side FET RON (Ta=-30, 25, 85) 200.0 150.0 ON RESISTANCE[mohm] 25 125.0 100.0 85 75.0 25 50.0 25.0 -30 0.0 0.0 0 10 20 30 ILx2 [mA] 40 0 50 Figure.36 Lx2 High side FET RON (Ta=-30, 25, 85) www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 10 20 30 ILx2 [mA] 40 50 Figure.37 Lx2 Low side FET RON (Ta=-30, 25, 85) 19/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL Typical Operating Characteristics(continued) 200.0 200.0 VCC=7V ILx31=-1-50mA 175.0 150.0 150.0 85 ON RESISTANCE[mohm] ON RESISTANCE[mohm] VCC=7V ILx31=150mA 175.0 125.0 25 100.0 -30 75.0 50.0 25.0 125.0 100.0 75.0 85 25 50.0 25.0 -30 0.0 0.0 0 10 20 30 ILx31[mA] 40 50 0 10 Figure.38 Lx31 High side FET RON (Ta=-30, 25, 85) 250.0 20 30 ILx31[mA] 50 Figure.39 Lx31 Low side FET RON (Ta=-30, 25, 85) 200.0 85 225.0 VCC=7V ILx32=150mA 175.0 25 200.0 40 ON RESISTANCE[mohm] ON RESISTANCE[mohm] 150.0 175.0 -30 150.0 125.0 100.0 75.0 50.0 VCC=7V ILx32=-1-50mA 25.0 0.0 125.0 100.0 75.0 85 25 50.0 -30 25.0 0.0 0 10 20 30 ILx32 [mA] 40 50 0 Figure.40 Lx32 High side FET RON (Ta=-30, 25, 85) www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 10 20 30 ILx32 [mA] 40 50 Figure.41 Lx32 Low side FET RON (Ta=-30, 25, 85) 20/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL Typical Operating Characteristics(continued) 200.0 200.0 175.0 150.0 ON RESISTANCE[mohm] ON RESISTANCE[mohm] 150.0 25 125.0 -30 100.0 75.0 50.0 VCC=7V ILx4=-1-50mA 25.0 0.0 125.0 100.0 85 75.0 25 50.0 -30 25.0 0.0 0 10 20 30 ILx4[mA] 40 0 50 10 20 30 ILX4 [mA] 40 50 Figure.43 Lx4 Low side FET RON (Ta=-30, 25, 85) Figure.42 Lx4 High side FET RON (Ta=-30, 25, 85) 300 300 250 250 200 200 RESISTANCE[ohm] RESISTANCE[ohm] VCC=7V ILx4=150mA 175.0 85 85 150 25 100 50 85 150 25 100 50 -30 -30 0 0 4 6 8 10 VCC [V] 12 14 4 Figure.44 Lx1 discharge SW RON (Ta=-30, 25, 85) www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 6 8 10 VCC [V] 12 14 Figure.45 Lx2 discharge SW RON (Ta=-30, 25, 85) 21/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL 300 300 250 250 200 200 RESISTANCE[ohm] RESISTANCE[mohm] Typical Operating Characteristics(continued) 85 150 25 100 50 85 150 25 100 50 -30 -30 0 0 4 6 8 10 VCC [V] 12 14 4 Figure.46 Vo3 discharge SW RON (Ta=-30, 25, 85) www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 6 8 10 VCC [V] 12 14 Figure.47 Lx4 discharge SW RON (Ta=-30, 25, 85) 22/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL Efficiency 100 100 90 90 80 80 70 70 60 60 50 40 30 50 10 VCC=7V VCC=10V 40 VCC=14V 30 fosc=1000kHz(RT=82k) VCC=4,7,10,14V Vo1=1.1V L:4.7uH C5-K3LGA(MITSUMI) 20 VCC=4V efficiency[%] efficiency[%] VCC=4V VCC=7V VCC=10V VCC=14V fosc=1000kHz(RT=82k) VCC=4,7,10,14V Vo2=1.5V L:4.7uH C5-K3LGA(MITSUMI) 20 10 0 0 10 100 1000 10000 10 100 1000 10000 load current[mA] load current[mA] Figure.48 Efficiency - load current CH1 Vo1=1.1V Figure.49 Efficiency - load current CH2 Vo2=1.5V 100 100 90 90 80 80 70 70 60 60 50 50 VCC=7V VCC=10V 40 VCC=10V VCC=14V 30 fosc=1000kHz(RT=82k) VCC=4,7,10,14V Vo3=5.0V L:4.7uH C5-K3LGA(MITSUMI) 20 VCC=7V 40 VCC=14V 30 VCC=4V efficiency[%] efficiency[%] VCC=4V fosc=1000kHz(RT=82k) VCC=4,7,10,14V Vo4=3.3V L:4.7uH C5-K3LGA(MITSUMI) 20 10 10 0 0 10 100 1000 10 10000 load current[mA] 1000 10000 load current[mA] Figure.50 Efficiency - load current CH3 Vo3=5.0V www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 100 Figure.51 Efficiency - load current CH4 Vo4=3.3V 23/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL Block explanation DCDC Block(4channels) Followings is specification of each channel of this IC. CH1 CH2 CH3 CH4 Type Buck Buck Buck-Boost Buck Mode Synchronous rectifier FET constitution Current Current Voltage Current Internal P/N Internal P/N Internal P/N Internal P/N Softstart Internal counter Internal counter Internal counter Internal counter ON/OFF control Independent Independent Independent Independent Table.1 specification of each channel VREGA,VREGD,VREGB Block VREGA is an internal regulator of 3.5V output. VREGD supply 3.5V gate bias voltage of Low side internal FET, VREGB supply PVCC - 3.5V gate bias voltage of High side internal FET. Bypass these regulators to GND(VREGB to PVCC) with a capacitor between 0.47F and 2.2F. We recommend capacitor of 1.0F. Oscillator Block OSC generates triangular waveform (slope waveform) with a resistor connected to RT terminal for setting frequency and inputs into PWM comparator of each CH. Swithing frequency is set to 1.0MHz at RT = 82k. Refer to the way of detailed setting on p.26. When CTL is turned ON with SYNC terminal input external clock, DC/DC converter switches at the frequency of the clock input to SYNC terminal. Refer to p.29 for details of external synchronization. ERRORAMP Block Error amplifiers monitor output voltage at INV terminals and output amplified error voltage at internal EOUT node. Reference voltage of CH1 is 0.6V and accuracy is 1.67%, and 0.8V for CH2-4 and accuracy is 1.25%. Refer to p.26 for setting of output voltage. PWM Comparator Block PWM comparators control switching duty of output FET by comparing SLOPE waveform from OSC and output voltage of error amplifier. Current Mode Control Block CH1, 2 and 4 operate with current mode PWM. In current mode DC/DC converter, main FET of synchronous rectifier turns on at the edge of main clock, and turn off after detection of peak current in current comparator. Buck-Boost control Block a block for controlling the switching duty of buck-boost DC/DC of CH3. This block consists of PWM comparator to compare 1.0MHz SLOPE waveform and output of error amplifier, and Logic circuit to convert the output of PWM comparator to ON/OFF signal of 4 internal output FETs. Softstart Block(SS) Softstart block prevents the inrush current to charge the output capacitor at DC/DC start-up by softly starting up the reference voltage of error amplifier. CH1 is 1.4msec(typ. at fosc=1MHz) and CH2-4 are 1.9msec(typ. at fosc=1MHz.) Only CH1 has 50usec of delay time at stop. As in Figure .6, output is turned off after 50usec has passed from CTL1 is turned to L. www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 24/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL Channel Control Block(CH_CTL) CTL1-4 terminals enable output of each channels to turn ON/OFF individually. When voltage of each terminal is over 2.5V and less than VCC voltage each channel turns ON, and when the terminals are open or voltage of them is over -0.3V and less than 0.8V, it turns OFF. When all channels are turned OFF, IC becomes stand-by state. Each terminal contains pull-down resistor of 400k (typ.) Note that the output voltage of CH3 may swing when CH4 is turned OFF while CH3 is operating, so use this IC after confirming with much care that does not cause any problems in that situation. CTL 1 2 LX 3 4 1 2 31 32 4 VREGA VREGD VREGB OSC L L L L L L Z L L N N N N H L L L A L Z L L A A A A L H L L L A Z L L A A A A L L H L L L A A L A A A A L L L H L L Z L A A A A A H H H H A A A A A A A A A Table.2 CTL table Short Circuit Protection Circuit(SCP) Output short protect circuit with timer latch. When output of any channels drop, output of error amplifier rises. And after it reaches to 3.0V (typ.), SCP block start to charge the output capacitor at SCP terminal with current of 5uA output of all channels stop when the terminal voltage of SCP reaches to 0.5V. To release short circuit protection latch state, turn CTL terminal to "L" level and return to "H", or restart power supply. When you don't use short circuit protection, connect SCP terminal to GND. Refer to p.11, 12 about timing chart of SCP operation. Undervoltage Lock Out(UVLO) Undervoltage lock out prevents IC malfunctions that could otherwise occur due to power supply fluctuation at power on or abrupt power off. This system turns off output of each channel and fix the output voltage of error amplifier to "L" when the VCC voltage becomes lower than 3.4V(typ.), or anyone of VREGA, VREGD voltage becomes lower than 3.0V(typ.) Threshold voltage of each UVLO has hysteresis of 0.1V to prevent malfunctions in transient swing of power supply around threshold voltage. Refer to p.10 about timing chart of UVLO operation. Thermal Shut Down(TSD) The thermal shutdown circuit is protection the IC against thermal runaway and heat damage. When the temperature reaches to TSD threshold (typ. 175), the output of all channels, VREGA, VREGD, VREGB are turned off. Threshold of TSD has hysteresis of 25 to prevent malfunctions in transient swing of temperature around threshold. Notice is written in p.34. Power Good Circuit(PG) PG is a NMOS open drain form terminal and when SCP is detected, inner NMOS FET turns on and pull-down with 350(typ.) Refer to p.11,12 about PG operation. CH1,2 Softstart Good Circuit(CH1G,CH2G) CH1G, CH2G is inverter output form terminals power supply of them is VREGA and they detect finish of softstart of CH1 and CH2. When CTL terminal of each channel is L or while output voltage is lower than 90% of setting output voltage after CTL terminals are turned on, the output of these terminals is L. And at the end of softstart, when output voltage becomes greater than 90% of setting output voltage, the output voltage of CH1,2G terminal turns to H.( As shown in Figure. 57, CH1G output turns to L when CTL1 is turned off, but while CH1 is in the stop delay time, output of CH1 continues.) Note that the output of CH1,2G terminals is kept H when output voltage drops below 90% of setting output voltage after softstart finished. Startup sequence of each channel can be controlled by connecting CH1,2G terminals to CTL terminals of other channels. Refer to p.30 about timing chart of CH1,2 softstart good function. Light Load Mode Control Circuit(SEL) Control mode of CH2 and 4 is selected between PWM mode and light load mode by SEL terminal. When voltage of SEL terminal is over 2.5V and less than VCC voltage, light load mode is enabled. And when the terminal is open or voltage of that is over -0.3V and less than 0.8V, it is disabled. SEL terminal contains pull-down resistor of 400k (typ.) When you use this function, we recommend to short SEL terminal to VREGA. Over Current Protection Circuit(OCP) OCP prevents destruction of IC from over current flow through internal FET in overload situation or output shorted to GND by detecting input current. When OCP is detected, output switching duty is down to minimum duty, and thus, input current is limited and output voltage decrease. Finally, SCP operates and all DC/DC output stops safely. Refer to p.4 about detect current limit. About CH3, OCP is detected when output current becomes greater than 1.8A under the conditions of VO3 output voltage setting is 5.0V. . www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 25/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL peripheral components setting Setting the switching frequency The switching frequency FOSC is set by the resistor connected to RT terminal. Connect 82k to set to 1.0MHz. Switching frequency is calculated as below. Confirm the frequency with IC after select RT value with this equation. Fosc = 82 RRT x 1000[kHz] Setting output voltages Figure.52 Setting output voltages Output voltages of each channel are determined by feedback resistor R1 and R2 as equation (1) for CH1 and (2) for CH2 to 4. This IC contains phase compensation, so choose sum of R1 and R2 value between 90k to 1M for CH1 and CH2, 100k to 500k for CH3 and 70k to 300k for CH4, and sufficiently confirm there is no abnormal oscillations. Terminal manipulate method for not used channel Set each terminal of the channel as below when you don't use. Figure.53 Terminal manipulate method for not used channel www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 26/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL Setting of SCP timer Monitoring the output voltages of error amplifier (EOUT voltage), if the voltages become over 3.0V(typ.), the output of SCPCOMP turns to L, and transistor Q1 will turn off. Thus the current of 5uA is supplied to Cscp. DC/DC outputs stop when voltage of Cscp reaches to the threshold voltage (Vtsc0.5V). The time from short circuit detection to outputs stop is determined as below. To reset from SCP latch state, turn CTL to L. Refer to p.11, 12 about SCP operating timing chart. Vo1 INV1 EOUT1 Vo2 INV2 EOUT2 Vo3 INV3 EOUT3 5uA SCP Vo4 CSCP Q1 INV4 3.0V EOUT4 Figure.54 Short Circuit Protection About output voltage setting of CH1,2 and 4 The switching duty of CH1, 2 and 4 can reach to 100% but they have maximum duty cycle between 90 to 95%. Thus, when voltage difference between input and output is small or load current is large under the condition of SCP is enabled, SCP may operate. Normally, switching ON Duty of buck converter is calculated as VOUT / VIN, but in fact, it is VOUT / (VIN-IoxRon) with there is load current. When switching duty become above maximum duty, the output switching turns to 100% duty, but the state of 100% duty output is only allowed transiently before SCP operates. So, set output duty not to exceed the maximum duty cycle. www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 27/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL Selection of inductor We recommend the ones of those current rating is sufficiently larger than the peak current value Ipeak written as below and DCR is small and shield type. The inductor value has much influence to the ripple current. As shown in the equation below, the larger the inductor value is or higher the switching frequency is, the smaller ripple current becomes IL Figure.55 ripple current of inductor Generally, choose inductance value as that the ripple current is within 20% to 50% of the output maximum current. If the inductor current exceeds the maximum rating current of the inductor, a saturation of inductor occurs and may cause an abnormal degradation of efficiency or oscillation. So, choose inductor value with sufficient margin not to peak current exceeds maximum rating current of the inductor. Selection of output capacitor We recommend a low ESR ceramic capacitor as output capacitor to reduce output ripple voltage. And , under consideration of its DC bias characteristics, choose the ones of those maximum rating voltage is sufficiently higher than output voltage. The output ripple voltage is calculated as in the equation below with a ceramic capacitor. Confirm the ripple voltage with IC after choose the capacitor with this equation to the output ripple voltage is within allowed value. www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 28/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL Setting of external synchronization When you use external synchronization function, stop external clock after IC stops. If it is stopped before IC stops, discharge of triangle waveform (slope waveform) is interrupted and the internal oscillator stops, thus, DC/DC stops. Additionally, force power supply voltage of IC before start to input the external clock to SYNC terminal. There is an anti-ESD diode between SYNC terminal and VCC terminal, so, before supply voltage is forced, current flows from SYNC terminal to VCC terminal through the diode. The external synchronization function, the switching frequency of DC/DC is synchronized with any external clock, works by turning on CTL under the condition of inputting external clock pulse to SYNC terminal. This IC controls to increase RTSS voltage in order to maintain the top voltage of the internal triangle waveform when external synchronization is used. If the frequency of input clock is out of the possible RTSS voltage range, the IC cannot maintain the height of internal slope waveform, so, set the frequency of input clock within 20% higher than the frequency that is determined by the resistor connected to RT terminal as below.. frequency set by resistor at RT frequency input to SYNC (frequency set by resistor at RT x 1.2) The block of RTSS terminal start with the time constant determined by the capacitor connected to RTSS terminal. To prevent malfunction in startup, internal SS nodes are discharged before RTSS voltage reaches to 0.35V. And also, before RTSS voltage reaches to 0.35V, RTSS output current increase to about 60uA to speed up the startup. The time RTSS voltage reaches to 0.35V is calculated as following equation. (ex. TRTSS160sec @ CRTSS=10000pF) After RTSS voltage reaches to 0.35V, RTSS output current decrease to 5.0uA, and the time RTSS voltage reached to 0.5V is calculated as following equation.. (ex. TRTSS2300sec @ CRTSS=10000pF) RTSS voltage is maintained by turning current sink and source repeatedly, and switch of current flow is controlled by rise edge of external clock, so, if the capacitor value connected to RTSS terminal is too small,(especially switching frequency is low) the range of voltage swing from one clock to the next may increase. And that may cause inaccuracy of, for example, maximum duty. We recommend around 10000pF when switching frequency is around 1MHz. Note that if you select a larger value than that, stability will increase but the time before output softstart lengthens. www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 29/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL CH1, 2 Softstart Good function CH1 and CH2 have softstart good function that detects the finish of softstart of each channel, and CH1G terminal and CH2G terminal are output terminal of each. When CTL terminal of each channel is off or while output voltage is lower than 90% of setting output voltage after CTL terminals are turned on, the output of these terminals is L. And at the end of softstart, when output voltage becomes greater than 90% of setting output voltage, the output voltage of CH1,2G terminal turns to H. As shown in Figure. 56 below, we can control the start up order of each channel by connecting CH1G or CH2G terminal to CTL terminal of other channels. If you connect CH1G terminal to CTL2 and CTL4, after softstart of CH1 finish, CTL2 and CTL4 turn to H and CH2 and 4 start. After that, CH2 finish its softstart, and thus, CTL3 it is connected to CH2G become H and CH3 start operating. In the off sequence, if you turn CTL1 off, all channels will stop (Figure.57) When you don't use CH1,2 softstart good function, make CH1G, CH2G terminal opened. CTL1 CH1 stop 50usec after CTL1 OFF. 90% Vo1 CH1G =CTL2/CTL4 90% Vo2/Vo4 CH2G =CTL3 Vo3 Figure.56 example of startup sequence control When Vo1 reaches to 90% of setting voltage, CH1G turn L to H and CH2,4 turn ON. When Vo2, 4 reach to 90% of setting voltage, CH2G turns L to H and CH3 turns ON. CH1G turns H to L by CTL1 OFF and CH2,4 turn OFF. And that, CH2G turns H to L , so CH3 turns OFF Figure.57 timing chart of startup sequence control www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 30/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL PCB layout considerations Connect input capacitor(bypass capacitor : Cin_bp) to PVCC and PGND through shortest line. Its aim is to shorten the current loop and reduce parasitic impedance. Switching current is supplied from power supply Vin(Cin), but there are parasitic impedance or inductance in capacitors or boards, so current supply from bypass capacitor put near the IC when current flow is rapidly changed. It is a desirable constitution that a large capacitance electrolytic capacitor is used as Cin and a ceramic capacitor is used as a bypass capacitor. Figure.58 effect of input capacitor Layout GND and PGND line wide and short as possible. In this IC, subcontact is connected GND and PGND. Because of this, if you separate GND and PGND, and connect them at one point, GND and PGND are connected inside of IC through subcontact. And if inner impedance is lower than impedance of outer connection, the current of PGND terminal flows down to GND terminal. This may have an effect on internal bandgap voltage or oscillator and so on. So,it is needed to reduce outer impedance of PGND line lower than inner impedance of GND line and layout ,GND and PGND line wide and short. Figure.59 effect of common impedance To avoid interference, layout between feedback resistor and feedback terminals short as possible. An interference of noise to feedback terminals(INV1-4) may cause output abnormal oscillation. An interference of noise to feedback terminals(INV1-4) may cause output abnormal oscillation. Terminal voltage of VCC and PVCC not exceed absolute maximum ratings. If input capacitor are placed far from IC, parasitic inductance of PCB may cause ringing and the terminal voltage exceed the absolute maximum ratings. For reference, place input capacitor within 5.0mm from IC under the condition of that, thickness of PCB pattern is 35um, width of it is 1.0mm. www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 31/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL Pin equivalent circuit Name Pin equivalent circuit VCC G6 G5 G4 B3 VCC GND PVCC PGND Name Pin equivalent circuit VCC PVCC GND PGND C4 D3 C6 C5 C7 CTL1 CTL2 CTL3 CTL4 SEL SEL CTL1-4 GND VREGA F3 D4 E4 E5 INV1 INV2 INV3 INV4 INV1-4 E3 SYNC B5 PG GND VREGA B4 SCP VREGA SCP GND VREGA VREGA D5 RTSS VREGA F6 RTSS RT VREGA RT GND GND PVCC for VREGD VCC F5 G3 VCC VCC PVCC VCC VREGA VREGD VREGA VREGD F4 VREGB GND Figure.60 Pin equivalent circuit 1 www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 32/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL Name G1,G2 A1,A2 F7,G7 F4 E1,F1 B1,B2 E6,E7 D1,D2 C1,C2 D6,D7 Pin equivalent circuit Name PVCC1 PVCC2 PVCC4 VREGB Lx1 Lx2 Lx4 PGND1 PGND2 PGND4 A3 F4 A4 A5,A6 Pin equivalent circuit PVCC3 VREGB Lx31 PGND3 VO3 VREGA B7 A7,B6 A5,A6 VO3 Lx32 PGND3 F2 E2 Lx32 CH1G CH2G CH1G CH2G PGND3 GND GND Figure.61 Pin equivalent circuit 2 Thermal Derating Curves PowerDissipation:Pd[W] 2 When mounted on a 50mm x 50mm x 1.75mm glass epoxy 8layers PCB. Should be derated by 12.5mW/ Ta=25 or more. Heat design should consider tolerance dissipation during actual use and margins which should be set plenty of room. 1.5 1 0.5 0 0 25 50 75 100 125 150 AmbientTemperature Ta[] Figure.62 Power dissipation www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 33/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL Usage Notes 1.) Absolute maximum ratings This product is produced with strict quality control. However, the IC may be destroyed if operated beyond its absolute maximum ratings. If the device is destroyed by exceeding the recommended maximum ratings, the failure mode will be difficult to determine. (E.g. short mode, open mode.) Therefore, physical protection counter-measures (like fuse) should be implemented when operating conditions beyond the absolute maximum ratings anticipated. 2.) GND potential Make sure GND is connected at lowest potential. All pins must not have voltage below GND. 3.) Thermal design Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions. 4.) Pin shorts and mounting errors Use caution direction and position the IC for mounting on printed circuit boards. Improper mounting may result in damage the IC. In addition, Output-output short and output-power supply/ground short condition may destroy the IC. 5.) Actions in strong magnetic field Exposing the IC within a strong magnetic field are may cause malfunction. 6.) Common impedance Power supply and ground wiring should reflect consideration of the need to lower common impedance and minimize ripple as much as possible. (by making wiring as short and wide as possible or rejecting ripple by incorporating inductance and capacitance.) 7.) Thermal shutdown circuit (TSD circuit) This IC incorporates a built-in thermal shutdown circuit (TSD circuit.) The TSD circuit is designed only to shut the IC off to prevent from thermal runaway. It is not designed to protect the IC or guarantee its operation. Do not continue to use the IC after operating this circuit or use the IC in an environment where the operation of this circuit is assumed. 8.) Rush current at the time of power supply injection An IC which has plural power supplies, or CMOS IC could have momentary rush current at the time of power supply injection. Please take care about power supply coupling capacity and width of power supply and GND pattern wiring. 9) Influence by strong light When large amount of light like strobe is come in, IC can act under wrong operation. Please make light removal system and check operations adequately. 10) IC terminal input . This IC is a monolithic IC, and between each element there is a P+ isolation and P substrate for element separation. There is a P-N junction formed between this P-layer and each element's N-layer, which makes up various parasitic elements. For example, when a resistor and a transistor are connected with a terminal as in Figure. 63: When GND(terminal A) at the resistor, or GND(terminal B) at the transistor (NPN), the P-N junction operates as a parasitic diode. Also, when GND(terminal B) at the transistor, a parasitic NPN transistor operates by the N-layer of other elements close to the aforementioned parasitic diode. With the IC's configuration, the production of parasitic elements by the relationships of the electrical potentials is inevitable. The operation of the parasitic elements can also interfere with the circuit operation, leading to malfunction and even destruction. Therefore, uses which cause the parasitic elements to operate, such as applying voltage to the input terminal which is lower than the GND (P-substrate), should be avoided. transistor(NPN) Terminal B C Terminal A B resistor E GND N N P substrate N P P P N N Terminal P P P N Parasitic element P substrate Parasitic element Parasitic element GND GND Figure. 63 Simplified structure of bipolar IC www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 34/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet BD9866GUL Ordering Information B D 9 8 6 6 G U L E2 Package GUL:VCSP50L3 Part Number Packaging and forming specification E2:Embossed tape and reel Tape Embossed carrier tape Quantity 2,500pcs / Reel Direction of feed E2 1234 1234 Reel 1234 1234 1 Pin 1234 1234 Direction of feed Figure. 65 Direction of feed Figure. 64 Package dimensions Marking Diagram Figure. 65 Marking diagram www.rohm.com (c) 2013 ROHM Co., Ltd. All rights reserved. TSZ2211115001 35/35 TSZ02201-0B2B0A400010-1-2 17.APR.2013 Rev.001 Datasheet Notice Precaution on using ROHM Products 1. Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment, OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you (Note 1) , transport intend to use our Products in devices requiring extremely high reliability (such as medical equipment equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property ("Specific Applications"), please consult with the ROHM sales representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any ROHM's Products for Specific Applications. (Note1) Medical Equipment Classification of the Specific Applications JAPAN USA EU CHINA CLASS CLASSb CLASS CLASS CLASS CLASS 2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which a failure or malfunction of our Products may cause. The following are examples of safety measures: [a] Installation of protection circuits or other protective devices to improve system safety [b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. Our Products are designed and manufactured for use under standard conditions and not under any special or extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of any ROHM's Products under any special or extraordinary environments or conditions. If you intend to use our Products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents [b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust [c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves [e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items [f] Sealing or coating our Products with resin or other coating materials [g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] Use of the Products in places subject to dew condensation 4. The Products are not subject to radiation-proof design. 5. Please verify and confirm characteristics of the final or mounted products in using the Products. 6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied, confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect product performance and reliability. 7. De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual ambient temperature. 8. Confirm that operation temperature is within the specified range described in the product specification. 9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in this document. Precaution for Mounting / Circuit board design 1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product performance and reliability. 2. In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the ROHM representative in advance. For details, please refer to ROHM Mounting specification Notice - GE (c) 2014 ROHM Co., Ltd. All rights reserved. Rev.002 Datasheet Precautions Regarding Application Examples and External Circuits 1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the characteristics of the Products and external components, including transient characteristics, as well as static characteristics. 2. You agree that application notes, reference designs, and associated data and information contained in this document are presented only as guidance for Products use. Therefore, in case you use such information, you are solely responsible for it and you must exercise your own independent verification and judgment in the use of such information contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. Precaution for Electrostatic This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron, isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control). Precaution for Storage / Transportation 1. Product performance and soldered connections may deteriorate if the Products are stored in the places where: [a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [b] the temperature or humidity exceeds those recommended by ROHM [c] the Products are exposed to direct sunshine or condensation [d] the Products are exposed to high Electrostatic 2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is exceeding the recommended storage time period. 3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of which storage time is exceeding the recommended storage time period. Precaution for Product Label QR code printed on ROHM Products label is for ROHM's internal use only. Precaution for Disposition When disposing Products please dispose them properly using an authorized industry waste company. Precaution for Foreign Exchange and Foreign Trade act Since our Products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act, please consult with ROHM representative in case of export. Precaution Regarding Intellectual Property Rights 1. All information and data including but not limited to application example contained in this document is for reference only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. ROHM shall not be in any way responsible or liable for infringement of any intellectual property rights or other damages arising from use of such information or data.: 2. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any third parties with respect to the information contained in this document. Other Precaution 1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM. 2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of ROHM. 3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the Products or this document for any military purposes, including but not limited to, the development of mass-destruction weapons. 4. The proper names of companies or products described in this document are trademarks or registered trademarks of ROHM, its affiliated companies or third parties. Notice - GE (c) 2014 ROHM Co., Ltd. All rights reserved. Rev.002 Datasheet General Precaution 1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents. ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny ROHM's Products against warning, caution or note contained in this document. 2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior notice. Before purchasing or using ROHM's Products, please confirm the la test information with a ROHM sale s representative. 3. The information contained in this doc ument is provi ded on an "as is" basis and ROHM does not warrant that all information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information. Notice - WE (c) 2014 ROHM Co., Ltd. All rights reserved. Rev.001 Datasheet bd9866gul - Web Page Buy Distribution Inventory Part Number Package Unit Quantity Minimum Package Quantity Packing Type Constitution Materials List RoHS bd9866gul VCSP50L3 2500 2500 Taping inquiry Yes