TSC2006 www.ti.com ......................................................................................................................................................... SBAS415C - JUNE 2007 - REVISED MARCH 2009 1.2V to 3.6V, 12-Bit, Nanopower, 4-Wire TOUCH SCREEN CONTROLLER with SPITM Interface FEATURES APPLICATIONS * * * * * * * * * * * * * 1 23 * * * * * * (1) 4-Wire Touch Screen Interface Ratiometric Conversion Single 1.2V to 3.6V Supply Preprocessing to Reduce Bus Activity High-Speed SPI-Compatible Interface Internal Detection of Screen Touch Register-Based Programmable: - 10-Bit or 12-Bit Resolution - Sampling Rates - System Timing On-Chip Temperature Measurement Touch Pressure Measurement Auto Power-Down Control Low Power: - 707W at 1.8V, 50SSPS - 544W at 1.6V, 50SSPS - 280W at 1.2V, 50SSPS - 69W at 1.6V, 8.2kSPS Eq. Rate - 43W 1.2V, 8.2kSPS Eq. Rate Enhanced ESD Protection: - 8kV HBM - 1kV CDM - 25kV Air Gap Discharge - 12kV Contact Discharge 4 x 4 QFN-20 and 0.4mm 4 x 4 XTQFN-20(1) Packages Personal Digital Assistants Cellular Phones Portable Instruments Point-of-Sale Terminals MP3 Players, Pagers Multiscreen Touch Control Systems DESCRIPTION The TSC2006 is a very low-power touch screen controller designed to work with power-sensitive, handheld applications that are based on advanced low-voltage processors. It works with a supply voltage as low as 1.2V, which can be supplied by a single-cell battery. It contains a complete, ultralow-power, 12-bit, analog-to-digital (A/D) resistive touch screen converter, including drivers and the control logic to measure touch pressure. In addition to these standard features, the TSC2006 offers preprocessing of the touch screen measurements to reduce bus loading, thus reducing the consumption of host processor resources that can then be redirected to more critical functions. The TSC2006 supports an SPI-compatible serial bus up to 25MHz. It offers programmable resolution of 10 or 12 bits to accommodate different screen sizes and performance needs. The TSC2006 is available in a miniature 20-lead, 4 x 4 QFN package, and is characterized for the -40C to +85C industrial temperature range. XTQFN package available Q4, 2009. U.S. Patent No. 6246394; other patents pending. PENIRQ VREF Touch Screen Drivers Interface Mux SAR ADC TEMP AUX Internal Clock Pre-Processing X+ XY+ Y- DAV PINTDAV CS SPI Serial Interface and Control SCLK SDI RESET SDO 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. SPI is a trademark of Motorola, Inc. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2007-2009, Texas Instruments Incorporated TSC2006 SBAS415C - JUNE 2007 - REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION (1) PRODUCT TYPICAL INTEGRAL LINEARITY (LSB) TYPICAL GAIN ERROR (LSB) NO MISSING CODES RESOLUTION (BITS) TSC2006 -0.8 to +1.4 +0.1 11 (1) PACKAGE TYPE PACKAGE DESIGNATOR SPECIFIED TEMPERATURE RANGE PACKAGE MARKING 20-Pin, 4 x 4 QFN RTJ -40C to +85C TSC2006I ORDERING NUMBER TRANSPORT MEDIA, QUANTITY TSC2006IRTJT Small Tape and Reel, 250 TSC2006IRTJR Tape and Reel, 3000 For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet, or see the TI website at www.ti.com. ABSOLUTE MAXIMUM RATINGS (1) Over operating free-air temperature range (unless otherwise noted). Voltage range TSC2006 UNIT Analog input X+, Y+, AUX to SNSGND -0.4 to SNSVDD + 0.1 V Analog input X-, Y- to SNSGND -0.4 to SNSVDD + 0.1 V SNSVDD to SNSGND -0.3 to 5 V SNSVDD to AGND -0.3 to 5 V I/OVDD to DGND -0.3 to 5 V -2.40 to +0.3 V Digital input voltage to DGND SNSVDD to I/OVDD -0.3 to I/OVDD + 0.3 V Digital output voltage to DGND -0.3 to I/OVDD + 0.3 V Power dissipation (TJ Max - TA)/JA Thermal impedance, JA QFN package 39.97 C/W Operating free-air temperature range, TA -40 to +85 C Storage temperature range, TSTG -65 to +150 C +150 C Vapor phase (60 sec) +215 C Infrared (15 sec) +220 C X+, X-, Y+, Y- 12 kV X+, X-, Y+, Y- 25 kV Junction temperature, TJ Max Lead temperature IEC contact discharge (2) IEC air discharge (2) (1) (2) 2 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated is not implied. Exposure to absolute-maximum rated conditions for extended periods may affect device reliability. Test method based on IEC standard 61000-4-2. Contact Texas Instruments for test details. Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 TSC2006 www.ti.com ......................................................................................................................................................... SBAS415C - JUNE 2007 - REVISED MARCH 2009 ELECTRICAL CHARACTERISTICS At TA = -40C to +85C, SNSVDD = VREF = +1.2V to +3.6V, I/OVDD (1) = +1.2V to +3.6V, unless otherwise noted. TSC2006 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT AUXILIARY ANALOG INPUT Input voltage range 0 Input capacitance VREF 12 Input leakage current -1 V pF +1 A 12 Bits +3 LSB (2) A/D CONVERTER Resolution Programmable: 10 or 12 bits No missing codes 12-bit resolution 11 Integral linearity -3 Differential linearity Bits -1.2 to 0.7 -0.7 to 0.6 4 LSB Offset error SNSVDD =1.6V, VREF = 1.6V, fSCLK = 10MHz, filter off -5 2.2 +5 LSB Gain error SNSVDD =1.6V, VREF = 1.6V, fSCLK = 10MHz, filter off -3 0.1 +3 LSB REFERENCE INPUT VREF range 1.2 VREF input current drain Non-continuous AUX mode, SNSVDD = VREF = 1.6V, TA = +25C, fADC = 2MHz, fSCLK = 10MHz Input impedance A/D converter not converting SNSVDD V 2.7 A 1 G 49 k Y+, X+ 6 Y-, X- 5 TOUCH SENSORS PENIRQ 50k pull-up resistor, TA = +25C, SNSVDD = 3V, VREF = 2.5V RIRQ Switch on-resistance Switch drivers drive current (3) 100ms duration 50 mA INTERNAL TEMPERATURE SENSOR Temperature range -40 Differential method (4) Resolution TEMP1 (5) Differential method (4) Accuracy TEMP1 (5) +85 C SNSVDD = 1.6V 0.3 C/LSB SNSVDD = 3V 1.6 C/LSB SNSVDD = 1.6V 0.3 C/LSB SNSVDD = 3V 1.6 C/LSB SNSVDD = 1.6V 3 C/LSB SNSVDD = 3V 2 C/LSB SNSVDD = 1.6V 3 C/LSB SNSVDD = 3V 2 C/LSB INTERNAL OSCILLATOR SNSVDD = 1.2V, TA = +25C Clock frequency, fOSC SNSVDD = 1.6V 3.2 3.3 SNSVDD = 3.0V, TA = +25C Frequency drift (1) (2) (3) (4) (5) 3.7 MHz 4.3 MHz 3.9 MHz SNSVDD = 12V 0.112 %/C SNSVDD = 1.6V -0.009 %/C SNSVDD = 3.0V -0.025 %/C I/OVDD must be SNSVDD. LSB means Least Significant Bit. With VREF = +2.5V, one LSB is 610V. Assured by design, but not tested. Exceeding 50mA source current may result in device degradation. Difference between TEMP1 and TEMP2 measurement; no calibration necessary. Temperature drift is -2.1mV/C. Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 3 TSC2006 SBAS415C - JUNE 2007 - REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com ELECTRICAL CHARACTERISTICS (continued) At TA = -40C to +85C, SNSVDD = VREF = +1.2V to +3.6V, I/OVDD = +1.2V to +3.6V, unless otherwise noted. TSC2006 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT DIGITAL INPUT/OUTPUT Logic family CMOS VIH VIL Logic level IIL 1.2V I/OVDD < 1.6V 0.7 x I/OVDD I/OVDD + 0.3 V 1.6V I/OVDD 3.6V 0.7 x I/OVDD I/OVDD + 0.3 V 1.2V I/OVDD < 1.6V -0.3 0.2 x I/OVDD V 1.6V I/OVDD 3.6V -0.3 0.3 x I/OVDD V -1 1 A SCLK pin or CS pin CIN 10 pF VOH IOH = 2 TTL loads I/OVDD - 0.2 I/OVDD V VOL IOL = 2 TTL loads 0 0.2 V ILEAK Floating output -1 1 A COUT Floating output 10 pF 1.2 3.6 V 1.2 SNSVDD V 625 A Data format Straight Binary POWER-SUPPLY REQUIREMENTS Power-supply voltage SNSVDD Specified performance I/OVDD (6) Filter off, M = W = 1, C[3:0] = (1,0,0,0), RM = 1, CL[1:0] = (0,1), cont AUX mode, fADC = 2MHz, without reading data register Quiescent supply current (7) (8) SNSVDD = I/OVDD = VREF = 1.6V 500 TA = +25C, filter on, M = 15, W = 7, PSM = 1, C[3:0] = (0,0,0,0), RM = 1, CL[1:0] = (0,1), BTD[2:0] = (1,0,1), 50SSPS, MAVEX = MAVEY = MAVEZ = 1, fADC = 2MHz, sensor drivers supply included SNSVDD = I/OVDD = VREF = 1.2V 233 A 340 A SNSVDD = I/OVDD = VREF = 3.0V 745 A TA = +25C, filter off, M = W = 1, PSM = 1, C[3:0] = (0,0,0,0), RM = 1, CL[1:0] = (0,1), BTD[2:0] = (1,0,1), 50SSPS, MAVEX = MAVEY = MAVEZ = 1, fADC = 2MHz, sensor drivers supply included SNSVDD = I/OVDD = VREF = 1.2V 215 A 318 A SNSVDD = I/OVDD = VREF = 3.0V 706 A TA = +25C, filter off, M = W = 1, C[3:0] = (0,1,0,1), RM = 1, CL[1:0] = (0,1), non-cont AUX mode, fADC = 2MHz, fSCLK = 5.5MHz SNSVDD = I/OVDD = VREF = 1.2V 272 A SNSVDD = I/OVDD = VREF = 1.6V 361 A SNSVDD = I/OVDD = VREF = 3.0V 694 A SNSVDD = I/OVDD = VREF = 1.2V, ~11.3kSPS effective rate 348 A SNSVDD = I/OVDD = VREF = 1.6V, ~12.7kSPS effective rate 469 A SNSVDD = I/OVDD = VREF = 3.0V, ~13.3kSPS effective rate 894 A SNSVDD = I/OVDD = VREF = 1.2V, ~1.17kSPS effective rate 36.0 A SNSVDD = I/OVDD = VREF = 1.6V, ~1.17kSPS effective rate 43.2 A SNSVDD = I/OVDD = VREF = 3.0V, ~1.17kSPS effective rate 78.6 A TA = +25C, CS high, SCLK = 0, SNSVDD = I/OVDD = VREF = 1.6V 0.023 TA = +25C, filter on, M = 7, W = 3, C[3:0] = (0,1,0,1), RM = 1, CL[1:0] = (0,1), MAVEAUX = 1, non-cont AUX mode, fADC = 2MHz, fSCLK = 3.5MHz, full speed TA = +25C, filter on, M = 7, W = 3, C[3:0] = (0,1,0,1), RM = 1, CL[1:0] = (0,1), MAVEAUX = 1, non-cont AUX mode, fADC = 2MHz, fSCLK = 3.5MHz, reduced speed (8.2kSPS equivalent rate) Power-down supply current (6) (7) (8) 4 x SNSVDD = I/OVDD = VREF = 1.6V x x SNSVDD = I/OVDD = VREF = 1.6V x 0.8 A I/OVDD must be SNSVDD. Supply current from SNSVDD. For detailed information on test condition parameter and bit settings, see the Digital Interface section. Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 TSC2006 www.ti.com ......................................................................................................................................................... SBAS415C - JUNE 2007 - REVISED MARCH 2009 PIN CONFIGURATION (1) SUBGND Y+ X+ SNSVDD VREF RTJ PACKAGE(1) QFN-20 (TOP VIEW) 15 14 13 12 11 X- 16 10 AGND Y- 17 9 AUX SNSGND 18 8 NC NC 19 7 I/OVDD CS 20 6 DGND TSC2006 1 2 3 4 5 SDO SCLK SDI PINTDAV RESET Thermal Pad The thermal pad is internally connected to SUBGND. The thermal pad can be connected to the analog ground or left floating. Keep the thermal pad separate from the digital ground, if possible. PIN ASSIGNMENTS PIN NO. PIN NAME I/O A/D 1 SDO I/O D Serial data output. This output is the MISO signal for the SPI protocol. 2 SCLK I D Serial clock input 3 SDI I D Serial data input. This input is the MOSI signal for the SPI protocol. 4 PINTDAV O D Interrupt output. Data available or PENIRQ, depending on setting. Pin polarity with active low. 5 RESET I D System reset. All register values reset to default values. 6 DGND Digital ground 7 I/OVDD Digital I/O interface voltage 8, 19 NC 9 AUX 10 AGND 11 VREF 12 SNSVDD 13 DESCRIPTION No connection I A Auxiliary channel input I A X+ I A X+ channel input 14 Y+ I A Y+ channel input 15 SUBGND 16 X- I A X- channel input 17 Y- I A Y- channel input 18 SNSGND 20 CS I D Analog ground External reference input Power supply for sensor drivers and other analog blocks Substrate ground (for ESD current) Sensor driver return Chip select. This input is the slave select (SS) signal for the SPI protocol. Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 5 TSC2006 SBAS415C - JUNE 2007 - REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com TIMING INFORMATION The TSC2006 supports SPI programming in mode CPOL = 0 and CPHA = 0. The falling edge of SCLK is used to change output (MISO) data and the rising edge is used to latch input (MOSI) data. Eight SCLKs are required to complete the Byte 1 command cycle, and 24 SCLKs are required for the Byte 0 command cycle. CS can stay low during the entire 24 SCLKs of a Byte 0 command cycle, or multiple mixed cycles of reading and writing of bytes and register accesses, as long as the corresponding addresses are supplied. CS (SS) tC(SCLK) tSU(SCLKF-CSR) tSU(CSF-SCLK1R) tWH(SCLK) tF tR tWL(SCLK) SCLK tWH(CS) tH(SCLKF-SDOVALID) SDO (MISO) MSB OUT tDIS(CSR-SDOZ) BIT 1 BIT 0 BIT 1 BIT 0 tD(CSF-SDOVALID) tSU(SDI-SCLKR) SDI (MOSI) tH(SDI-SCLKR) MSB IN NOTE: CPOL = 0, CPHA = 0, Byte 0 cycle requires 24 SCLKs, and Byte 1 cycle requires eight SCLKs. Figure 1. Detailed I/O Timing TIMING REQUIREMENTS (1) All specifications typical at -40C to +85C, SNSVDD = I/OVDD = 1.6V, unless otherwise noted. PARAMETER tWL(RESET) (2) tC(SCLK) Reset low time SPI serial clock cycle time TEST CONDITIONS MIN MAX UNIT SNSVDD 1.6V 10 s 1.2V SNSVDD < 1.6V 13 s SNSVDD = I/OVDD 2.7V and 3.6V, 40% to 60% duty cycle 40 ns SNSVDD = I/OVDD 1.6V and < 2.7V, 40% to 60% duty cycle 100 ns SNSVDD = I/OVDD = 1.2V 40% to 60% duty cycle 182 ns SNSVDD = I/OVDD 2.7V and 3.6V, 10pF load 25 MHz SNSVDD = I/OVDD 1.6V and < 2.7V, 10pF load 10 MHz 5.5 MHz fSCLK SPI serial clock frequency tWH(SCLK) SPI serial clock high time 0.4 x tC(SCLK) 0.6 x tC(SCLK) ns tWL(SCLK) SPI serial clock low time 0.4 x tC(SCLK) 0.6 x tC(SCLK) ns tSU(CSF-SCLK1R) Enable lead time tD(CSF-SDOVALID) Slave access time tH(SCLKF-SDOVALID) MISO data hold time tWH(CS) Sequential transfer delay tSU(SDI-SCLKR) SNSVDD = I/OVDD = 1.2V, 10pF load 30 6 ns 15 ns 13 ns 15 ns MOSI data setup time 4 ns tH(SDI-SCLKR) MOSI data hold time 4 tDIS(CSR-SDOZ) Slave MISO disable time tSU(SCLKF-CSR) Enable lag time tR Rise time SNSVDD = I/OVDD = 3V, fSCLK = 25MHz 3 ns tF Fall time SNSVDD = I/OVDD = 3V, fSCLK = 25MHz 3 ns (1) (2) 6 ns 15 30 ns ns All input signals are specified with tR = tF = 5ns (10% to 90% of I/OVDD) and timed from a voltage level of (VIL + VIH)/2. Refer to Figure 34. Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 TSC2006 www.ti.com ......................................................................................................................................................... SBAS415C - JUNE 2007 - REVISED MARCH 2009 TYPICAL CHARACTERISTICS At TA = -40C to +85C, SNSVDD = VREF = +1.2V to +3.6V, I/OVDD = +1.2V to +3.6V, fADC = fOSC/2, fSCLK = 10MHz, 12-bit mode, and non-continuous AUX measurement, unless otherwise noted. CHANGE IN OFFSET vs TEMPERATURE CHANGE IN GAIN vs TEMPERATURE 2.0 2.0 SNSVDD = I/OVDD = VREF 1.0 SNSVDD = 3.0V 0.5 0 -0.5 SNSVDD = 1.6V SNSVDD = 1.2V -1.0 -1.5 SNSVDD = 3.0V 1.0 SNSVDD = 1.2V 0.5 0 -0.5 SNSVDD = 1.6V -1.0 -1.5 -2.0 -2.0 -40 -20 0 20 40 60 80 100 -40 0 20 40 60 Temperature (C) Figure 2. Figure 3. SNSVDD SUPPLY CURRENT vs TEMPERATURE SNSVDD SUPPLY CURRENT vs SNSVDD SUPPLY VOLTAGE 1.50 I/OVDD = SNSVDD = VREF 900 SNSVDD Supply Current (mA) 1000 -20 Temperature (C) 1100 SNSVDD Supply Current (mA) SNSVDD = I/OVDD = VREF 1.5 Delta from +25C (LSB) Delta from +25C (LSB) 1.5 SNSVDD = 3.0V, fSCLK = 10MHz 800 700 600 SNSVDD = 1.6V, fSCLK = 10MHz 500 400 SNSVDD = 1.2V, fSCLK = 5.5MHz 300 1.25 80 100 I/OVDD = SNSVDD = VREF TA = +25C fADC = 1MHz, fSCLK = 10MHz 1.00 fADC = 2MHz, fSCLK = 10MHz 0.75 0.50 fADC = 1MHz, fSCLK = 5.5MHz 0.25 fADC = 2MHz, fSCLK = 5.5MHz 200 0 -40 -20 0 20 40 60 80 100 1.2 1.6 2.0 2.4 Temperature (C) SNSVDD (V) Figure 4. Figure 5. 2.8 3.2 3.6 SNSVDD SUPPLY CURRENT vs SNSVDD SUPPLY VOLTAGE SNSVDD Supply Current (mA) 1.2 1.0 0.8 TA = +25C I/OVDD = SNSVDD VREF = 1.6V tPVS, tPRE, tSNS = Default Values M = 15, W = 7(1) M = 1, W = 1(1) 0.6 0.4 0.2 TSC-Initiated Mode Scan X, Y, Z at 50SSPS Touch Sensor modeled by: 2kW for X-Plane 2kW for Y-Plane (2) 1kW for Z (Touch Resistance) 0 1.6 2.0 (1) See Table 1 (2) See Figure 25 2.4 2.8 SNSVDD (V) 3.2 3.6 Figure 6. Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 7 TSC2006 SBAS415C - JUNE 2007 - REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = -40C to +85C, SNSVDD = VREF = +1.2V to +3.6V, I/OVDD = +1.2V to +3.6V, fADC = fOSC/2, fSCLK = 10MHz, 12-bit mode, and non-continuous AUX measurement, unless otherwise noted. POWER-DOWN SUPPLY CURRENT vs TEMPERATURE POWER-DOWN SUPPLY CURRENT vs SNSVDD SUPPLY VOLTAGE 60 SNSVDD = I/OVDD = VREF Power-Down Supply Current (nA) Power-Down Supply Current (nA) 1000 800 SNSVDD = 3.0V 600 SNSVDD = 3.6V 400 200 SNSVDD = I/OVDD = VREF TA = +25C 45 30 15 SNSVDD = 1.6V 0 0 -40 -20 0 20 60 80 100 1.2 3.2 I/OVDD SUPPLY CURRENT vs TEMPERATURE I/OVDD SUPPLY CURRENT vs I/OVDD SUPPLY VOLTAGE I/OVDD = SNSVDD = VREF TA = 25C 20 15 I/OVDD = 1.2V, fSCLK = 5.5MHz I/OVDD Supply Current (mA) 80 I/OVDD = 1.6V, fSCLK = 5.5MHz 10 70 fADC = 2MHz, fSCLK = 10MHz 60 fADC = 2MHz, fSCLK = 5.5MHz 50 40 30 20 fADC = 1MHz, fSCLK = 10MHz 10 fADC = 1MHz, fSCLK = 5.5MHz 0 0 20 40 Temperature (C) 60 80 3.6 90 5 100 1.2 1.6 2.0 2.4 2.8 3.2 3.6 I/OVDD (V) Figure 9. Figure 10. REFERENCE INPUT CURRENT vs TEMPERATURE REFERENCE INPUT CURRENT vs SNSVDD SUPPLY VOLTAGE 4 8 SNSVDD = I/OVDD = VREF Reference Input Current (mA) SNSVDD = I/OVDD = VREF 3 SNSVDD = 1.6V 2 SNSVDD = 1.2V 1 0 7 6 5 4 3 2 1 -40 -20 0 20 40 60 80 100 1.2 Temperature (C) 1.6 2.0 2.4 2.8 3.2 3.6 SNSVDD (V) Figure 11. 8 2.8 Figure 8. 25 -20 2.4 Figure 7. I/OVDD = 1.6V, fSCLK = 10MHz -40 2.0 SNSVDD (V) I/OVDD = SNSVDD = VREF Reference Input Current (mA) 1.6 Temperature (C) 30 I/OVDD Supply Current (mA) 40 Figure 12. Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 TSC2006 www.ti.com ......................................................................................................................................................... SBAS415C - JUNE 2007 - REVISED MARCH 2009 TYPICAL CHARACTERISTICS (continued) At TA = -40C to +85C, SNSVDD = VREF = +1.2V to +3.6V, I/OVDD = +1.2V to +3.6V, fADC = fOSC/2, fSCLK = 10MHz, 12-bit mode, and non-continuous AUX measurement, unless otherwise noted. SWITCH ON-RESISTANCE vs TEMPERATURE SWITCH ON-RESISTANCE vs TEMPERATURE 7 9 X+ Y+ 6 Y+ 8 RON (W) RON (W) 4 X- Y- X- 3 Y5 3 X+, Y+: SNSVDD = 3V to Pin X-, Y-: Pin to GND 1 -40 0 -20 60 80 100 -40 TEMP Diode Voltage (mV) Y+ X+ X- 6 Y5 X+, Y+: SNSVDD to Pin X-, Y-: Pin to GND TA = +25C 588 586 750 80 95.3mV TEMP2 650 600 TEMP1 550 138.2mV 500 I/OVDD = SNSVDD = 3V VREF = 2.5V 400 SNSVDD (V) 20 40 Temperature (C) Figure 15. Figure 16. TEMP1 DIODE VOLTAGE vs SNSVDD SUPPLY VOLTAGE TEMP2 DIODE VOLTAGE vs SNSVDD SUPPLY VOLTAGE 1.6 2.0 100 Measurement Includes A/D Converter Offset and Gain Errors 700 450 2.4 SNSVDD = I/OVDD = VREF TA = +25C 2.8 3.2 -40 3.6 Measurement Includes A/D Converter Offset and Gain Errors 584 582 580 578 576 704 TEMP2 Diode Voltage (mV) 1.2 60 TEMP DIODE VOLTAGE vs TEMPERATURE 800 3 20 40 Temperature (C) SWITCH ON-RESISTANCE vs SNSVDD SUPPLY VOLTAGE 10 4 0 Figure 14. 850 7 -20 Figure 13. 11 8 X+, Y+: SNSVDD = 1.8V to Pin X-, Y-: Pin to GND 2 20 40 Temperature (C) 9 RON (W) 6 4 2 TEMP1 Diode Voltage (mV) X+ 7 5 702 -20 0 SNSVDD = I/OVDD = VREF TA = +25C 60 80 100 Measurement Includes A/D Converter Offset and Gain Errors 700 698 696 694 692 1.2 1.6 2.0 2.4 2.8 3.2 3.6 1.2 1.6 2.0 2.4 SNSVDD (V) SNSVDD (V) Figure 17. Figure 18. 2.8 3.2 Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 3.6 9 TSC2006 SBAS415C - JUNE 2007 - REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = -40C to +85C, SNSVDD = VREF = +1.2V to +3.6V, I/OVDD = +1.2V to +3.6V, fADC = fOSC/2, fSCLK = 10MHz, 12-bit mode, and non-continuous AUX measurement, unless otherwise noted. INTERNAL OSCILLATOR CLOCK FREQUENCY vs TEMPERATURE INTERNAL OSCILLATOR CLOCK FREQUENCY vs TEMPERATURE 3.75 SNSVDD = I/OVDD = VREF = 3.0V Internal Clock Frequency (MHz) Internal Clock Frequency (MHz) 4.00 3.95 3.90 3.85 3.80 -20 0 20 40 60 80 100 3.65 3.60 -40 -20 0 20 40 60 80 Temperature (C) Temperature (C) Figure 19. Figure 20. INTERNAL OSCILLATOR CLOCK FREQUENCY vs TEMPERATURE INTERNAL OSCILLATOR CLOCK FREQUENCY vs SNSVDD SUPPLY VOLTAGE 3.4 100 4.00 SNSVDD = I/OVDD = VREF = 1.2V Internal Clock Frequency (MHz) Internal Clock Frequency (MHz) 3.70 3.55 -40 3.3 3.2 3.1 3.0 2.9 3.90 3.80 3.70 3.60 3.50 3.40 SNSVDD = I/OVDD = VREF TA = +25C 3.30 3.20 2.8 -40 10 SNSVDD = I/OVDD = VREF = 1.6V -20 0 20 40 60 80 100 1.2 1.6 2.0 2.4 Temperature (C) SNSVDD (V) Figure 21. Figure 22. Submit Documentation Feedback 2.8 3.2 3.6 Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 TSC2006 www.ti.com ......................................................................................................................................................... SBAS415C - JUNE 2007 - REVISED MARCH 2009 OVERVIEW The TSC2006 is an analog interface circuit for a human interface touch screen device. A register-based architecture eases integration with microprocessor-based systems through a standard SPI bus. All peripheral functions are controlled through the registers and onboard state machines. The TSC2006 features include: * Very low-power touch screen controller * Very small onboard footprint * Relieves host from tedious routine tasks by flexible preprocessing, saving resources for more critical tasks * Ability to work on very low supply voltage * Minimal connection interface allows easiest isolation and reduces the number of dedicated I/O pins required * Miniature, yet complete; requires no external supporting component. (NOTE: Although the TSC2006 can use an external reference, it is also possible to use SNSVDD as the reference.) * Enhanced electrostatic discharge (ESD) protection up to 8kV The TSC2006 consists of the following blocks (refer to the block diagram on the front page): * Touch Screen Interface * Auxiliary Input (AUX) * Temperature Sensor * Acquisition Activity Preprocessing * Internal Conversion Clock * SPI Interface Communication with the TSC2006 is done via an SPI serial interface. The TSC2006 is an SPI slave device; therefore, data are shifted into or out of the TSC2006 under the control of the host microprocessor, which also provides the serial data clock. Control of the TSC2006 and its functions is accomplished by writing to different registers in the TSC2006. A simple serial command protocol (compatible with SPI), is used to address these registers. The measurement result is placed in the TSC2006 registers and may be read by the host at any time. This preprocessing frees up the host so that resources can be redirected for more critical tasks. Two optional signals are also available from the TSC2006 to indicate that data are available for the host to read. PINTDAV is a programmable interrupt/status output pin that can be programmed to indicate a pen-touch, data available, or the combination of both. Figure 23 shows a typical application of the TSC2006. 1.6VDC 1m F 1 mF 1 mF 0.1mF 0.1mF AGND 0.1mF Host Processor DGND VREF I/OVDD X+ SNSVDD SNSGND PINTDAV GPIO RESET GPIO Y+ SDO TSC2006 X- SDI SDI CS SUBGND DGND AUX AGND Y- Touch Screen SNSGND SCLK SCLK (PINTDAV is optional; software implementation polling of the Status register is possible) SDO Auxilary Input AGND CS Figure 23. Typical Circuit Configuration Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 11 TSC2006 SBAS415C - JUNE 2007 - REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com TOUCH SCREEN OPERATION A resistive touch screen operates by applying a voltage across a resistor network and measuring the change in resistance at a given point on the matrix where the screen is touched by an input (stylus, pen, or finger). The change in the resistance ratio marks the location on the touch screen. The TSC2006 supports resistive 4-wire configurations, as shown in Figure 24. The circuit determines location in two coordinate pair dimensions, although a third dimension can be added for measuring pressure. 4-WIRE TOUCH SCREEN COORDINATE PAIR MEASUREMENT A 4-wire touch screen is typically constructed as shown in Figure 24. It consists of two transparent resistive layers separated by insulating spacers. Conductive Bar Transparent Conductor (ITO) Bottom Side Y+ X+ Silver Ink Transparent Conductor (ITO) Top Side XY- Insulating Material (Glass) ITO = Indium Tin Oxide Figure 24. 4-Wire Touch Screen Construction The 4-wire touch screen panel works by applying a voltage across the vertical or horizontal resistive network. The A/D converter converts the voltage measured at the point where the panel is touched. A measurement of the Y position of the pointing device is made by connecting the X+ input to a data converter chip, turning on the Y+ and Y- drivers, and digitizing the voltage seen at the X+ input. The voltage measured is determined by the voltage divider developed at the point of touch. For this measurement, the horizontal panel resistance in the X+ lead does not affect the conversion because of the high input impedance of the A/D converter. Voltage is then applied to the other axis, and the A/D converter converts the voltage representing the X position on the screen. This process provides the X and Y coordinates to the associated processor. Measuring touch pressure (Z) can also be done with the TSC2006. To determine pen or finger touch, the pressure of the touch must be determined. Generally, it is not necessary to have very high performance for this test; therefore, 10-bit resolution mode is recommended (however, data sheet calculations are shown using 12-bit resolution mode). There are several different ways of performing this measurement. The TSC2006 supports two methods. The first method requires knowing the X-plate resistance, the measurement of the X-Position, and two additional cross panel measurements (Z2 and Z1) of the touch screen (see Figure 25). Equation 1 calculates the touch resistance: R TOUCH + RX-plate @ XPostition Z 2 *1 4096 Z 1 (1) The second method requires knowing both the X-plate and Y-plate resistance, measurement of the X-Position and the Y-Position, and Z1. Equation 2 also calculates the touch resistance: RX-plate @ XPostition 4096 Y R TOUCH + *1 *R Y-plate @ 1* Position 4096 4096 Z1 12 Submit Documentation Feedback (2) Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 TSC2006 www.ti.com ......................................................................................................................................................... SBAS415C - JUNE 2007 - REVISED MARCH 2009 Measure X-Position X+ Y+ Touch X-Position Y- X- Measure Z1-Position Y+ X+ Touch Z1-Position X- Y- Y+ X+ Touch Z2-Position X- YMeasure Z2-Position Figure 25. Pressure Measurement When the touch panel is pressed or touched and the drivers to the panel are turned on, the voltage across the touch panel often overshoots and then slowly settles down (decays) to a stable dc value. This effect is a result of mechanical bouncing caused by vibration of the top layer sheet of the touch panel when the panel is pressed. This settling time must be accounted for, or else the converted value is incorrect. Therefore, a delay must be introduced between the time the driver for a particular measurement is turned on, and the time a measurement is made. In some applications, external capacitors may be required across the touch screen for filtering noise picked up by the touch screen (for example, noise generated by the LCD panel or back-light circuitry). The value of these capacitors provides a low-pass filter to reduce the noise, but creates an additional settling time requirement when the panel is touched. The TSC2006 offers several solutions to this problem. A programmable delay time is available that sets the delay between turning the drivers on and making a conversion. This delay is referred to as the panel voltage stabilization time, and is used in some of the TSC2006 modes. In other modes, the TSC2006 can be commanded to turn on the drivers only without performing a conversion. Time can then be allowed before the command is issued to perform a conversion. The TSC2006 touch screen interface can measure position (X,Y) and pressure (Z). Determination of these coordinates is possible under three different modes of the A/D converter: * TSMode1--conversion controlled by the TSC2006 initiated by TSC; * TSMode2--conversion controlled by the TSC2006 initiated by the host responding to the PENIRQ signal; or * TSMode3--conversion completely controlled by the host processor. Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 13 TSC2006 SBAS415C - JUNE 2007 - REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com INTERNAL TEMPERATURE SENSOR In some applications, such as battery recharging, an ambient temperature measurement is required. The temperature measurement technique used in the TSC2006 relies on the characteristics of a semiconductor junction operating at a fixed current level. The forward diode voltage (VBE) has a well-defined characteristic versus temperature. The ambient temperature can be predicted in applications by knowing the +25C value of the VBE voltage and then monitoring the delta of that voltage as the temperature changes. The TSC2006 offers two modes of temperature measurement. The first mode requires calibration at a known temperature, but only requires a single reading to predict the ambient temperature. The TEMP1 diode, shown in Figure 26, is used during this measurement cycle. This voltage is typically 580mV at +25C with a 10A current. The absolute value of this diode voltage can vary by a few millivolts; the temperature coefficient (TC) of this voltage is very consistent at -2.1mV/C. During the final test of the end product, the diode voltage is stored at a known room temperature, in system memory, for calibration purposes by the user. The result is an equivalent temperature measurement resolution of 0.3C/LSB (1LSB = 610V with VREF = 2.5V). SNSVDD TEMP2 TEMP1 +IN Converter -IN AGND Figure 26. Functional Block Diagram of Temperature Measurement Mode The second mode does not require a test temperature calibration, but uses a two-measurement (differential) method to eliminate the need for absolute temperature calibration and for achieving 2C/LSB accuracy. This mode requires a second conversion of the voltage across the TEMP2 diode with a resistance 91 times larger than the TEMP1 diode. The voltage difference between the first (TEMP1) and second (TEMP2) conversion is represented by: DV + kT q @ ln(N) (3) Where: N = the resistance ratio = 91. k = Boltzmann's constant = 1.3807 x 10-23 J/K (joules/kelvins). q = the electron charge = 1.6022 x 10-19 C (coulombs). T = the temperature in kelvins (K). This method can provide much improved absolute temperature measurement, but a lower resolution of 1.6C/LSB. The resulting equation to solve for T is: q @ DV T+ k @ ln(N) (4) Where: V = VBE (TEMP2) - VBE(TEMP1) (in mV). T = 2.573 V (in K), or T = 2.573 V - 273 (in C). Temperature 1 and/or temperature 2 measurements have the same timing as shown in Figure 42. 14 Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 TSC2006 www.ti.com ......................................................................................................................................................... SBAS415C - JUNE 2007 - REVISED MARCH 2009 ANALOG-TO-DIGITAL CONVERTER Figure 27 shows the analog inputs of the TSC2006. The analog inputs (X, Y, and Z touch panel coordinates, chip temperature and auxiliary inputs) are provided via a multiplexer to the Successive Approximation Register (SAR) Analog-to-Digital (A/D) converter. The A/D architecture is based on capacitive redistribution architecture, which inherently includes a sample-and-hold function. SNSVDD VREF PINTDAV SNSVDD Level Shift (1) RIRQ 50kW Data Available Pen Touch Control Logic Preprocessing Zone Detect X+ TEMP2 TEMP1 MAV C3-C0 AGND XSNSVDD Y+ +IN Y- +REF Converter -IN -REF SNSGND AUX AGND (1) Untrimmed resistor; see the typical value in the Electrical Characteristics. Figure 27. Analog Input Section (Simplified Diagram) A unique configuration of low on-resistance switches allows an unselected A/D converter input channel to provide power and an accompanying pin to provide ground for driving the touch panel. By maintaining a differential input to the converter and a differential reference input architecture, it is possible to negate errors caused by the driver switch on-resistance. The A/D converter is controlled by two A/D Converter Control registers. Several modes of operation are possible, depending on the bits set in the control registers. Channel selection, scan operation, preprocessing, resolution, and conversion rate may all be programmed through these registers. These modes are outlined in the sections that follow for each type of analog input. The conversion results are stored in the appropriate result register. Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 15 TSC2006 SBAS415C - JUNE 2007 - REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com Data Format The TSC2006 output data are in Straight Binary format as shown in Figure 28. This figure shows the ideal output code for the given input voltage and does not include the effects of offset, gain, or noise. FS = Full-Scale Voltage = VREF(1) 1LSB = VREF(1)/4096 1LSB 11...111 Output Code 11...110 11...101 00...010 00...001 00...000 0V Input Voltage (2) FS - 1LSB (V) (1) Reference voltage at converter: +REF - (-REF). See Figure 27. (2) Input voltage at converter, after multiplexer: +IN - (-IN). See Figure 27. Figure 28. Ideal Input Voltages and Output Codes Reference The TSC2006 uses an external voltage reference that applied to the VREF pin. It is possible to use VDD as the reference voltage because the upper reference voltage range is the same as the supply voltage range, . Variable Resolution The TSC2006 provides either 10-bit or 12-bit resolution for the A/D converter. Lower resolution is often practical for measuring slow changing signals such as touch pressure. Performing the conversions at lower resolution reduces the amount of time it takes for the A/D converter to complete its conversion process, which also lowers power consumption. Conversion Clock and Conversion Time The TSC2006 contains an internal clock (oscillator) that drives the internal state machines that perform the many functions of the part. This clock is divided down to provide a conversion clock for the A/D converter. The division ratio for this clock is set in the A/D Converter Control register (see Table 15). The ability to change the conversion clock rate allows the user to choose the optimal values for resolution, speed, and power dissipation. If the 4MHz (oscillator) clock is used directly as the A/D converter clock (when CL[1:0] = (0,0)), the A/D converter resolution is limited to 10-bits. Using higher resolutions at this speed does not result in more accurate conversions. 12-bit resolution requires that CL[1:0] is set to (0,1) or (1,0). Regardless of the conversion clock speed, the internal clock runs nominally at 3.9MHz at a 3V supply (SNSVDD) and slows down to 3.7MHz at a 1.6V supply. The conversion time of the TSC2006 depends on several functions. While the conversion clock speed plays an important role in the time it takes for a conversion to complete, a certain number of internal clock cycles are needed for proper sampling of the signal. Moreover, additional times (such as the panel voltage stabilization time), can add significantly to the time it takes to perform a conversion. Conversion time can vary, depending on the mode in which the TSC2006 is used. Throughout this data sheet, internal and conversion clock cycles are used to describe the amount of time that many functions take. These times must be taken into account when considering the total system design. 16 Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 TSC2006 www.ti.com ......................................................................................................................................................... SBAS415C - JUNE 2007 - REVISED MARCH 2009 Touch Detect PINTDAV can be programmed to generate an interrupt to the host. Figure 29 details an example for the Y-position measurement. While in the power-down mode, the Y- driver is on and connected to GND. The internal pen-touch signal depends on whether or not the X+ input is driven low. When the panel is touched, the X+ input is pulled to ground through the touch screen and the internal pen-touch output is set to low because of the detection on the current path through the panel to GND, which initiates an interrupt to the processor. During the measurement cycles for X- and Y-Position, the X+ input is disconnected, which eliminates any leakage current from the pull-up resistor to flow through the touch screen, thus causing no errors. Analog VDD Plane SNSVDD PINTDAV SNSVDD Level Shifter Y+ Pen Touch Control Logic Data Available TEMP1 High when the X+ or Y+ driver is on. X+ TEMP2 (1) RIRQ 50kW Sense DGND Y- ON High when the X+ or Y+ driver is on, or when any sensor connection/short circuit tests are activated. SNSGND (1) Vias go to system analog ground plane. AGND Untrimmed resistor; see the typical value in the Electrical Characteristics. Figure 29. Example of a Pen-Touch Induced Interrupt via the PINTDAV Pin In modes where the TSC2006 must detect whether or not the screen is still being touched (for example, when doing a pen-touch initiated X, Y, and Z conversion), the TSC2006 must reset the drivers so that the RIRQ resistor is connected again. Because of the high value of this pull-up resistor, any capacitance on the touch screen inputs causes a long delay time, and may prevent the detection from occurring correctly. To prevent this possible delay, the TSC2006 has a circuit that allows any screen capacitance to be precharged, so that the pull-up resistor does not have to be the only source for the charging current. The time allowed for this precharge, as well as the time needed to sense if the screen is still touched, can be set in the configuration register. This configuration underscores the need to use the minimum possible capacitor values on the touch screen inputs. These capacitors may be needed to reduce noise, but too large a value will increase the needed precharge and sense times, as well as the panel voltage stabilization time. Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 17 TSC2006 SBAS415C - JUNE 2007 - REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com Preprocessing The TSC2006 offers an array of powerful preprocessing operations that reduce unnecessary traffic on the bus and reduce host processor loading. This reduction is especially critical for the serial interface, where limited bandwidth is a tradeoff, keeping the connection lines to a minimum. All data acquisition tasks are looking for specific data that meet certain criteria. Many of these tasks fall into a predefined range, while other tasks may be looking for a value in a noisy environment. If these data are all to be retrieved by host processor for processing, the limited bus bandwidth quickly saturates, along with the host processor processing capability. In any case, the host processor must always be reserved for more critical tasks, not for routine work. The preprocessing unit consists of two main functions: the combined MAV filter (median value filter and averaging filter), followed by the zone detection. Preprocessing--Median Value Filter and Averaging Value Filter The first preprocessing function, a combined MAV filter, can be operated independently as a median value filter (MVF), an averaging value filter (AVF), and a combined filter (MAVF). If the acquired signal source is noisy because of the digital switching circuit, it may be necessary to evaluate the data without noise. In this case, the median value filter (MVF) operation helps to discard the noise. The array of N converted results is first sorted. The return value is either the middle (median value) of an array of M converted results, or the average value of a window size of W of converted results: * N = the total number of converted results used by the MAV filter * M = the median value filter size programmed * W = the averaging window size programmed If M = 1, then N = W. A special case is W = 1, which means the MAVF is bypassed. Otherwise, if W > 1, only averaging is performed on these converted results. In either case, the return value is the averaged value of window size W of converted results. If M > 1 and W = 1, then N = M, meaning only the median value filter is operating. The return value is the middle position converted result from the array of M converted results. If M > 1 and W > 1, then N = M. In this case, W < M. The return value is the averaged value of middle portion W of converted results out of the array of M converted results. Since the value of W is an odd number in this case, the averaging value is calculated with the middle position converted result counted twice (so a total of W + 1 converted results are averaged). Table 1. Median Value Filter Size Selection M1 M0 MEDIAN VALUE FILTER M= POSSIBLE AVERAGING WINDOW SIZE W= 0 0 1 1, 4, 8, 16 0 1 3 1 1 0 7 1, 3 1 1 15 1, 3, 7 Table 2. Averaging Value Filter Size Selection AVERAGING VALUE FILTER SIZE SELECTION W= 18 W1 W0 M = 1 (Averaging Only) M>1 0 0 1 1 0 1 4 3 1 0 8 7 1 1 16 Reserved Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 TSC2006 www.ti.com ......................................................................................................................................................... SBAS415C - JUNE 2007 - REVISED MARCH 2009 NOTE: The default setting for MAVF is MVF (median value filter with averaging bypassed) for any invalid configuration. For example, if (M1, M0, W1, W0) = (1,0,1,0), the MAVF performs as it was configured for (1,0,0,0), median filter only with filter size = 7 and no averaging. The only exception is M > 1 and (W1, W0) = (1,1). This setting is reserved and should not be used. Table 3. Combined MAV Filter Setting M W INTERPRETATION N= =1 =1 Bypass both MAF and AVF W The converted result =1 >1 Bypass MVF only W Average of W converted results >1 =1 Bypass AVF only M Median of M converted results M Average of middle W of M converted results with the median counted twice >1 >1 M>W OUTPUT The MAV filter is available for all analog inputs including the touch screen inputs, temperature measurements TEMP1 and TEMP2, and the AUX measurement. N measurements input into temporary array N Acquired Data N M=1 N W Averaging output from window W M > 1 and W = 1 N M Median value from array M M > 1 and W > 1 N M Averaging output from window W Sort by descending order W Figure 30. MAV Filter Operation (Patent Pending) Zone Detection The Zone Detection unit is capable of screening all processed data from the MAVF and retaining only the data of interest (data that fit the prerequisite). This unit can be programmed to send an alert if a predefined condition set by two threshold value registers is met. Three different zones may be set: 1. Above the upper limit (X Threshold High) 2. Between the two thresholds (Threshold Low < X < Threshold High) 3. Below the lower limit (X Threshold Low) The AUX and temperatures TEMP1 and TEMP2 have separate threshold value registers that can be enabled or disabled. This function is not available to the touch screen inputs. Once the preset condition is met, the DAV output to the PINTDAV pin is pulled low and the corresponding DAV bit is set. Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 19 TSC2006 SBAS415C - JUNE 2007 - REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com DIGITAL INTERFACE The TSC2006 communicates through a standard SPI bus. The SPI allows full-duplex, synchronous, serial communication between a host processor (the master) and peripheral devices (slaves). The SPI master generates the synchronizing clock and initiates transmissions. The SPI slave devices depend on a master to start and synchronize transmissions. A transmission begins when initiated by a master SPI. The byte from the master SPI begins shifting in on the slave SDI (MOSI--master out, slave in) pin under the control of the master serial clock. As the byte shifts in on the SDI (MOSI) pin, a byte shifts out on the SDO (MISO--master in, slave out) pin to the master shift register. The idle state of the TSC2006 serial clock is logic low, which corresponds to a clock polarity setting of 0 (typical microprocessor SPI control bit CPOL = 0). The TSC2006 interface is designed so that with a clock phase bit setting of 0 (typical microprocessor SPI control bit CPHA = 0), the master begins driving its MOSI pin and the slave begins driving its MISO pin half an SCLK before the first serial clock edge. The CS (SS, slave select) pin can remain low between transmissions. Table 4. Standard SPI Signal Names vs Common Serial Interface Signal Names SPI SIGNAL NAMES COMMON SERIAL INTERFACE NAMES SS (Slave Select) CS (Chip Select) MISO (Master In Slave Out) SDO (Serial Data Out) MOSI (Master Out Slave In) SDI (Serial Data In) CONTROL BYTE Table 5. Control Byte Format: Start a Conversion and Mode Setting MSB D7 D6 D5 D4 D3 D2 D1 LSB D0 1 (Control Byte 1) C3 C2 C1 C0 RM SWRST STS 0 (Control Byte 0) A3 A2 A1 A0 Reserved (Write '0') PND0 R/W Table 6. Control Byte 1 Bit Register Description (D7 = 1) BIT NAME D7 Control Byte ID D6-D3 C3-C0 D2 RM D1 SWRST D0 STS DESCRIPTION 1 Converter Function Select as detailed in Table 7 0: 10 Bit 1: 12 Bit Software Reset 1: Reset all register values to default Stop bit for all converter functions Bit D7: Control Byte ID 1: Control Byte 1 (start conversion and channel select and conversion-related configuration). 0: Control Byte 0 (read/write data registers and non-conversion-related controls). Bits D6-D3: C3-C0 Converter function select bits. These bits select the input to be converted, and the converter function to be executed. Table 7 lists the possible converter functions. 20 Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 TSC2006 www.ti.com ......................................................................................................................................................... SBAS415C - JUNE 2007 - REVISED MARCH 2009 Table 7. Converter Function Select C3 C2 C1 C0 FUNCTION 0 0 0 0 Touch screen scan function: X, Y, Z1, and Z2 coordinates converted and the results returned to X, Y, Z1, and Z2 data registers. Scan continues until either the pen is lifted or a stop bit is sent. 0 0 0 1 Touch screen scan function: X and Y coordinates converted and the results returned to X and Y data registers. Scan continues until either the pen is lifted or a stop bit is sent. 0 0 1 0 Touch screen scan function: X coordinate converted and the results returned to X data register. 0 0 1 1 Touch screen scan function: Y coordinate converted and the results returned to Y data register. 0 1 0 0 Touch screen scan function: Z1 and Z2 coordinates converted and the results returned to Z1 and Z2 data registers. 0 1 0 1 Auxiliary input converted and the results returned to the AUX data register. 0 1 1 0 A temperature measurement is made and the results returned to the Temperature Measurement 1 data register. 0 1 1 1 A differential temperature measurement is made and the results returned to the Temperature Measurement 2 data register. 1 0 0 0 Auxiliary input is converted continuously and the results returned to the AUX data register. 1 0 0 1 Touch screen panel connection to X-axis drivers is tested. The test result is output to PINTDAV and shown in STATUS register. 1 0 1 0 Touch screen panel connection to Y-axis drivers is tested. The test result is output to PINTDAV and shown in STATUS register. 1 0 1 1 RESERVED (Note: any condition caused by this command can be cleared by setting the STS bit to 1). 1 1 0 0 Touch screen panel short-circuit (between X and Y plates) is tested through Y-axis. The test result is output to PINTDAV and shown in the STATUS register. 1 1 0 1 Turn on X+, X- drivers 1 1 1 0 Turn on Y+, Y- drivers 1 1 1 1 Turn on Y+, X- drivers Touch Screen Scan Function for XYZ or XY C3-C0 = 0000 or 0001: These scan functions can collaborate with the PSM bit that defines the control mode of converter functions. If the PSM bit is set to '1', these scan function select commands are recommended to be issued before a pen touch is detected in order to allow the TSC2006 to initiate and control the scan processes immediately after the screen is touched. If these functions are not issued before a pen touch is detected, the TSC2006 waits for the host to write these functions before starting a scan process. If PSM stays as '1' after a TSC-initiated scan function is complete, the host is not required to write these function select bits again for each of the following pen touches after the detected touch. In the host-controlled converter function mode (PSM = 0), the host must send these functions select bits repeatedly for each scan function after a detected pen touch. Touch Screen Sensor Connection Tests for X-Axis and Y-Axis Range of resistances of different touch screen panels can be selected by setting the TBM bits in CFR1; see Table 20. Once the resistance of the sensor panel is selected, two continuity tests are run separately for the X-axis and Y-axis. The unit under test must pass both connection tests to ensure that a proper connection is secured. C3-C0 = 1001: PINTDAV = 0 during this connection test. A '1' shown at end of the test indicates the X-axis drivers are well-connected to the sensor; otherwise, X-axis drivers are poorly connected. If drivers fail to connect, then PINTDAV stays low until a stop bit (STS set to '1') is issued. C3-C0 = 1010: PINTDAV = 0 during this connection test. A '1' shown at end of the test indicates the Y-axis drivers are well-connected to the sensor; otherwise, Y-axis drivers are poorly connected. If the drivers are fail to connect, then PINTDAV stays low until a stop bit (STS set to '1') is issued. Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 21 TSC2006 SBAS415C - JUNE 2007 - REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com Touch Sensor Short-Circuit Test If the TBM bits of CFR1 detailed in Table 20 are all set to '1', a short-circuit in the touch sensor can be detected. C3-C0 = 1011: Reserved. C3-C0 = 1100: PINTDAV = 0 during this short-circuit test. A '1' shown at end of the test indicates there is no short-circuit detected (through Y-axis) between the flex and stable layers. If there is a short-circuit detected, PINTDAV stays low until a stop bit (STS set to '1') is issued. RM--Resolution select. If RM = 1, the conversion result resolution is 12-bit; otherwise, the resolution is 10-bit. This bit is the same RM bit shown in CFR0. SWRST--Software reset input. All register values are set to default value if a '1' is written to this bit. This bit must be set to '0' in Control Byte 1 in order to cancel the software reset and resume normal operation. STS--Stop bit for all converter functions. When writing a '1' to this register, this bit aborts the converter function currently running in the TSC2006. A '0' must be written to this register in order to end the stop bit. This bit can only stop converter functions; it does not reset any data, status, or configuration registers. This bit is the same STS bit shown in CFR0, but can only be read through the CFR0 register with different interpretations. Table 8. STS Bit Operation OPERATION VALUE DESCRIPTION Write 0 Normal operation Write 1 Stop converter functions and power down Table 9. Control Byte 0 Bit Register Description (D7 = 0) BIT NAME D7 Control Byte ID D6-D3 A3-A0 D2 RESERVED DESCRIPTION 1: Control Byte 1--start conversion, channel select, and converison-related configuration 0: Control Byte 0--read/write data registers and non-conversion-related controls Register Address Bits as detailed in Table 10 A '0' must be set in this bit for normal operation Power Not Down Control D1 PND0 1: A/D converter biasing circuitry is always on between conversions, but is shut down after the converter function stops 0: A/D converter biasing circuitry is shut down either between conversions or after the converter function stops TSC Internal Register Data Flow Control D0 R/W 1: Read from TSC internal registers 0: Write to TSC internal registers 22 Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 TSC2006 www.ti.com ......................................................................................................................................................... SBAS415C - JUNE 2007 - REVISED MARCH 2009 Table 10. Internal Register Map REGISTER ADDRESS A3 A2 A1 A0 REGISTER CONTENT READ/WRITE 0 0 0 0 X measurement result R 0 0 0 1 Y measurement result R 0 0 1 0 Z1 measurement result R 0 0 1 1 Z2 measurement result R 0 1 0 0 AUX measurement result R 0 1 0 1 Temp1 measurement result R 0 1 1 0 Temp2 measurement result R 0 1 1 1 Status 1 0 0 0 AUX high threshold R/W 1 0 0 1 AUX low threshold R/W 1 0 1 0 Temp high threshold (apply to both TEMP1 and TEMP2) R/W 1 0 1 1 Temp low threshold (apply to both TEMP1 and TEMP2) R/W 1 1 0 0 CFR0 R/W 1 1 0 1 CFR1 R/W 1 1 1 0 CFR2 R/W 1 1 1 1 Converter function select status R R R/W--Register read and write control. A '1' indicates the contents of the internal register addressed by A3-A0 are sent to SDO at the next SPI interface clock cycle. A '0' indicates the data following Control Byte 0 on SDI are written into registers addressed by A3-A0. START A CONVERTER FUNCTION (CONTROL BYTE 1) Control Byte 1 must begin with D7 = 1, as shown in Figure 31. Control Byte 1 starts the converter function that is chosen by C3-C0, as shown in Table 7. After sending Control Byte 1, the master does not need to hold CS low, and can release CS for operating other slave devices that share the same SCLK. After the converter function completes or stops, the preprocessed data or data set are stored in data registers and can be read by sending Control Byte 0 with Read Bit and a proper address in A3-A0. For the detailed operating procedures, see the Operation section. Control Byte 1 Write CS (SS) 1 2 3 4 5 6 7 8 D7 D6 D5 D4 D3 D2 D1 D0 SCLK SDI (MOSI) 1 MSB LSB Figure 31. Interface Timing -- Control Byte 1 Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 23 TSC2006 SBAS415C - JUNE 2007 - REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com REGISTER ACCESS (Control Byte 0 with R/W Bit) Control byte 0, beginning with D7 = 0, is used to access the internal registers. This control byte uses the last bit, D0, to control the flow of data. If D0 is '1', then the content of the register pointed by the address bits (A3-A0) is output to SDO (MISO) in the next cycle. Otherwise, the data coming from SDI (MOSI) are written to the register properly pointed to by the address bits in the control byte (if the write mode is available for the pointed register). After Control Byte 0 with Read/Write Bit followed by a 16-bit word on SDO/SDI completes, the master can hold CS low to send another Control Byte 0 with Read/Write Bit followed by a 16-bit word on SDO/SDI as many times as the master is able to operate. Read Register Via Control Byte 0 CS (SS) 1 2 3 4 5 6 7 8 D7 D6 D5 D4 D3 D2 D1 D0 0 A3 A2 A1 A0 1 2 3 7 8 11 D8 D5 15 16 D1 D0 SCLK SDI (MOSI) 1 MSB 0 LSB D15 D14 D13 D9 D4 Hi-Z SDO (MISO) Hi-Z MSB LSB Figure 32. Interface Timing -- Sending Control Byte 0 with Read Bit Write to Register Via Control Byte 0 CS (SS) 1 2 3 4 5 6 7 8 D7 D6 D5 D4 D3 D2 D1 D0 0 A3 A2 A1 A0 1 2 3 7 8 11 12 15 16 D9 D8 D5 D4 D1 D0 SCLK SDI (MOSI) MSB D15 D14 D13 0 LSB MSB LSB Hi-Z SDO (MISO) Figure 33. Interface Timing -- Sending Control Byte 0 with Write Bit 24 Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 TSC2006 www.ti.com ......................................................................................................................................................... SBAS415C - JUNE 2007 - REVISED MARCH 2009 COMMUNICATION PROTOCOL The TSC2006 is controlled entirely by registers. Reading and writing to these registers are accomplished by the use of Control Byte 0, which includes a 4-bit address plus one read/write TSC register control bit. The data registers defined in Table 10 are all 16-bit, right-adjusted. NOTE: Except for some configuration registers and the Status register that are full 16-bit registers, the value registers are 12-bit (or 10-bit) data preceded by four (or six) zeros. Configuration Register 0 Table 11. Configuration Register 0 (Reset Value = 4000h for Read; 0000h for Write) MSB D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 LSB D0 PSM STS RM CL1 CL0 PV2 PV1 PV0 PR2 PR1 PR0 SN2 SN1 SN0 DTW LSM PSM--Pen status/control mode. Reading this bit allows the host to determine if the screen is touched. Writing to this bit selects the mode used to control the flow of converter functions that are either initiated and/or controlled by host or under control of the TSC2006 responding to a pen touch. When reading, the PSM bit indicates if the pen is down or not. When writing to this register, this bit determines if the TSC2006 controls the converter functions, or if the converter functions are host-controlled. The default state is the host-controlled converter function mode (0). The other state (1) is the TSC-initiated scan function mode that must only collaborate with C3-C0 = 0000 or 0001 in order to allow the TSC2006 to initiate and control the scan function for XYZ or XY when a pen touch is detected. Table 12. PSM Bit Operation OPERATION VALUE DESCRIPTION Read 0 No screen touch detected Read 1 Screen touch detected Write 0 Converter functions initiated and/or controlled by host Write 1 Converter functions initiated and controlled by the TSC2006 STS--A/D converter status. When reading, this bit indicates if the converter is busy or not busy. Continuous scans or conversions can be stopped by writing a '1' to this bit, immediately aborting the running converter function (even if the pen is still down) and causing the A/D converter to power down. The default state for write is 0 (normal operation), and the default state for read is 1 (converter is not busy). NOTE: The same bit can be written through Control Byte 1. Table 13. STS Bit Operation OPERATION VALUE Read 0 DESCRIPTION Converter is busy Read 1 Converter is not busy Write 0 Normal operation Write 1 Stop converter function and power down RM--Resolution control. The A/D converter resolution is specified with this bit. See Table 14 for a description of these bits. This bit is the same whether reading or writing, and defaults to 0. Note that the same bit can be written through Control Byte 1. Table 14. A/D Converter Resolution Control RM FUNCTION 0 10-bit resolution. Power-up and reset default. 1 12-bit resolution Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 25 TSC2006 SBAS415C - JUNE 2007 - REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com CL1, CL0--Conversion clock control. These two bits specify the clock rate that the A/D converter uses to perform conversion, as shown in Table 15. These bits are the same whether reading or writing. Table 15. A/D Converter Conversion Clock Control (1) CL1 CL0 FUNCTION 0 0 fADC = fOSC/1. This is referred to as the 4MHz A/D converter clock rate, 10-bit resolution only. (1) 0 1 fADC = fOSC/2. This is referred to as the 2MHz A/D converter clock rate. 1 0 fADC = fOSC/4. This is referred to as the 1MHz A/D converter clock rate. 1 1 fADC = fOSC/4. This is referred to as the 1MHz A/D converter clock rate. For SNSVDD = 1.2V at -40C, a lower A/D converter clock rate should be used to allow enough time for conversion settling. PV2-PV0--Panel voltage stabilization time control. These bits specify a delay time from the moment the touch screen drivers are enabled to the time the voltage is sampled and a conversion is started. These bits allow the user to adjust the appropriate settling time for the touch panel and external capacitances. See Table 16 for settings of these bits. The default state is 000, indicating a 0s stabilization time. These bits are the same whether reading or writing. Table 16. Panel Voltage Stabilization Time Control PV2 PV1 PV0 STABILIZATION TIME (tPVS) 0 0 0 0s 0 0 1 100s 0 1 0 500s 0 1 1 1ms 1 0 0 5ms 1 0 1 10ms 1 1 0 50ms 1 1 1 100ms PR2-PR0--Precharge time selection. These bits set the amount of time allowed for precharging any pin capacitance on the touch screen prior to sensing if a pen touch is happening. Table 17. Precharge Time Selection PR2 PR1 PR0 PRECHARGE TIME(tPRE) 0 0 0 20s 0 0 1 84s 0 1 0 276s 0 1 1 340s 1 0 0 1.044ms 1 0 1 1.108ms 1 1 0 1.300ms 1 1 1 1.364ms SNS2-SNS0--Sense time selection. These bits set the amount of time the TSC2006 waits to sense whether the screen is touched after converting a coordinate. 26 Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 TSC2006 www.ti.com ......................................................................................................................................................... SBAS415C - JUNE 2007 - REVISED MARCH 2009 Table 18. Sense Time Selection SNS2 SNS1 SNS0 SENSE TIME (tSNS) 0 0 0 32s 0 0 1 96s 0 1 0 544s 0 1 1 608s 1 0 0 2.080ms 1 0 1 2.144ms 1 1 0 2.592ms 1 1 1 2.656ms DTW--Detection of pen touch in wait (patent pending). Writing a '1' to this bit enables pen touch detection in the background while waiting for the host to issue the converter function in host-initiated/controlled modes. This background detection allows the TSC2006 to pull high at PINTDAV to indicate no pen touch detected while waiting for the host to issue the converter function. If the host polls a high state at PINTDAV before the convert function is sent, the host can abort the issuance of the convert function and stay in the polling PINTDAV mode until the next pen touch is detected. LSM--Longer sampling mode. When this bit is set to '1', the extra 500ns of sampling time is added to the normal sampling cycles of each conversion. This additional time is represented as approximately two internal oscillator clock cycles. For SNSVDD = 1.2V at -40C, the LSM bit should be set to '1' so that the sampled signal has enough time to settle. Configuration Register 1 Configuration register 1 (CFR1) defines the connection test-bit modes configuration and batch delay selection. Table 19. Configuration Register 1 (Reset Value = 0000h) MSB D15 D14 D13 D12 Resrvd Resrvd Resrvd Resrvd D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 LSB D0 TBM3 TBM2 TBM1 TBM0 Resrvd Resrvd Resrvd Resrvd Resrvd BTD2 BTD1 BTD0 TBM3-TBM0--Connection test-bit modes (patent pending). These bits specify the mode of test bits used for the predefined range of the combined X-axis and Y-axis touch screen panel resistance (RTS). Table 20. Touch Screen Resistance Range and Test-Bit Modes TEST-BIT MODES RTS (k) TBM3 TBM2 TBM1 TBM0 0 0 0 0 0.17 0 0 0 1 0.17 < RTS 0.52 0 0 1 0 0.52 < RTS 0.86 0 0 1 1 0.86 < RTS 1.6 0 1 0 0 1.6 < RTS 2.2 0 1 0 1 2.2 < RTS 3.6 0 1 1 0 3.6 < RTS 5.0 0 1 1 1 5.0 < RTS 7.8 1 0 0 0 7.8 < RTS 10.5 1 0 0 1 10.5 < RTS 16.0 1 0 1 0 16.0 < RTS 21.6 1 0 1 1 21.6 < RTS 32.6 1 1 0 0 Reserved 1 1 0 1 Reserved 1 1 1 0 Reserved 1 1 1 1 Only for short-circuit panel test Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 27 TSC2006 SBAS415C - JUNE 2007 - REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com BTD2-BTD0--Batch Time Delay mode. These are the selection bits that specify the delay before a sample/conversion scan cycle is triggered. When it is set, Batch Time Delay mode uses a set of timers to automatically trigger a sequence of sample-and-conversion events. The mode works for both TSC-initiated scans (XYZ or XY) and host-initiated scans (XYZ or XY). A TSC-initiated scan (XYZ or XY) can be configured by setting the PSM bit in CFR0 to '1' and C[3:0] in Control Byte 1 to '0000' or '0001'. In the case of a TSC-initiated scan (XYZ or XY), the sequence begins with the TSC responding to a pen touch. After the first processed sample set completes during the batch delay, the scan enters a wait mode until the end of the batch delay is reached. If a pen touch is still detected at that moment, the scan continues to process the next sample set, and the batch delay is resumed. The throughput of the processed sample sets (shown in Table 21 as sample sets per second, or SSPS) is regulated by the selected batch delay during the time of the detected pen touch. A TSC-initiated scan (XYZ or XY) can be configured by setting the PSM bit in CFR0 to '1' and C[3:0] in Control Byte 1 to '0000' or '0001'. Note that the throughput of the processed sample set also depends on the settings of stabilization, precharge, and sense times, and the total number of samples to be processed per coordinates. If the accrual time of these factors exceeds the batch delay time, the accrual time dominates. Batch delay time starts when the pen touch initiates the scan function that converts coordinates. A host-initiated scan (XYZ or XY) can be configured by setting the PSM bit in CFR0 to '0' and C[3:0] in Control Byte 1 to '0000' or '0001'. For the host-initiated scan (XYZ or XY), the host must set TSC internal register C[3:0] in Control Byte 1 to '0000' or '0001' initially after a pen touch is detected; see Conversion Controlled by TSC2006 Initiated by Host (TSMode 2), in the Theory of Operation section. After the scan (XYZ or XY) is engaged, the throughput of the processed sample sets is regulated by the selected batch delay timer, as long as the initial detected touch is not interrupted. Table 21. Touch Screen Throughput and Batch Selection Bits BATCH DELAY SELECTION THROUGHPUT FOR TSC-INITIATED OR HOST-INITIATED SCAN, XYZ OR XY (SSPS) BTD2 BTD1 BTD0 DELAY TIME (ms) 0 0 0 0 Normal operation throughput depends on settings. 0 0 1 1 1000 0 1 0 2 500 0 1 1 4 250 1 0 0 10 100 1 0 1 20 50 1 1 0 40 25 1 1 1 100 10 For example, if stabilization time, precharge time, and sense time are selected as 100s, 84s, and 96s, respectively, and the batch delay time is 2ms, then the scan function enters wait mode after the first processed sample set until the 2ms of batch delay time is reached. When the scan function starts to process the second sample set (if the screen is still touched), the batch delay restarts at 2ms (in this example). This procedure remains regulated by 2ms until the pen touch is not detected or the scan function is stopped by a stop bit or any reset form. 28 Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 TSC2006 www.ti.com ......................................................................................................................................................... SBAS415C - JUNE 2007 - REVISED MARCH 2009 Configuration Register 2 Configuration register 2 (CFR2) defines the preprocessor configuration. Table 22. Configuration Register 2 (Reset Value = 0000h) MSB D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 LSB D0 PINTS1 PINTS0 M1 M0 W1 W0 TZ1 TZ0 AZ1 AZ0 Resrvd MAVE X MAVE Y MAVE Z MAVE AUX MAVE TEMP PINTS1 (default 0)--This bit controls the output format of the PINTDAV pin. When this bit is set to '0', the output format is shown as the AND-form of internal signals of PENIRQ and DAV). When this bit is set to '1', PINTDAV outputs PENIRQ only. PINTS0 (default 0)--This bit selects what is output on the PINTDAV pin. If this bit set to '0', the output format of PINTDAV depends on the selection made on the PINTS1 bit. If this bit set to '1', the internal signal of DAV is output on PINTDAV. Table 23. PINTSx Selection PINTS1 PINTS0 0 0 PINTDAV PIN OUTPUT = An AND combination of PENIRQ (active low) and DAV (active high). 0 1 Data available, DAV (active low). 1 0 An interrupt, PENIRQ (active low) generated by pen-touch. 1 1 Data available, DAV (active low). M1, M0, W1, W0 (default 0000)--Preprocessing MAV filter control. Note that when the MAV filter is processing data, the STS bit and the corresponding DAV bits in the status register indicate that the converter is busy until all conversions necessary for the preprocessing are complete. The default state for these bits is 0000, which bypasses the preprocessor. These bits are the same whether reading or writing. TZ1 and TZ0, or AZ1 and AZ0 (default 00)--Zone detection bit definition (for TEMP or AUX measurements). TZ1 and TZ0 are for the TEMP measurement. AZ1 and AZ0 are for the AUX measurement. The action taken in zone detection is to store the processed data in the corresponding data registers and to update the corresponding DAV bits in status register. If the processed data do not meet the selected criteria, these data are ignored and the corresponding DAV bits are not updated. When zone detection is disabled, the processed data are simply stored in the corresponding data registers and the corresponding DAV bits are updated without any comparison of criteria. Note that the converted samples are always processed according to the setting of the MAVE bits for AUX/TEMP before zone detection takes effect. See Table 30 for thresholds. Table 24. Zone Detection Bit Definition TZ1/AZ1 TZ0/AZ0 0 0 FUNCTION Zone detection is disabled. 0 1 When the processed data are below low threshold 1 0 When the processed data are between low and high thresholds 1 1 When the processed data are above high threshold MAVE (default is 00000)--MAV filter function enable bit. When the corresponding bit is set to '1', the MAV filter setup is applied to the corresponding measurement. Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 29 TSC2006 SBAS415C - JUNE 2007 - REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com Converter Function Select Register The Converter Function Select (CFN) register reflects the converter function select status. Table 25. Converter Function Select Status Register (Reset Value = 0000h) MSB D15 D14 D13 D12 D11 D9 D8 D7 D6 D5 D4 D3 D2 D1 LSB D0 CFN9 CFN8 CFN7 CFN6 CFN5 CFN4 CFN3 CFN2 CFN1 CFN0 D10 CFN15 CFN14 CFN13 CFN12 CFN11 CFN10 CFN15-CFN0--Converter function select status. These bits represent the converter function currently running, which is set in bits C3-C0 of Control Byte 1. When the CFNx bit shows '1', where x is the decimal value of converter function select bits C3-C0, it indicates that the converter function that is set in bits C3-C0 is running. For example, when CFN2 shows '1', it indicates the converter function set in bits C3-C0 ('0010') is running. The CFNx bits are reset to 0000h whenever the converter function is complete, stopped by STS bit, or reset (by the hardware reset from the RESET pin or the software reset from SWRST bit in Control Byte 1). However, if the TSC-initiated scan function mode is issued (by setting the PSM bit in the CFR0 register to '1'), the CFN0 or CFN1 bit will not be reset when the corresponding converter function is complete because there is no pen touch. This event allows the TSC2006 to immediately initiate the scan process (corresponding to CFN0 or CFN1 set to '1') when the next pen touch is detected. Table 26. STATUS Register (Reset Value = 0004h) MSB D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 LSB D0 DAV Due X DAV Due Y DAV Due Z1 DAV Due Z2 DAV Due AUX DAV Due TEMP1 DAV Due TEMP2 RESRVD (read '0') RESET Flag X CON Y CON RESRVD (read '0') Y SHR PDST ID1 ID0 DAV Bits--Data available bits. These seven bits mirror the operation of the internal signals of DAV. When any processed data are stored in data registers, the corresponding DAV bit is set to '1'. It stays at '1' until the register(s) updated to the processed data have been read out by the host. Table 27. DAV Function DAV DESCRIPTION 0 No new processed data are available. 1 Processed data are available. This bit stays at 1 until the host has read out all updated registers. RESET Flag--See Table 28 for the interpretation of the RESET flag bits. Table 28. RESET Flag Bits RESET Flag DESCRIPTION 0 Device was reset since last status poll (hardware or software reset). 1 Device has not been reset since last status poll. X CON--This bit is '1' if the X axis of the touch screen panel is properly connected to the X drivers. This bit is the connection test result. Y CON--This bit is '1' if the Y axis of the touch screen panel is properly connected to the Y drivers. This bit is the connection test result. Y SHR--This bit is '1' if there is no short-circuit tested at the Y axis of the touch screen panel. This bit is the short-circuit test result. PDST--Power down status. This bit reflects the setting of the PND0 bit in Control Byte 0. When this bit shows '0', it indicates A/D converter bias circuitry is still powered on after each conversion and before the next sampling; otherwise, it indicates A/D converter bias circuitry is powered down after each conversion and before the next sampling. However, it is powered down between conversion sets. Because this status bit is synchronized with the internal clock, it does not reflect the setting of the PND0 bit until a pen touch is detected or a converter function is running. ID[1:0] Device ID bits: These bits represent the version ID of TSC2006. This version defaults to '00'. 30 Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 TSC2006 www.ti.com ......................................................................................................................................................... SBAS415C - JUNE 2007 - REVISED MARCH 2009 DATA REGISTERS The data registers of the TSC2006 hold data results from conversions. All data registers default to 0000h upon device reset. X, Y, Z1, Z2, AUX, TEMP1 and TEMP2 REGISTERS The results of all A/D conversions are placed in the appropriate data registers, as described in Table 10. The data format of the result word (R) of these registers is right-justified, as shown in Table 29. Table 29. Internal Register Format MSB D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 LSB D0 0 0 0 0 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 Register Map The TSC2006 has several 16-bit registers that allow control of the device, as well as providing a location to store results from the TSC2006 until read out by the host microprocessor. Table 30 shows the memory map. Table 30. Register Content and Reset Values (1) D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 RESET VALUE (HEX) 0 X 0 0 0 0 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 0000 1 Y 0 0 0 0 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 0000 2 Z1 0 0 0 0 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 0000 3 Z2 0 0 0 0 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 0000 4 AUX 0 0 0 0 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 0000 5 Temp1 0 0 0 0 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 0000 6 Temp2 0 0 0 0 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 0000 (2) S3 S2 S1 S0 0004 0FFF A3-A0 (HEX) (1) (2) REGISTER NAME 7 Status 8 9 Rsvd S15 S14 S13 S12 S11 S10 S9 0 S7 S6 S5 AUX High 0 0 0 0 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 AUX Low 0 0 0 0 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 0000 A Temp High 0 0 0 0 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 0FFF B Temp Low 0 0 0 0 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 0000 C CFR0 R15 R14 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 4000 D CFR1 0 0 0 0 R11 R10 R9 R8 0 0 0 0 0 R2 R1 R0 0000 E CFR2 R15 R14 R13 R12 R11 R10 R9 R8 R7 R6 0 R4 R3 R2 R1 R0 0000 F Converter Function Select Status R15 R14 R13 R12 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 0000 Rsvd (2) For all combination bits, the pattern marked as Reserved must not be used. The default pattern is read back after reset. This bit is reserved. Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 31 TSC2006 SBAS415C - JUNE 2007 - REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com REGISTER RESET There are three way to reset the TSC2006. First, at power-on, a power good signal generates a prolonged reset pulse internally to all registers. Second, an external pin, RESET, is available to perform a system reset or allow other peripherals (such as a display) to reset the device if the pulse meets the timing requirement (at least 10s wide). Any RESET pulse less than 5s is rejected. To accommodate the timing drift between devices because of process variation, a RESET pulse width between 5s to 10s falls into the gray area that is not recognized, and the result is undetermined; this situation should be avoided. Refer to Figure 34 for details. A good reset pulse must be low for at least 10s. There is an internal spike filter to reject spikes up to 20ns wide. tWL(RESET) < 5ms tR tR tWL(RESET) 10ms RESET State Normal Operation Resetting Initial Condition NOTE: See Timing Requirements for more information. Figure 34. External Reset Timing Finally, a software reset can be activated by writing a '1' to CB1.1 (bit 1 of control byte 1). It should be noted this reset is not self-clearing, so the user must write a '0' to remove the software reset. A reset clears all registers and loads default values. A power-on reset and external (hardware) reset take precedence over a software reset. If a software reset is not cleared by the user, it is cleared by either a power-on reset or an external (hardware) reset. 32 Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 TSC2006 www.ti.com ......................................................................................................................................................... SBAS415C - JUNE 2007 - REVISED MARCH 2009 THEORY OF OPERATION TOUCH SCREEN MEASUREMENTS As noted previously in the discussion of the A/D converter, several operating modes can be used that allow great flexibility for the host processor. This section examines these different modes. Conversion Controlled by TSC2006 Initiated by TSC2006 (TSMode 1) In TSMode 1, before a pen touch can be detected, the TSC2006 must be programmed with PSM = 1 and one of two scan modes: 1. X-Y-Z Scan (converter function select bits C[3:0] = Control Byte 1 D[6:3] = 0000); or 2. X-Y Scan (converter function select bits C[3:0] = Control Byte 1 D[6:3] = 0001). See Table 7 for more information on the converter function select bits. When the touch panel is touched, and the internal pen-touch signal to activates, the PINTDAV output is lowered if it is programmed as PENIRQ. The TSC2006 then executes the preprogrammed scan function without a host intervention. At the same time, the TSC2006 starts up its internal clock. It then turns on the Y-drivers, and after a programmed panel voltage stabilization time, powers up the A/D converter and converts the Y coordinate. If preprocessing is selected, several conversions may take place. When data preprocessing is complete, the Y coordinate result is stored in a temporary register. If the screen is still touched at this time, the X-drivers are enabled, and the process repeats, but measures the X coordinate instead, and stores the result in a temporary register. If only X and Y coordinates are to be measured, then the conversion process is complete. A set of X and Y coordinates are stored in the X and Y registers. Figure 35 shows a flowchart for this process. The time it takes to go through this process depends upon the selected resolution, internal conversion clock rate, panel voltage stabilization time, precharge and sense times, and whether preprocessing is selected. The time needed to get a complete X and Y coordinate (sample set) reading can be calculated by: f L OH DLY1 t COORDINATE + OH1 )2 @ t PVS)t PRE)t SNS) )2 @ N @ (B)2) @ OSC )OHCONV @ 1 ) PPRO f OSC f OSC f ADC f OSC f OSC (5) Where: tCOORDINATE = time to complete X/Y coordinate reading. tPVS = panel voltage stabilization time, as given in Table 16. tPRE = precharge time, as given in Table 17. tSNS = sense time, as given in Table 18. N = number of measurements for MAV filter input, as given in Table 3 as N. (For no MAV: M1-0[1:0] = '00', W1-0[1:0] = '00', N = 1.) B = number of bits of resolution. fOSC = TSC onboard OSC clock frequency. See Electrical Characteristics for supply frequency (SNSVDD). fADC = A/D converter clock frequency, as given in Table 15. OH1 = overhead time #1 = 2.5 internal clock cycles. OHDLY1 = total overhead time for tPVS, tPRE, and tSNS = 10 internal clock cycles. OHCONV = total overhead time for A/D conversion = 3 internal clock cycles. LPPRO = preprocessor preprocessing time as given in Table 31. Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 33 TSC2006 SBAS415C - JUNE 2007 - REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com Table 31. Preprocessing Delay LPPRO = M= W= FOR B = 12 BIT 1 1, 4, 8, 16 2 2 3, 7 1 28 24 7 3 31 27 15 1 31 29 15 3 34 32 15 7 38 36 Programmed for Self-Control (PSM = 1) X-Y Scan Mode (Control Byte1 D[6:3] = 0001) Reading X-Data Register CS Deactivated FOR B = 10 BIT Reading Y-Data Register tCOORDINATE Detecting Touch PINTDAV Programmed: Sample, Conversion, and Preprocessing for Y Coordinate Touch is Detected Detecting Touch Sample, Conversion, and Preprocessing for X Coordinate Detecting Touch Sample, Conversion, and Preprocessing for Y Coordinate Detecting Touch Touch is Detected As PENIRQ, CFR2, D[15:14] = 10 As DAV, CFR2, D[15:14] = 11 or 01 Touch is Detected As PENIRQ and DAV, CFR2, D[15:14] = 00 Figure 35. Example of X and Y Coordinate Touch Screen Scan using TSMode 1 34 Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 TSC2006 www.ti.com ......................................................................................................................................................... SBAS415C - JUNE 2007 - REVISED MARCH 2009 If the pressure of the touch is also to be measured, the process continues in the same way, but measuring the Z1 and Z2 values instead, and storing the results in temporary registers. Once the complete sample set of data (X, Y, Z1, and Z2) are available, they are loaded in the X, Y, Z1, and Z2 registers. This process is illustrated in Figure 36. As before, this process time depends upon the settings previously described. The time for a complete X, Y, Z1, and Z2 coordinate reading is given by: f L OH DLY1 t COORDINATE + OH2 )3 @ t PVS)t PRE)t SNS) )4 @ N @ (B)2) @ OSC )OHCONV @ 1 ) PPRO f OSC f OSC f ADC f OSC f OSC (6) Where: OH2 = overhead time #2 = 3.5 internal clock cycles. Programmed for Self-Control (PSM = 1) X-Y-Z1-Z2 Scan Mode (Control Byte1 D[6:3] = 0000) Reading X-Data Register CS Deactivated Reading Reading Y-Data Z1-Data Register Register Reading Z2-Data Register tCOORDINATE Detecting Touch Sample, Conversion, Sample, Conversion, Detecting Detecting and Preprocessing for and Preprocessing for Touch Touch X Coordinate Y Coordinate PINTDAV Programmed: Touch is Detected Touch is Detected Sample, Conversion, Sample, Conversion, Detecting and Preprocessing for and Preprocessing for Touch Y Coordinate Z1 Coordinate and Z2 Coordinate Detecting Touch Touch is Detected As PENIRQ, CFR2, D[15:14] = 10 As DAV, CFR2, D[15:14] = 11 or 01 Touch is Detected As PENIRQ and DAV, CFR2, D[15:14] = 00 Figure 36. Example of X, Y, and Z Coordinate Touch Screen Scan using TSMode 1 Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 35 TSC2006 SBAS415C - JUNE 2007 - REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com Conversion Controlled by TSC2006 Initiated by Host (TSMode 2) In TSMode 2, the TSC2006 detects when the touch panel is touched and causes the internal Pen-Touch signal to activate, which lowers the PINTDAV output if it is programmed as PENIRQ. The host recognizes the interrupt request, and then writes to the A/D Converter Control register to select one of the two touch screen scan functions: 1. X-Y-Z Scan (converter function select bits C[3:0] = Control Byte 1 D[6:3] = 0000); or 2. X-Y Scan (converter function select bits C[3:0] = Control Byte 1 D[6:3] = 0001). See Table 7 for more information on the converter function select bits. The conversion process then as shown in Figure 37; see previous sections for more details. The main difference between this mode and the previous mode is that the host, not the TSC2006, decides when the touch screen scan begins. The time needed to convert both X and Y coordinates under host control (not including the time needed to send the command over the SPI bus) is given by: f L OH DLY1 t COORDINATE + OH1 )2 @ t PVS)t PRE)t SNS) )2 @ N @ (B)2) @ OSC )OHCONV @ 1 ) PPRO f OSC f OSC f ADC f OSC f OSC Programmed CS Programmed for Deactivated for HostX-Y Controlled Scan Mode Mode (PSM = 0) CS Deactivated Reading X-Data Register Reading Y-Data Register (7) CS Deactivated tCOORDINATE Detecting Touch PINTDAV Programmed: Waiting for Host to Write Into Control Byte 1 D[6:3] Sample, Conversion, and Preprocessing for Y Coordinate Sample, Conversion, Detecting Sample, Conversion, Detecting Detecting and Preprocessing for and Preprocessing for Touch Touch Touch Y Coordinate X Coordinate Touch is Detected As PENIRQ, CFR2, D[15:14] = 10 Touch is Detected As DAV, CFR2, D[15:14] = 11 or 01 Touch is Still Here As PENIRQ and DAV, CFR2, D[15:14] = 00 Figure 37. Example of an X and Y Coordinate Touch Screen Scan using TSMode 2 36 Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 TSC2006 www.ti.com ......................................................................................................................................................... SBAS415C - JUNE 2007 - REVISED MARCH 2009 Conversion Controlled by Host (TSMode 3) In TSMode 3, the TSC2006 detects when the touch panel is touched and causes the internal Pen-Touch signal to be active, which lowers the PINTDAV output if it is programmed as PENIRQ. The host recognizes the interrupt request. Instead of starting a sequence in the TSC2006, which then reads each coordinate in turn, the host must now control all aspects of the conversion. Generally, upon receiving the interrupt request, the host turns on the X drivers. (NOTE: If drivers are not turned on, the device detects this condition and turns them on before the scan starts. This situation is why the event of Turn On Drivers is shown as optional in Figure 38 and Figure 39.) After waiting for the settling time, the host then addresses the TSC2006 again, this time requesting an X coordinate conversion. The process is then repeated for the Y and Z coordinates. The processes are outlined in Figure 38 and Figure 39. Figure 38 shows two consecutive scans on X and Y. Figure 39 shows a single Z scan. The time needed to convert any single coordinate X or Y under host control (not including the time needed to send the command over the SPI bus) is given by: f L OHDLY2 t COORDINATE + OH1 ) t PRE)t SNS) )N @ (B)2) @ OSC )OH CONV @ 1 ) PPRO f OSC f OSC f OSC f ADC f OSC (8) Where: OHDLY2 = total overhead time for tPRE and tSNS = 6 internal clock cycles. Programmed for: Programmed CS Turn On for HostDeactivated X+ and Controlled XMode (1) Drivers (PSM = 0) X Scan Mode Programmed for: CS Deactivated Reading X-Data Register Turn On Y+ and YDrivers (1) Y Scan Mode tCOORDINATE Detecting Touch PINTDAV Programmed: Waiting for Host to Write Into Control Byte 1 D[6:3] Touch is Detected Sample, Conversion, and Preprocessing for X Coordinate CS Deactivated CS Reading Deactivated Y-Data Register tCOORDINATE Detecting Waiting for Host to Write Into Control Byte 1 D[6:3] Touch Sample, Conversion, and Preprocessing for Y Coordinate Detecting Touch Waiting for Host to Write Into Control Byte 1 D[6:3] Touch is Detected Touch is Detected As PENIRQ, CFR2, D[15:14] = 10 As DAV, CFR2, D[15:14] = 11 or 01 As PENIRQ and DAV, CFR2, D[15:14] = 00 NOTE: (1) Optional. If not turned on, it will be turned on by the Scan mode, once detected. Figure 38. Example of X and Y Coordinate Touch Screen Scan using TSMode 3 Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 37 TSC2006 SBAS415C - JUNE 2007 - REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com The time needed to convert any Z1 and Z2 coordinate under host control (not including the time needed to send the command over the SPI bus) is given by: f L OHDLY2 t COORDINATE + OH2 ) t PRE)t SNS) )N @ (B)2) @ OSC )OH CONV @ 1 ) PPRO f OSC f OSC f OSC f ADC f OSC (9) Programmed for: Turn On Programmed CS Y+ for Deactivated Host-Controlled and Mode X(PSM = 0) Drivers(1) CS Deactivated Z Scan Mode Reading Z1-Data Register CS Deactivated Reading Z2-Data Register tCOORDINATE Detecting Touch Waiting for Host to Write Into Control Byte 1 D[6:3] PINTDAV Programmed: Sample, Conversion, Sample, Conversion, and Preprocessing and Preprocessing for Z1 Coordinate for Z2 Coordinate Detecting Touch Touch is Detected Waiting for Host to Write Into Control Byte 1 D[6:3] Touch is Detected As PENIRQ, CFR2, D[15:14] = 10 As DAV, CFR2, D[15:14] = 11 or 01 As PENIRQ and DAV, CFR2D[15:14] = 00 NOTE: (1) Optional. If not turned on, it will be turned on by the Scan mode, once detected. Figure 39. Example of Z1 and Z2 Coordinate Touch Screen Scan (without Panel Stabilization Time) using TSMode 3 If the drivers are not turned on befire the touch screen mode is programmed, the panel stabilization time should be included. In this case, the time needed to convert an single X or Y under host control (not including the time needed to send the command over the SPI bus) is given by: f L OH DLY1 t COORDINATE + OH2 ) t PVS)t PRE)t SNS) )N @ (B)2) @ OSC )OHCONV @ 1 ) PPRO f OSC f OSC f OSC f ADC f OSC CS Deactivated Programmed for Host-Controlled Mode (PSM = 0) Programmed for Z1-Z2 Scan Mode CS Deactivated Reading Z1-Data Register Reading Z2-Data Register (10) CS Deactivated tCOORDINATE Detecting Touch Waiting for Host to Write Into Control Byte 1 D[6:3] PINTDAV Programmed: Sample, Conversion, and Preprocessing for Z1, Z2 Coordinates Detecting Touch Waiting for Host to Write Into Control Byte 1 D[6:3] Touch is Detected As PENIRQ, CFR2, D[15:14] = 10 As DAV, CFR2, D[15:14] = 11 or 01 Touch is Still Here As PENIRQ and DAV, CFR2D[15:14] = 00 Figure 40. Example of a Z1 and Z2 Coordinate Touch Screen Scan (with Panel Stabilization Time) using TSMode 3 38 Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 TSC2006 www.ti.com ......................................................................................................................................................... SBAS415C - JUNE 2007 - REVISED MARCH 2009 The time needed to convert any single coordinate (either X or Y) under host control (not including the time needed to send the command over the SPI bus) is given by: f L OH DLY1 t COORDINATE + OH1 ) t PVS)t PRE)t SNS) )N @ (B)2) @ OSC )OHCONV @ 1 ) PPRO f OSC f OSC f OSC f ADC f OSC CS Deactivated Programmed for Host-Controlled Mode (PSM = 0) Programmed for X Scan Mode CS Deactivated (11) CS Deactivated Reading X-Data Register tCOORDINATE Detecting Touch Waiting for Host to Write Into Control Byte 1 D[6:3] Sample, Conversion, and Preprocessing for X Coordinate Detecting Touch Waiting for Host to Write Into Control Byte 1 D[6:3] PINTDAV Programmed: Touch is Detected As PENIRQ, CFR2, D[15:14] = 10 As DAV, CFR2, D[15:14] = 11 or 01 Touch is Still Here As PENIRQ and DAV, CFR2, D[15:14] = 00 Figure 41. Example of a Single X Coordinate Touch Screen Scan (with Panel Stabilization Time) using TSMode 3 Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 39 TSC2006 SBAS415C - JUNE 2007 - REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com AUXILIARY AND TEMPERATURE MEASUREMENT The TSC2006 can measure the voltage from the auxiliary input (AUX) and from the internal temperature sensor. Applications for the AUX can include external temperature sensing, ambient light monitoring for controlling backlighting, or sensing the current drawn from batteries. There are two converter functions that can be used for the measurement of the AUX: 1. Non-continuous AUX measurement shown in Figure 42 (converter function select bits C[3:0] = Control Byte 1 D[6:3] = 0101); or 2. Continuous AUX Measurement shown in Figure 43 (converter function select bits C[3:0] = Control Byte 1 D[6:3] = 1000). See Table 7 for more information on the converter function select bits. There are also two converter functions for the measurement of the internal temperature sensor: 1. TEMP1 measurement (converter function select bits C[3:0] = Control Byte 1 D[6:3] = 0110); or 2. TEMP2 measurement (converter function select bits C[3:0] = Control Byte 1 D[6:3] = 0111). See Table 7 for more information on the converter function select bits. For the detailed calculation of the internal temperature sensor, please see the Internal Temperature Sensor section. These two converter functions have the same timing as the non-continuous AUX measurement operation as shown in Figure 42; therefore, Equation 12 can also be used for internal temperature sensor measurement. The time needed to make a non-continuous auxiliary measurement or an internal temperature sensor measurement is given by: f L t COORDINATE + OH3 )N @ (B)2) @ OSC )OH CONV @ 1 ) PPRO f OSC f OSC f ADC f OSC (12) Where: OH3 = overhead time #3 = 3.5 internal clock cycles. CS Deactivated Programmed for Non-Continuous AUX Measurement CS Deactivated CS Deactivated Reading AUX-Data Register tCOORDINATE No Touch Detected Host Write to Control Byte 1 D[6:3] Sample, Conversion, and Averaging for AUX Measurement No Touch Detected Waiting for Host to Read AUX Data As DAV Figure 42. Non-Touch Screen, Non-Continuous AUX Measurement The time needed to make continuous auxiliary measurement is given by: f L t COORDINATE + OH3 )N @ (B)2) @ OSC )OH CONV @ 1 ) PPRO f OSC f OSC f ADC f OSC CS Deactivated No Touch Detected Programmed for Continuous AUX Measurement Host to Write to Control Byte 1 D[6:3] (13) CS Deactivated Reading AUX-Data Register CS Deactivated CS Reading Deactivated AUX-Data Register tCOORDINATE tCOORDINATE tCOORDINATE Sample, Conversion, and Averaging for AUX Measurement Sample, Conversion, and Averaging for AUX Measurement Sample, Conversion, and Averaging for AUX Measurement As DAV Figure 43. Non-Touch Screen, Continuous AUX Measurement 40 Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 TSC2006 www.ti.com ......................................................................................................................................................... SBAS415C - JUNE 2007 - REVISED MARCH 2009 LAYOUT The following layout suggestions should obtain optimum performance from the TSC2006. Keep in mind that many portable applications have conflicting requirements for power, cost, size, and weight. In general, most portable devices have fairly clean power and grounds because most of the internal components are very low power. This situation would mean less bypassing for the converter power and less concern regarding grounding. However, each application is unique and the following suggestions should be reviewed carefully. For optimum performance, care should be taken with the physical layout of the TSC2006 circuitry. The basic SAR architecture is sensitive to glitches or sudden changes on the power supply, reference, ground connections, and digital inputs that occur just before latching the output of the analog comparator. Therefore, during any single conversion for an n-bit SAR converter, there are n windows in which large external transient voltages can easily affect the conversion result. Such glitches might originate from switching power supplies, nearby digital logic, and high power devices. The degree of error in the digital output depends on the reference voltage, layout, and the exact timing of the external event. The error can change if the external event changes in time with respect to the SCLK input. With this possibility in mind, power to the TSC2006 should be clean and well-bypassed. A 0.1F ceramic bypass capacitor should be added between (SNSVDD to AGND and SNSGND) or (I/OVDD to DGND). A 0.1F decoupling capacitor between VREF to AGND is also needed unless the SNSVDD is used as a reference input and is connected to VREF. These capacitors must be placed as close to the device as possible. A 1F to 10F capacitor may also be needed if the impedance of the connection between SNSVDD and the power supply is high. The I/OVDD must be shorted to the same supply plane as the SNSVDD. Short both SNSVDD and I/OVDD to the analog VDD plane. The A/D converter architecture offers no inherent rejection of noise or voltage variation with regard to using an external reference input, which is of particular concern when the reference input is tied to the power supply for auxiliary input and temperature measurements. Any noise and ripple from the supply appear directly in the digital results. While high-frequency noise can be filtered out by the built-in MAV filter, voltage variation as a result of line frequency (50Hz or 60Hz) can be difficult to remove. Some package options have pins labeled as NC (no connection). It is recommended that these NC pins be connected to the ground plane. Avoid any active trace going under the analog pins listed in the Pin Assignments table, unless it is shielded by a ground or power plane. All GND (AGND, DGND, SUBGND and SNSGND) pins should be connected to a clean ground point. In many cases, this point is the analog ground. Avoid connections that are too near the grounding point of a microcontroller or digital signal processor. If needed, run a ground trace directly from the converter to the power-supply entry or battery connection point. The ideal layout includes an analog ground plane dedicated to the converter and associated analog circuitry. In the specific case of use with a resistive touch screen, care should be taken with the connection between the converter and the touch screen. Because resistive touch screens have fairly low resistance, the interconnection should be as short and robust as possible. Loose connections can be a source of error when the contact resistance changes with flexing or vibrations. As indicated previously, noise can be a major source of error in touch-screen applications (for example, applications that require a back-lit LCD panel). This electromagnetic interfence (EMI) noise can be coupled through the LCD panel to the touch screen and cause flickering of the converted A/D converter data. Several things can be done to reduce this error; for example, use a touch screen with a bottom-side metal layer connected to ground to couple the majority of noise to ground. Another way to filter out this type of noise is by using the TSC2006 built-in MAV filter (see the Preprocessing section). Filtering capacitors, from Y+, Y-, X+, and X- to ground, can also help. Note, however, that the use of these capacitors increases screen settling time and requires longer panel voltage stabilization times, and also increases precharge and sense times for the PINTADV circuitry of the TSC2006. The resistor value varies depending on the touch screen sensor used. The internal 50k pull-up resistor (RIRQ) may be adequate for most of sensors. Submit Documentation Feedback Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 41 TSC2006 SBAS415C - JUNE 2007 - REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision B (March 2008) to Revision C .................................................................................................. Page * * * Deleted "Target" from Air Gap Discharge bullet .................................................................................................................... 1 Deleted "Target" from Contact Discharge bullet .................................................................................................................... 1 Changed XTQFN package availability to Q4, 2009............................................................................................................... 1 Changes from Revision A (November 2007) to Revision B ........................................................................................... Page * * * * * * * * * 42 Changed resistance ratio from 80 to 91 .............................................................................................................................. Changed resistance ratio from 80 to 91 .............................................................................................................................. Changed T factor from 2.648 to 2.573................................................................................................................................. Changed Equation 8; moved paren ..................................................................................................................................... Changed Equation 9; moved paren ..................................................................................................................................... Changed Equation 10; moved paren ................................................................................................................................... Changed Equation 11; moved paren ................................................................................................................................... Changed Equation 12; moved paren ................................................................................................................................... Changed Equation 13; moved paren ................................................................................................................................... Submit Documentation Feedback 14 14 14 37 38 38 39 40 40 Copyright (c) 2007-2009, Texas Instruments Incorporated Product Folder Link(s): TSC2006 PACKAGE OPTION ADDENDUM www.ti.com 17-Nov-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TSC2006IRTJR ACTIVE QFN RTJ 20 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TSC2006IRTJRG4 ACTIVE QFN RTJ 20 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TSC2006IRTJT ACTIVE QFN RTJ 20 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TSC2006IRTJTG4 ACTIVE QFN RTJ 20 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TSC2006IRTJR QFN RTJ 20 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 TSC2006IRTJT QFN RTJ 20 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TSC2006IRTJR QFN RTJ 20 3000 367.0 367.0 35.0 TSC2006IRTJT QFN RTJ 20 250 210.0 185.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. 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