May 2012
© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN6862R/L • Rev. 1.0.1
FAN6862R/L — Highly Integrated Green-Mode PWM Controller
FAN6862R / FAN6862L
Highly Integrated Green-Mode PWM Controller
Features
Low Startup Current: 8µA
Low Operating Current in Green Mode: 3mA
Peak-Current-Mode Operation with Cycle-by-Cycle
Current Limiting
PWM Frequency Continuously Decreasing with
Burst Mode at Light Loads
VDD Over-Voltage Protection (OVP)
Constant Output Power Limit (Full AC Input Range)
Over-Temperature Protection (OTP)
Fixed PWM Frequency (65KHz) with Frequency
Hopping
Feedback Open-Loop Protection with 56ms Delay
Soft-Start Time: 5ms
400mA Driving Capability
Applications
General-purpose switch-mode power supplies and
flyback power converters, including:
Power Adapters
Open-Frame SMPS
SMPS with Surge-Current Output, such as for
Printers, Scanners, and Motor Drivers
Description
A highly integrated PWM controller, FAN6862R/L
provides several features to enhance the performance
of flyback converters. To minimize standby power
consumption, a proprietary green-mode function
provides off-time modulation to continuously decrease
the switching frequency under light-load conditions.
Under zero-load conditions, the power supply enters
burst mode, which completely shuts off PWM output.
Output restarts just before the supply voltage drops
below the UVLO lower limit. This green-mode function
enables power supplies to meet international power
conservation requirements.
The FAN6862R/L is designed for SMPS and integrates
a frequency-hopping function that helps reduce EMI
emission of a power supply with minimum line filters.
The built-in synchronized slope compensation is
proprietary sawtooth compensation for constant output
power limit over universal AC input range. The gate
output is clamped at 18V to protect the external
MOSFET from over-voltage damage.
Other protection functions include VDD over-voltage
protection, over-temperature protection, and overload
protection. For over-temperature protection, an external
NTC thermistor can be applied to sense the ambient
temperature. When OVP, OTP, or OLP is activated, an
internal protection circuit switches off the controller.
Part Number OVP OTP OLP
FAN6862RTY Auto Restart Auto Restart Auto Restart
FAN6862LTY Latch Latch Latch
Ordering Information
Part Number Operating Temperature Range Package Packing Method
FAN6862RTY -40 to +105°C 6-Pin SSOT-6 Tape & Reel
FAN6862LTY -40 to +105°C 6-Pin SSOT-6 Tape & Reel
© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN6862R/L • Rev. 1.0.1 2
FAN6862R/L — Highly Integrated Green-Mode PWM Controller
Typical Application
Figure 1. Typical Application
Block Diagram
Figure 2. Block Diagram
© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN6862R/L • Rev. 1.0.1 3
FAN6862R/L — Highly Integrated Green-Mode PWM Controller
Marking Information
ABxTT
••••
---
Figure 3. Top Mark
Pin Configuration
Figure 4. Pin Assignments
Pin Definitions
Pin # Name Function Description
1 GND Ground Ground
2 FB Feedback
The FB pin provides the output voltage regulation signal. It provides feedback to the
internal PWM comparator for control of the duty cycle. This pin also provide for
OLP: if VFB is larger than the trigger level and remains for a long time, the controller
stops and restarts.
3 RT
Temperature
Detection
An external NTC thermistor is connected from this pin to GND for over-temperature
protection. The impedance of the NTC decreases at high temperatures. Once the
voltage of the RT pin drops below a threshold, PWM output is disabled.
4 SENSE Current
Sense
This pin senses the voltage across a resistor. When the voltage reaches the internal
threshold, PWM output is disabled. This activates over-current protection. This pin
also provides current amplitude information for current-mode control.
5 VDD Power Supply Power supply
6 GATE Driver Output The totem-pole output driver for driving the power MOSFET.
ABx: ABA: FAN6862LTY
ABC: FAN6862RTY
TT: Wafer Lot Code
: Year Code
_ _ _: Week Code
© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN6862R/L • Rev. 1.0.1 4
FAN6862R/L — Highly Integrated Green-Mode PWM Controller
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only. All voltage values, except differential voltages, are given with
respect to GND pin.
Symbol Parameter Min. Max. Unit
VDD Supply Voltage 30 V
VL Input Voltage to FB, SENSE, RT Pin -0.3 7.0 V
PD Power Dissipation at TA<50°C 300 mW
ΘJC Thermal Resistance (Junction-to-Case) 115 °C/W
TJ Operating Junction Temperature -40 +150 °C
TSTG Storage Temperature Range -55 +150 °C
TL Lead Temperature, Wave Soldering, 10 Seconds +260 °C
ESD Human Body Model, JESD22-A114 3.00 kV
Charge Device Model, JESD22-C101 1.25
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol Parameter Min. Max. Unit
TA Operating Ambient Temperature -40 +105 °C
© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN6862R/L • Rev. 1.0.1 5
FAN6862R/L — Highly Integrated Green-Mode PWM Controller
Electrical Characteristics
VDD = 15V and TA = 25°C unless otherwise noted.
Symbol Parameter Test Condition Min. Typ. Max. Unit
VDD Section
VDD-OP Continuously Operating Voltage 24 V
VDD-ON Turn-On Threshold Voltage 15 16 17 V
VDD-OFF Turn-Off Voltage 7.5 8.5 9.5 V
VDD-OVP V
DD Over-Voltage Protection (Latch-Off) 24 25 26 V
VDD-LH Threshold Voltage for Latch-Off Release 3 4 5 V
IDD-ST Startup Current VDD-ON–0.16V 8 30 μA
IDD-OP Normal Operating Supply Current CL=1nF 3 4 mA
IDD-BM Green-Mode Operating Supply Current GATE Open,
VFB=VFB-G 2.5 mA
VDD-OVP V
DD Over-Voltage Protection 24 25 26 V
tD-VDDOVP V
DD OVP Debounce Time 30 50 μs
IDD-LH Latch-Off Holding Current VDD=5V 40 65 μA
Feedback Input Section
AV Input-Voltage to Current-Sense Attenuation 1/4.0 1/3.5 1/3.0 V/V
ZFB Input Impedance 5.5 k
VFB-OPEN FB Pin Open Voltage 5.0 5.2 5.4 V
VFB-OLP Threshold Voltage for Open-Loop Protection 4.3 4.6 4.9 V
tD-OLP Open-Loop Protection Delay Time 53 56 60 ms
Current Sense Section
tPD Delay to Output 100 250 ns
tLEB Leading-Edge Blanking Time 270 360 ns
VSTHFL Flat Threshold Voltage for Current Limit Duty>51% 0.47 0.50 0.53 V
VSTHVA Valley Threshold Voltage for Current Limit Duty=0% 0.41 0.44 0.47 V
VSLOPE Slope Compensation Duty=DCYMAX 0.273 V
tSOFT-START Period During Startup Time 2.50 4.00 5.25 ms
Oscillator Section
fOSC Normal PWM Frequency
Center Frequency VFB>VFB-N 62 65 68
kHz
Hopping Range VFBVFB-N ±3.7 ±4.2 ±4.7
Hopping Range*1 V
FB=VFB-G ±2.9
thop-1 Hopping Period 1*1 V
FBVFB-N 4.4 ms
thop-3 Hopping Period 3*1 V
FB=VFB-G 11.5 ms
fOSC-G Green Mode Minimum Frequency 18.0 22.5 25.0 kHz
VFB-N FB Threshold Voltage For Frequency
Reduction 2.3 2.5 2.7 V
VFB-G FB Voltage at fOSC-G 1.9 2.1 2.3 V
VFB-ZDC FB Threshold Voltage for Zero Duty 1.7 V
fDV Frequency Variation vs. VDD Deviation VDD=11.5V to 20V 0 0.02 2.00 %
fDT Frequency Variation vs. Temperature
Deviation TA= -40 to +105°C 2 %
Continued on the following page…
© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN6862R/L • Rev. 1.0.1 6
FAN6862R/L — Highly Integrated Green-Mode PWM Controller
Electrical Characteristics (Continued)
VDD = 15V and TA = 25°C unless otherwise noted.
Symbol Parameter Test Condition Min. Typ. Max. Unit
PWM Output Section
DCYMAX Maximum Duty Cycle 65 70 75 %
VOL Output Voltage Low VDD=15V, IO=50mA 1.5 V
VOH Output Voltage High VDD=8V, IO=50mA 6 V
tR Rising Time CL=1nF 150 200 ns
tF Falling Time CL=1nF 35 80 ns
VCLAMP Gate Output Clamping Voltage VDD=20V 15.0 16.5 18.0 V
Over-Temperature Protection (OTP) Section
IRT Output Current of RT Pin 92 100 108 μA
VOTP
Threshold Voltage for Over-Temperature
Protection TA=25°C 0.97 1.02 1.07 V
tDOTP Over-Temperature Debounce Time VFB=VFB-N 15 17 19 ms
VFB=VFB-G
(1) 51
VOTP2
2nd Threshold Voltage for Over-
Temperature Protection TA=25°C 0.60 0.70 0.75 V
tDOTP2 2nd Over-Temperature Debounce Time 80 100 190 μs
Note:
1. Guarantee by design.
© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN6862R/L • Rev. 1.0.1 7
FAN6862R/L — Highly Integrated Green-Mode PWM Controller
Typical Performance Characteristics
15
15.4
15.8
16.2
16.6
17
-40 -30 -15 0 25 50 75 85 100 125
Temperature (ºC)
V
DD-ON
(V)
7.5
7.9
8.3
8.7
9.1
9.5
-40 -30 -15 0 25 50 75 85 100 125
Temperature (ºC)
V
DD-OFF
(V)
Figure 5. Turn-On Threshold Voltage (VDD-ON)
vs. Temperature
Figure 6. Turn-Off Threshold Voltage (VDD-OFF)
vs. Temperature
2.5
2.9
3.3
3.7
4.1
4.5
-40 -30 -15 0 25 50 75 85 100 125
Temperature (ºC)
IDD-OP (mA)
24
24.4
24.8
25.2
25.6
26
-40 -30 -15 0 25 50 75 85 100 125
Temperature (ºC)
VDD-OVP (V)
Figure 7. Operating Current (IDD-OP) vs. Temperature Figure 8. VDD Over-Voltage Protection (VDD-OVP)
vs. Temperature
62
63
64
65
66
67
68
-40 -30 -15 0 25 50 75 85 100 125
Temperature (ºC)
f
OSC
(KHz)
2.2
2.3
2.4
2.5
2.6
2.7
-40 -30 -15 0 25 50 75 85 100 125
Temperature (ºC)
VFB-N (V)
Figure 9. Center Frequency (fOSC) vs. Temperature Figure 10. FB Threshold Voltage for Frequency
Reduction (VFB-N) vs. Temperature
© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN6862R/L • Rev. 1.0.1 8
FAN6862R/L — Highly Integrated Green-Mode PWM Controller
Typical Performance Characteristics (Continued)
1.8
1.9
2
2.1
2.2
2.3
-40 -30 -15 0 25 50 75 85 100 125
Temperature (ºC)
VFB-G (V)
4.3
4.4
4.5
4.6
4.7
4.8
4.9
-40 -30 -15 0 25 50 75 85 100 125
Temperature (ºC)
VFB-OLP (V)
Figure 11. FB Voltage at fOSC-G (VFB-G) vs. Temperature Figure 12. Threshold Voltage for Open-Loop
Protection (VFB-OLP) vs. Temperature
53
54
55
56
57
58
59
-40 -30 -15 0 25 50 75 85 100 125
Temperature (ºC)
tD-OLP (mS)
0.4
0.44
0.48
0.52
0.56
0.6
-40 -30 -15 0 25 50 75 85 100 125
Temperature (ºC)
V
STHFL
(V)
Figure 13. Open-Loop Protection Delay Time (tD-OLP)
vs. Temperature
Figure 14. Flat Threshold Voltage for Current Limit
(VSTHFL) vs. Temperature
0.35
0.39
0.43
0.47
0.51
0.55
-40 -30 -15 0 25 50 75 85 100 125
Temperature (ºC)
V
STHVA
(V)
2
3
4
5
6
7
-40 -30 -15 0 25 50 75 85 100 125
Temperature (ºC)
tSOFT-START (mS)
Figure 15. Valley Threshold Voltage for Current Limit
(VSTHVA) vs. Temperature
Figure 16. Period during Startup (tSOFT-START)
vs. Temperature
© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN6862R/L • Rev. 1.0.1 9
FAN6862R/L — Highly Integrated Green-Mode PWM Controller
Typical Performance Characteristics (Continued)
67
68
69
70
71
72
-40 -30 -15 0 25 50 75 85 100 125
Temperature (ºC)
DCYMAX (%)
80
100
120
140
160
180
-40 -30 -15 0 25 50 75 85 100 125
Temperature (ºC)
tR (nS)
Figure 17. Maximum Duty Cycle (DCYMAX)
vs. Temperature
Figure 18. Rising Time (tR) vs. Temperature
20
30
40
50
60
70
-40 -30 -15 0 25 50 75 85 100 125
Temperature (ºC)
tF (nS)
80
88
96
104
112
120
-40 -30 -15 0 25 50 75 85 100 125
Temperature (ºC)
IRT (μA)
Figure 19. Falling Time (tF) vs. Temperature Figure 20. Output Current of RT Pin (IRT)
vs. Temperature
© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN6862R/L • Rev. 1.0.1 10
FAN6862R/L — Highly Integrated Green-Mode PWM Controller
Operation Description
Startup Operation
Figure 21 shows a typical startup circuit and transformer
auxiliary winding for a typical application. Before
FAN6862R/L begins switching operation, it consumes
only startup current (typically 8μA) and the current
supplied through the startup resistor charges the VDD
capacitor (CDD). When VDD reaches the turn-on voltage
of 16V (VDD-ON), FAN6862R/L begins switching and the
current consumed increases to 3mA. Then the power
required is supplied from the transformer auxiliary
winding. The large hysteresis of VDD (8.5V) provides
more holdup time, which allows using a small capacitor
for VDD. The startup resistor is typically connected to AC
line for a fast reset of latch protection.
Figure 21. Startup Circuit
Green-Mode Operation
The FAN6862R/L uses feedback voltage (VFB) as an
indicator of the output load and modulates the PWM
frequency, as shown in Figure 22, such that the
switching frequency decreases as load decreases. In
heavy-load conditions, the switching frequency is
65KHz. Once VFB decreases below VFB-N (2.5V), the
PWM frequency starts to linearly decrease from 65KHz
to 22.5kHz to reduce the switching losses. As VFB
decreases below VFB-G (2.1V), the switching frequency is
fixed at 22.5kHz and FAN6862R/L enters “deep” green
mode, where the operating current decreases to 2.5mA
(maximum), further reducing the standby power
consumption. As VFB decreases below VFB-ZDC (1.7V),
FAN6862R/L enters burst-mode operation. When VFB
drops below VFB-ZDC, switching stops and the output
voltage starts to drop, which causes the feedback
voltage to rise. Once VFB rises above VFB-ZDC, switching
resumes. Burst mode alternately enables and disables
switching, thereby reducing switching loss in standby
mode, as shown in Figure 23.
VV FB -NFB -G FB
V
Frequency
FB-ZDC
V
PWM
Frequency
65kHz
+4.2kHz
-4.2kHz
22.5kHz
+2.9kHz
-2.9kHz
Figure 22. PWM Frequency
Figure 23. Burst-Mode Operation
Frequency Hopping
EMI reduction is accomplished by frequency hopping,
which spreads the energy over a wider frequency range
than the bandwidth measured by the EMI test
equipment. An internal frequency hopping circuit
changes the switching frequency between 60.8kHz and
69.2kHz with a period of 4.4ms, as shown in Figure 24.
Figure 24. Frequency Hopping
© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN6862R/L • Rev. 1.0.1 11
FAN6862R/L — Highly Integrated Green-Mode PWM Controller
Protections
Self-protective functions include VDD Over-Voltage
Protection (OVP), Open-Loop / Overload Protection
(OLP), Over-Current Protection (OCP), Short-Circuit
Protection, and Over-Temperature Protection (OTP).
FAN6862R uses auto-restart mode protections and
FAN6862L uses latch-mode protections.
Auto-Restart Mode Protection: Once a fault condition
is detected, switching is terminated and the MOSFET
remains off. This causes VDD to fall because no more
power is delivered from auxiliary winding. When VDD falls
to VDD-OFF (8.5V), the protection is reset and the
operating current reduces to startup current, which
causes VDD to rise. FAN6862R resumes normal
operation when VDD reaches VDD-ON (16V). In this
manner, the auto-restart can alternately enable and
disable the switching of the MOSFET until the fault
condition is eliminated (see Figure 25).
Latch-Mode Protection: Once this protection is
triggered, switching is terminated and the MOSFET
remains off. The latch is reset only when VDD is
discharged below 4V by unplugging AC power line.
Figure 25. Auto-Restart Operation
Over-Current Protection (OCP)
FAN6862R/L has over-current protection thresholds. It is
for pulse-by-pulse current limit, which turns off the
MOSFET for the remainder of the switching cycle when
the sensing voltage of MOSFET drain current reaches
the threshold. The other threshold is for the over-current
protection, which shuts down the MOSFET gate when
the sensing voltage of MOSFET drain current is above
the threshold longer than the shutdown delay (56ms).
Open-Loop / Overload Protection (OLP)
When the upper branch of the voltage divider for the
shunt regulator (KA431 shown) is broken, as shown in
Figure 26, no current flows through the opto-coupler
transistor, which pulls up the feedback voltage to 5.2V.
When the feedback voltage is above 4.6V longer than
56ms, OLP is triggered. This protection is also triggered
when the SMPS output drops below the nominal value
longer than 56ms due to the overload condition.
Figure 26. OLP Operation
VDD Over-Voltage Protection (OVP)
VDD over-voltage protection prevents IC damage caused
by over voltage on the VDD pin. The OVP is triggered
when VDD reaches 25V. A debounce time (typically
30µs) prevents false triggering by switching noise.
Over-Temperature Protection (OTP)
The OTP circuit is composed of current source and
voltage comparators. Typically, an NTC thermistor is
connected between the RT and GND pins. Once the
voltage of this pin drops below a threshold of 1.02V,
PWM output is disabled after tDOTP debounce time. If this
pin drops below 0.7V, it triggers the latch-off protection
immediately after tDOTP2 debounce time.
© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN6862R/L • Rev. 1.0.1 12
FAN6862R/L — Highly Integrated Green-Mode PWM Controller
Constant Output Power Limit
FAN6862R/L has saw-limiter for pulse-by-pulse current
limit, which guarantees almost constant power limit over
different line voltages of universal input range.
The conventional pulse-by-pulse current limiting scheme
has a constant threshold for current limit comparator,
which results in a higher power limit for high line voltage.
FAN6862R/L has a sawtooth current limit threshold that
increases progressively within a switching cycle, which
provides lower current limit for high line and makes the
actual power limit level almost constant over different
line voltages of universal input range, as shown in
Figure 27.
Higher current limit for low line
Lower current limit for high line
MOSFET
Drain current
Sawtooth current limit threshold
Figure 27. Sawtooth Current Limiter
Leading-Edge Blanking (tLEB)
Each time the power MOSFET is switched on, a turn-on
spike occurs across the sense-resistor caused by
primary-side capacitance and secondary-side rectifier
reverse recovery. To avoid premature termination of the
switching pulse, a leading-edge blanking time is built in.
During this blanking period (360ns), the PWM
comparator is disabled and cannot switch off the gate
driver. Thus, RC filter with a small RC time constant is
enough for current sensing.
Figure 28. Current Sense R-C Filter
Soft-Start
The FAN6862R/L has an internal soft-start circuit that
increases pulse-by-pulse current-limit comparator
inverting input voltage slowly after it starts. The typical
soft-start time is 5ms. The pulsewidth to the power
MOSFET is progressively increased to establish the
correct working conditions for transformers, rectifier
diodes, and capacitors. The voltage on the output
capacitors is progressively increased with the intention
of smoothly establishing the required output voltage. It
also helps prevent transformer saturation and reduces
the stress on the secondary diode during startup.
© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN6862R/L • Rev. 1.0.1 13
FAN6862R/L — Highly Integrated Green-Mode PWM Controller
Typical Application Circuit (Netbook Adapter by Flyback)
Application Fairchild Devices Input Voltage Range Output
Netbook Adapter FAN6862R/L 90~265VAC 19V/2.1A (40W)
Features
High efficiency (>85.3% at full load) meeting EPS regulation with enough margin
Low standby (Pin<0.15W at no-load condition)
Soft-start time: 5ms
82
83
84
85
86
87
88
89
90
91
25% 50% 75% 100%
Load (% )
Eff iciency ( %)
O v er Current Pr otecti o n
1
1.5
2
2.5
3
3.5
4
4.5
5
90V 115V 230V 264V
Vac(V)
Io(A)
Figure 29. Measured Efficiency and Over-Current Protection
Figure 30. Schematic of Typical Application Circuit
85.29% (Energy star V2.0)
230VAC 50Hz (89.47% avg)
115VAC 60Hz (89.15% avg)
© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN6862R/L • Rev. 1.0.1 14
FAN6862R/L — Highly Integrated Green-Mode PWM Controller
Typical Application Circuit (Continued)
Transformer Specification
Core: RM 8
Bobbin: RM 8
Figure 31. Transformer Diagram
NO Terminal WIRE Ts
INSULATION BARRIER
S F Ts Primary Secondary
N1 11 10 0.25*1 9 3
N2 3 2 0.25* 1 33 1
11 COPPER SHIELD 1.2 3
N3 Fly- Fly+ 0.5* 2 12 1
11 COPPER SHIELD 1.2 3
N4 2 1 0.25 * 1 33 4
CORE ROUNDING TAPE 3
Pin Specification Remark
Primary-Side Inductance 31 920µH ±5% 100kHz, 1V
Primary-Side Effective Leakage 31 15µH Maximum Short One of the Secondary Windings
© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN6862R/L • Rev. 1.0.1 15
FAN6862R/L — Highly Integrated Green-Mode PWM Controller
Physical Dimensions
Figure 32. 6-Pin, SUPERSOT6 “SSOT-6”, JEDEC MO-193, 1.6mm Wide Package
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’ s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN6862R/L • Rev. 1.0.1 16
FAN6862R/L — Highly Integrated Green-Mode PWM Controller