9
LTC4050
4050f
APPLICATIONS INFORMATION
WUUU
CHRG Status Output Pin (C/10)
When the charge cycle starts, the CHRG pin is pulled to
ground by an internal N-channel MOSFET that can drive an
LED. When the charge current drops to 10% of the full-
scale current (C/10), the N-channel MOSFET turns off and
a weak 32µA current source to ground is connected to the
CHRG pin. After a time-out occurs, the pin goes high
impedance. By using two different value pull-up resistors,
a microprocessor can detect three states from this pin
(charging, C/10 and stop charging). See Figure 1.
When the LTC4050 is in charge mode, the CHRG pin is
pulled low by an internal N-channel MOSFET. To detect
this mode, force the digital output pin, OUT, high and
measure the voltage at the CHRG pin. The N-channel
MOSFET will pull the pin low even with a 2k pull-up
resistor. Once the charge current drops to 10% of the full-
scale current (C/10), the N-channel MOSFET turns off and
a 32µA current source is connected to the CHRG pin. The
IN pin will then be pulled high by the 2k pull-up. By forcing
the OUT pin into a high impedance state, the current
source will pull the pin low through the 400k resistor.
When the internal timer has expired, the CHRG pin will
change to high impedance state and the 400k resistor will
then pull the pin high to indicate charging has stopped.
The CHRG pin open-drain device will turn on if the BAT pin
falls below the trickle charge threshold and the LTC4050
has neither timed out nor been put into shutdown. For
example, if the battery and NTC thermistor are both
disconnected from the typical application circuit, the BAT
voltage will collapse due to the thermal fault and CHRG will
pull low. Entering shutdown by floating the PROG pin will
prevent the CHRG pulldown from turning␣ on.
ACPR Output Pin
The LTC4050 has an ACPR output pin to indicate that the
input supply (wall adapter) is higher than 4V and 54mV or
more above the voltage at the BAT pin. When both condi-
tions are met, the ACPR pin is pulled to ground by an
N-channel MOSFET that is capable of driving an LED.
Otherwise, this pin is in a high impedance state.
Gate Drive
Typically the LTC4050 controls an external P-channel
MOSFET to supply current to the battery. An external PNP
transistor can also be used as the pass transistor instead
of the P-channel MOSFET. Due to the low current gain of
the current amplifier (CA), a high gain Darlington PNP
transistor is recommended to avoid excessive charge
current error. The gain of the current amplifier is around
0.6µA/mV. For every 1µA of base current, a 1.6mV of gain
error shows up at the inputs of CA. With R
PROG
= 19.6k
(100mV across R
SENSE
), it represents 1.67% of error in
charge current.
Battery Detection
The LTC4050 can detect the insertion of a new battery.
When a battery with a voltage of less than 3.88V (for 4.1V
cells) or 3.98V (for 4.2V cells) is inserted, the LTC4050
resets the timer and starts a new charge cycle. If the cell
voltage of the new battery is above 3.88V (for 4.1V cells)
or 3.98V (for 4.2V cells), a new charge cycle will not begin.
If a new battery (with cell voltage above 3.88V) is inserted
while in the charging process, the timer will not be reset,
but will continue until the timer runs out.
After a time out has occurred and the battery remains
connected, a new charge cycle will begin if the battery
voltage drops below the recharge threshold of 3.88V (for
4.1V cells) or 3.98V (for 4.2V cells) due to self-discharge
or external loading.
Stability
The charger is stable without any compensation when a
P-channel MOSFET is used as the pass transistor.
However, a 10µF capacitor is recommended at the BAT
pin to keep the ripple voltage low when the battery is
disconnected.