STBLC01QTR - STMICROELECTRONICS

This is information on a product in full production.

April 2013 DocID022984 Rev 2 1/40

STLBC01

Bluetooth® low energy controller

Datasheet

production data

Features

•Bluetooth specification v4.0 compliant master

and slave BLE controller

•Bluetooth protocol stack for STM32L and

profiles provided separately

•Operating supply voltage from 1.9 to 3.6 V

•13 mA maximum peak current allows standard

coin cell battery usage

•Low power physical layer

•Link layer with embedded security engine

•UART and SPI available as HCI transport

layers

•SPI interface allows proprietary low power

mode to further reduce the power consumption

•ISM 2.4 GHz frequency band

•1 Mbps on-air data rate

•Wide spread and low cost 26 MHz Xtal

•200 Ω differential impedance of antenna port

•Very small number of external discrete

components

•Programmable output power from -18 dBm to

+3 dBm

•Digital RSSI

•Power management with integrated linear

regulator

•Battery level detector function to keep control

of the battery level detection

•Compliant with the following radio frequency

regulations: ETSI EN 300 328, EN 300 440,

FCC CFR47 Part 15, ARIB STD-T66

•QFN 24 5x5 mm RoHS package

•Operating temp. range from -40 °C to 85 °C

Applications

•Watches

•Fitness, wellness and sports

•Consumer medical

•Security/proximity

•Remote control

•Remote sensing

•Home and industrial automation

•Assisted living

•Mobile phone peripherals

•PC peripherals

Description

The STBLC01 is a very low power Bluetooth low

energy (BLE) controller compliant with Bluetooth

specification 4.0. The STBLC01 integrates a low

power physical layer, a link layer with an

embedded security engine, a host controller

interface (HCI), and a power management. The

STBLC01 allows the meeting of the tight

advisable peak current requirements imposed by

the use of standard coin cell batteries, and even

in worst-case operating conditions 13 mA is the

maximum current that is drawn from the input

voltage source. Yet ultra low power sleep modes

and very short transition time between operating

modes allow a very low average current

consumption to be achieved, which results in

longer battery life. The STBLC01 offers the

possibility of interfacing with several external

microcontrollers using either UART or SPI as the

transport layer for HCI communications.

VFQFPN 24L

Table 1. Device summary

Order code Package Packing

STBLC01QTR VFQFPN 24L Tape and reel

www.st.com

Contents STLBC01

2/40 DocID022984 Rev 2

Contents

1 General description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3 Typical application diagram and pin description . . . . . . . . . . . . . . . . . . 7

4 Electrical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4.2 Handling procedures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4.3 General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4.4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

4.4.1 Current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

4.5 I/O characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

4.6 RF characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

4.7 Timing characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

5 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

5.1 STBLC01 startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

5.1.1 Startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

5.1.2 End of the boot-up procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

5.2 STBLC01 power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

5.2.1 Standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

5.2.2 Xtreme mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

5.2.3 OFF mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

5.3 STBLC01 functional modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

5.3.1 State diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

5.3.2 Idle mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

5.3.3 Sleep mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

5.3.4 Off mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

5.3.5 BLE active . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

5.3.6 BLE sleep (only for SPI transport layer) . . . . . . . . . . . . . . . . . . . . . . . . 18

5.4 STBLC01 reset structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

6 Host controller interface (HCI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

DocID022984 Rev 2 3/40

STLBC01 Contents

6.1 HCI UART transport layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

6.1.1 UART interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

6.1.2 UART settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

6.2 HCI SPI transport layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

6.2.1 SPI interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

6.2.2 SPI flow control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Host to controller flow. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Controller to host flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

7 Peripherals information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

7.1 AES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

7.2 Random number generator (RNG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

7.3 Battery level detector (SVLD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

8 Application design guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

8.1 Antenna port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

8.1.1 50 Ohm matching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

8.2 Xtal oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

8.3 Power supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

9 Vendor HCI commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

9.1 STBLC_SET_PUBLIC_ADDRESS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

9.1.1 Command parameters for STBLC_SET_PUBLIC_ADDRESS . . . . . . . 28

9.1.2 Return parameters for STBLC_SET_PUBLIC_ADDRESS . . . . . . . . . . 28

9.2 STLBC_SET_POWER_MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

9.2.1 Command parameters for STLBC_SET_POWER_MODE . . . . . . . . . . 29

9.2.2 Return parameters for STLBC_SET_POWER_MODE . . . . . . . . . . . . . 29

9.2.3 Returned events for STLBC_SET_POWER_MODE . . . . . . . . . . . . . . . 29

9.3 STBLC_SVLD_MEASUREMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

9.3.1 Command parameters for STBLC_SVLD_MEASUREMENT . . . . . . . . 29

9.3.2 Return parameters for STBLC_SVLD_MEASUREMENT . . . . . . . . . . . 30

9.3.3 Returned events for STBLC_SVLD_MEASUREMENT . . . . . . . . . . . . . 30

9.4 STBLC_SET_RF_POWER_LEVEL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

9.4.1 Command parameters for STBLC_SET_RF_POWER_LEVEL . . . . . . . 30

9.4.2 Return parameters for STBLC_SET_RF_POWER_LEVEL . . . . . . . . . . 30

9.4.3 Returned events for STBLC_SET_RF_POWER_LEVEL . . . . . . . . . . . 30

Contents STLBC01

4/40 DocID022984 Rev 2

9.5 STBLC_POWER_MODE-CONFIGURATION . . . . . . . . . . . . . . . . . . . . . 31

9.5.1 Command parameters for STBLC_POWER_MODE-CONFIGURATION .

9.5.2 Return parameters for STBLC_POWER_MODE-CONFIGURATION . . 31

9.5.3 Returned events for STBLC_POWER_MODE-CONFIGURATION . . . . 31

9.6 STBLC_SET_UART_BAUD_RATE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

9.6.1 Command parameters for STBLC_SET_UART_BAUD_RATE . . . . . . . 31

9.6.2 Return parameters for STBLC_SET_UART_BAUD_RATE . . . . . . . . . . 32

9.6.3 Returned events for STBLC_SET_UART_BAUD_RATE . . . . . . . . . . . . 32

10 Vendor HCI events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

10.1 STBLC_POWER_MODE_IDLE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

10.1.1 Event parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

10.2 Hardware error event codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

11 Related documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

12 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

13 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

DocID022984 Rev 2 5/40

STLBC01 List of tables

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Table 2. External components of the typical application diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 3. STBLC01 pinout description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 4. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Table 5. STBLC01 general operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Table 6. Typical current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Table 7. I/O characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Table 8. General RF characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Table 9. Transmitter characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Table 10. Receiver characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Table 11. Timing characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Table 12. HCI command format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Table 13. HCI ACL data format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Table 14. HCI event format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Table 15. SVLD reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Table 16. HCI commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Table 17. Command parameters for STBLC_SET_PUBLIC_ADDRESS. . . . . . . . . . . . . . . . . . . . . . 30

Table 18. Return parameters for STBLC_SET_PUBLIC_ADDRESS. . . . . . . . . . . . . . . . . . . . . . . . . 30

Table 19. Command parameters for STLBC_SET_POWER_MODE . . . . . . . . . . . . . . . . . . . . . . . . . 31

Table 20. Return parameters for STLBC_SET_POWER_MODE. . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Table 21. Command parameters for STBLC_SVLD_MEASUREMENT. . . . . . . . . . . . . . . . . . . . . . . 31

Table 22. Return parameters for STBLC_SVLD_MEASUREMENT. . . . . . . . . . . . . . . . . . . . . . . . . . 32

Table 23. Command parameters for STBLC_SET_RF_POWER_LEVEL . . . . . . . . . . . . . . . . . . . . . 32

Table 24. Return parameters for STBLC_SET_RF_POWER_LEVEL . . . . . . . . . . . . . . . . . . . . . . . . 32

Table 25. Command parameters for STBLC_POWER_MODE-CONFIGURATION. . . . . . . . . . . . . . 33

Table 26. Return parameters for STBLC_POWER_MODE-CONFIGURATION . . . . . . . . . . . . . . . . 33

Table 27. Command parameters for STBLC_SET_UART_BAUD_RATE . . . . . . . . . . . . . . . . . . . . . 33

Table 28. Return parameters for STBLC_SET_UART_BAUD_RATE . . . . . . . . . . . . . . . . . . . . . . . . 34

Table 29. Event parameters for STBLC_POWER_MODE_IDLE . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Table 30. Hardware error event codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Table 31. VFQFPN 5X5X0.9 24 leads mechanical dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Table 32. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

List of figures STLBC01

6/40 DocID022984 Rev 2

List of figures

Figure 1. BLE stack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Simplified application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 3. Simplified block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 4. Suggested application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 5. STBLC01 pinout top view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 6. STBLC01 state diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 7. Matching circuit for 50 Ohm antenna . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 8. Xtal block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 9. VFQFPN 5X5X0.9 24 leads mechanical drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

DocID022984 Rev 2 7/40

STLBC01 General descript ion

1 General description

The conceptual drawing in Figure 1 shows the BLE stack partitioning; meanwhile a

simplified application schematic is shown in Figure 2.

Figure 1. BLE stack

Figure 2. Simplified application diagram

The protocol stack running in the host is released separately in the form of static library for

the STM32L. BLE qualified profiles are available separately.

The STBLC01 radio has been designed specifically for low power applications. The TX

output power can be controlled by the BLE host from -18 dBm to +3 dBm in order to

optimize the current consumption for a wide set of applications.

BLE APPLICATION STACK

External MCU

STBLC01

BLE APPLICATION

HOST

BLE PROFILES

HOST CONTROLLER

INTERFACE

LINK LAYER

PHYSICAL LAYER

AM10253V1

BLE Protocol stack

Host

Controller

Interface

Sensor Interface

Application

BLE Radio

Battery Sensors

HCI

BLE Controller

MCU

memory

Power

Management

XTAL

OSC

26MHz

HOST

Controller

Interface

UART SPI

AM10254V1

Block diagram STLBC01

8/40 DocID022984 Rev 2

The STBLC01 uses a very small number of external discrete components. The robust

internal RX architecture allows the STBLC01 to operate without the need for expensive

external filters to block undesired frequency bands. A simple matching network allows the

adaptation of antenna impedance to the STBLC01 differential 200 Ω real impedance.

2 Block diagram

A simplified block diagram of the STBLC01 is shown in Figure 3.

Figure 3. Simplified block diagram

AM10255V1

DocID022984 Rev 2 9/40

STLBC01 Typical application diagram and pin description

3 Typical application diagram and pin description

Figure 4. Suggested application schematic

3.3nH

10nF

1uF 16V

1.1nH

2.0nH

100pF

C10

4.7nF

100pF

MISO

MOSI

SCK

VDD

VSS

VSS_DCDC

SW_DCDC 7

VCC1 8

VBAT 9

csn_WU 10

sel 11

avss_pll2 12

VCC2 18

AVSS_RF 17

ANTP 16

ANTN 15

AVSS_PA 14

AVDD_PA 13

IRQ

RST

XTAL2

XTAL1

AVSS_PLL1

bias_r

GND 25

STBLC01

C11

1.2pF

47uF 6.3V

C13

1.0pF

C12

1.0pF

27k

1.2pF

12pF

SMA connector

NX3225SA

ANTP

ANTN

UART TX/SPI MISO

UART RX/SPI MOSI

SPI SCK

VDD

VCC

RF_OUT

WU/SPI CSN

SPI IRQ

RST

SEL

HOST

MCU

AM12611v2

Typical application diagram and pin description STLBC01

10/40 DocID022984 Rev 2

Figure 5. STBLC01 pinout top view

Table 2. External components of the typical application diagram

Components Value Descriptions

C1, C2 12 pF Crystal loading capacitor

C3 47 μF VCC decoupling capacitor

C4 10 nF VCC decoupling capacitor

C6 1.2 pF RF balun/matching capacitor

C7 100 pF LDO-digital decoupling capacitor

C8 1 μF LDO-digital decoupling capacitor

C9 100 pF LDO-PA decoupling capacitor

C10 4.7 nF LDO-PA decoupling capacitor

C11 1.2 pF RF balun/matching capacitor

C12 1 pF RF balun/matching capacitor

C13 1 pF RF balun/matching capacitor

L1 3.3 nH RF balun/matching inductor

L2 3.3 nH RF balun/matching inductor

L3 2.0 nH RF balun/matching inductor

L4 1.1 nH RF balun/matching inductor

R1 27 kΩBias resistor

Q1 26 MHz NX3225SA crystal

UART_TX/MISO

UART_RX/MOSI

VDD

AVSS

AVSS1

SCK

AVDD_PA

AVSS_PA

IRQ

RST

XTAL1

AVSS_PLL1

BIAS_R

XTAL2

AVSS_RF

VCC

AVSS_PLL2

SEL

AVSS2

VBAT

AVSS3

WU/CSN

ANTP

ANTN

STBLC01

QFN24 5x5

AM10256V1

DocID022984 Rev 2 11/40

STLBC01 Typical application diagram and pin description

Table 3. STBLC01 pinout description

Pin Name Type Description

1 UART_TX / SPI_MISO Digital output UART TX / SPI data output (SDO)

2 UART_RX / SPI_MOSI Digital input UART RX / SPI data input (SDI)

3 SPI_CLK Digital input SPI clock input (SCK)

4 VDD Power Positive supply for the digital part

(1)

1. For proper operation of the chip, this terminal must not be loaded by any external circuitry.

5 AVSS Ground Negative supply for the digital part

(2)

2. For proper operation of the chip, this terminal must be connected to a common ground plane.

6 AVSS1 Ground Ground

(2)

7 AVSS2 Ground Ground

(2)

8 AVSS3 Ground Ground

(2)

9 VBAT Analog Ground

(2)

10 WU/CSN Digital input UART wake up from sleep/off mode / SPI chip

select.

11 SEL Digital input Interface selection (0 = UART, 1 = SPI).

12 AVSS_PLL2 Ground Negative supply of PLL

(2)

13 AVDD_PA Power Regulated output voltage for the power amplifier

(1)

14 AVSS_PA Ground Negative supply for the power amplifier

(2)

15 ANTN RF Differential RF ports

16 ANTP RF

17 AVSS_RF Ground Negative supply of RF part

(2)

18 VCC Power Main supply for the chip

19 BIAS_R Analog Pin for bias setting resistor

20 AVSS_PLL1 Ground Negative supply of PLL

(2)

21 XTAL1 Analog Xtal oscillator ports

22 XTAL2 Analog

23 RST Digital input Reset

24 IRQ Digital input SPI interrupt request

Electrical STLBC01

12/40 DocID022984 Rev 2

4 Electrical

4.1 Absolute maximum ratings

Table 4 summarizes the absolute maximum rating for the STBLC01. Stresses above these

listed maximum ratings may cause permanent damage to the device. Exposure beyond the

specified electrical characteristics may affect device reliability or cause malfunction. The

STBLC01 is available in a green-mold and lead free QFN 5x5 package. The maximum

soldering conditions are specified as in the JEDEC J-STD-020C standard.

4.2 Handling procedures

This device has built-in protection against high static voltages or electric fields; however,

anti-static precautions must be taken as for any other CMOS component. Unless otherwise

specified, proper operation can only occur when all terminal voltages are kept within the

voltage range. Unused inputs must always be tied to a defined logic voltage level unless

otherwise specified.

4.3 General operating conditions

The general operating conditions for both STBLC01 versions are summarized in Table 5.

These parameters are specified based on the component list and on the application

schematic of Figure 4.

Table 4. Absolute maximum ratings

Parameter Symbol Min. Max. Unit

System ground GND -0.2 0.2 V

Supply voltage V

SUP

GND-0.2 3.6 V

Voltage at remaining pin V

GND-0.2 V

SUP

+0.2 V

Storage temperature T

-50 150 °C

Electrostatic discharge referred to GND according to Mil-

Std-883C, method 3015.7 V

ESD

-2000 +2000 V

Table 5. STBLC01 general operating conditions

Parameter Min. Typ. Max. Unit

Supply voltage 1.9 3 3.6 V

Temperature range -40 +85 °C

DocID022984 Rev 2 13/40

STLBC01 Electrical

4.4 Electrical characteristics

4.4.1 Current consumption

This section summarizes the estimated current consumption of the STBLC01 at pin VCC.

The parameters defined in Table 6 are specified based on the component list defined in

Table 2 and on the application schematic of Figure 4. Functional modes used in the table

are defined in Section 5.3. Unless otherwise specified, the voltage VCC is set to 2.5 V.

4.5 I/O characteristics

This section summarizes the I/O characteristics.

4.6 RF characteristics

This section summarizes the RF characteristics of the STBLC01. All parameters are based

on the components in Table 2 and on the application schematic of Figure 4. Unless

otherwise specified, VCC = 2.5 V. Measurement conditions and device configuration are

specified in [3] for PHY parameters and in [4] for LL parameters. When applicable,

exceptions for some parameters are compliant to that described in [2], volume 6, part A.

Table 6. Typical current consumption

Parameter Symbol Min. Typ. Max. Unit

Off mode I

off

μA

Sleep mode I

sleep

19 μA

Idle mode I

idle

200 μA

BLE transmit mode for 0 dBm output

power I

12.1 mA

BLE receive mode I

12.9 mA

BLE sleep mode (crystal) I

BLEsleep_crystal

450 μA

BLE sleep mode (RC) I

BLEsleep_RC

60 μA

Table 7. I/O characteristics

Parameter Symbol Min. Typ. Max. Unit

HIGH level input voltage V

0.75*Vcc

Vcc V

LOW level input voltage V

00.25*VccV

Output HIGH current I

1mA

Output LOW current I

1mA

Electrical STLBC01

14/40 DocID022984 Rev 2

Table 8. Gene ral RF charact er istics

Parameter Note Min. Typ. Max. Unit

Operating frequency

2400 2484 MHz

Differential antenna impedance 200 W

On-air data rate 1000 Kbps

Channel spacing 2 MHz

Crystal frequency 26 MHz

Crystal frequency accuracy

(1)

1. Frequency accuracy includes initial tolerance, stability over temperature range and aging of the quartz.

±50 ppm

Table 9. Transmitter characteristics

Parameter Note Min. Typ. Max. Unit

Output power for the lowest power setting

-18 dBm

Output power for the highest power setting +3 dBm

RF power accuracy ±3 dB

Power transmitted at frequency offset |f

offs

| = ±2 MHz -20 dBm

Power transmitted at frequency offset |f

offs

| = ±3 MHz -30 dBm

Frequency deviation

(1)

1. Frequency deviation corresponding to a 10101010 sequence is at least 80% of the frequency deviation

corresponding to a 00001111 sequence. Positive frequency deviations represent a logic level ‘1’ and

negative frequency deviations represent a logic level ‘0’ as defined in [2], volume 6, part A, section 3.1

±250 kHz

Deviation from the channel center frequency ±150 kHz

Frequency drift for any packet length 50 kHz

Drift rate 400 Hz/μs

Spurious emission f in the ranges

– 30 MHz – 88 MHz

– 88 MHz – 230 MHz

– 230 MHz – 470 MHz

– 470 MHz – 862 MHz

– 862 MHz – 960 MHz

– 960 MHz – 2396 MHz

– 2487.5 MHz – 12750 MHz

(2)

2. Measuring conditions and signal specifications are described in [3], [4] and [5]. These parameters are

highly related to a correct matching network and PCB design. Refer to Section 8 for design guidelines.

-57.3

-54.0

-51.3

-54.0

-51.3

-43.4

dBm

DocID022984 Rev 2 15/40

STLBC01 Electrical

4.7 Timing characteristics

Table 10. Receiver characteristics

Parameter Note Min. Typ. Max. Unit

Sensitivity level for 0.1% BER -80 dBm

Maximum input power for 0.1% BER -5 dBm

Spurious emission for 30 MHz < f < 1 GHz

(1)

1. Measuring conditions and signal specifications are described in [3], [4] and [5]. These parameters are

highly related to a correct matching network and PCB design. Refer to Section 8 for design guidelines.

-57 dBm

Spurious emission f > 1 GHz (1) -47 dBm

In band blocking C/I for a wanted signal level of -67 dBm:

– Co-channel interference

– Interference at frequency offset foffs = 1 MHz

– Interference at frequency offset foffs = 2 MHz

– Interference at frequency offset foffs = 3 MHz

– Interference at image frequency foffs = -4 MHz

– Interference at adjacent frequencies to image

-17

-27

-9

-15

dBm

Out of band blocking for a required signal level of -67 dBm:

– Frequency range 30-1999 MHz

– Frequency range 2000-2399 MHz

– Frequency range 2484-2999 MHz

– Frequency range 3000-12750 MHz

-30

-35

-30

dBm

Table 11. Timing characteristics

Parameter Symbol Conditions Min. Typ. Max. Unit

Start-up time (power up to

standby mode) T

start-up

- 15.5 - ms

Sleep => Standby mode

(1)

1. This time is dominated by the Xtal oscillator startup.

sleep_std

-2.6- ms

Off => Standby mode

(2)

2. This time is dominated by the Xtal oscillator startup.

off_std

-2.7- ms

Functional description STLBC01

16/40 DocID022984 Rev 2

5 Functional description

5.1 STBLC01 startup

This section describes the STBLC01 startup procedure. The description is intended to be

informational only, as it is independent of any external actions. That application does

however select the preferred communication interface by setting the pin SEL

(a)

(SEL = 1

SPI, SEL = 0 UART).

5.1.1 Startup

When a 3 V battery is connected to the STBLC01, an internal RC oscillator starts up,

providing a clock with fixed duty-cycle to the power check circuit. After the power check

indicates enough voltage on VDD, the Xtal oscillator is enabled and when its startup

procedure is completed, the main logic can use the Xtal clock as reference.

5.1.2 End of the boot-up procedure

Once the XTAL oscillator clock is available to the digital part of the controller, the STBLC01

enters idle state and an event is sent to the host through the selected communication

interface. Refer to Section 6 for a complete description of how to send commands and read

events from the STBLC01.

At the end of the boot sequence, the STBLC01 returns an event

STBLC_POWER_MODE_IDLE to the host to notify that the system has entered in Idle

mode. If for any reason the first HCI event is corrupted after start-up, for example if the host

needs a long time to initialize or if the SEL signal is not stable at start-up time, it is

recommended that the host generates an additional reset to ensure a proper start-up.

5.2 STBLC01 power modes

The STBLC01 can be configured to work in three main power modes which are

automatically chosen based on the selected chip state described in Section 5.3. These

modes are, however, not directly selectable by application. For this reason this section is

intended to be informational.

5.2.1 Standby mode

In this mode the Xtal is up and running and is the main clock source of the system. The

internal RC oscillator is active.

5.2.2 Xtreme mode

In Xtreme mode, the Xtal oscillator is turned off but the internal RC is kept on. The supply

voltage of the logic is lowered to reduce the effect of leakage. The complete controller status

is kept.

a. In order to avoid issues at boot-up due to interface selection, it is advisable to pull up (SPI) or pull down (UART)

the pin SEL with a 10 kΩ.

DocID022984 Rev 2 17/40

STLBC01 Functional description

5.2.3 OFF mode

In this mode, all internal oscillators are off. The supply voltage of the logic is lowered to

reduce the effect of leakage. The complete controller status is kept.

5.3 STBLC01 functional modes

5.3.1 State diagram

This part describes in which modes the STBLC01 can operate and how to switch from one

mode to another. Figure 6 shows a simplified state diagram of the STBLC01. The arrows

indicate how the transaction from one state to the other can be achieved. Note that some

operations in some states are only allowed for HCI over SPI transport layer, some others

are achieved only by firmware.

As described in Section 5.1, after this initial step, the STBLC01 automatically enters Idle

mode. Change of state is allowed through the HCI commands. In Section 4.7 the time

required to switch from one state to the other is defined.

Functional description STLBC01

18/40 DocID022984 Rev 2

Figure 6. STBLC01 state diagram

5.3.2 Idle mode

Idle is the mode that the STBLC01 enters as default after a reset. When this mode is

entered, the HCI event STBLC_POWER_MODE_IDLE is reported to the host. The power

mode for this configuration is Standby, as defined in Section 5.2.1. The HCI system is

available and the host can communicate with the controller using the selected transport

layer. The HCI is able to receive and decode any command sent by the host as well as send

any event back to the host using either UART or SPI transport layers, according to the value

of the SEL pin. Xtal is the clock source of STBLC01 logic. RF core is off in this state. The

internal logic is in Halt mode, waiting for a HCI command from the host.

5.3.3 Sleep mode

Sleep mode is an STBLC01 low power mode. The power mode for this configuration is

Xtreme, as defined in Section 5.2.2. RF cannot be activated from this state. When this mode

Sleep

BLE

Active

OFF

BLE

Sleep

(RC)

Idle

WU or

HCI over SPI

HCI

HCI over SPI

BLE firmware

HCI or

BLE firmware

HCI

BLE firmware

BLE

Sleep

(crystal)

AM10257V2

DocID022984 Rev 2 19/40

STLBC01 Functional description

is exited, the STBLC01 goes into Idle mode. The HCI system is available but with limited

functionality depending on the transport layer chosen:

•If UART has been chosen as transport layer, no HCI commands are accepted. The

system can be woken up by setting the pin WU to high. Once this is done, the system

restarts all internal oscillators and automatically goes into idle state asserting the

STBLC_POWER_MODE_IDLE event.

•If SPI has been chosen as the transport layer, the STBLC01 is capable of executing a

limited set of HCI commands with a limited speed. In particular, all commands which

enable RF communications are not allowed in this mode. The flow control described in

Section 6.2.2 ensures that no overflow occurs in the communication. The HCI

command STBLC_SET_POWER_MODE can be used to go into Standby mode.

5.3.4 Off mode

Off mode is the lowest STBLC01 power consumption mode. The power mode for this

configuration is OFF as defined in Section 5.2.3. RF cannot be activated from this state. The

HCI system is available but only to wake up the system. No HCI commands are accepted.

When the system wakes up, the default mode is Idle. Depending on the transport layer

chosen, the system can be woken up as follows:

•If UART has been chosen as the transport layer, the system can be woken up by

setting the WU pin to '1'. Once this is done, the system restarts all internal oscillators

and automatically goes into idle state, asserting the STBLC_POWER_MODE_IDLE

event.

•If SPI has been chosen as the transport layer, the system can be woken up by sending

any HCI command. Only a limited set of HCI commands are supported in this mode

and with limited speed. In particular, all commands which enable RF communications

are not allowed in this mode. Once the command has been received, the STBLC01

switches automatically in Sleep mode and tries to execute the command. The

command STBLC_SET_POWER_MODE can be used to either go into Idle or into Off

mode. In the first case the system restarts all internal oscillators and automatically goes

into idle state asserting the STBLC_POWER_MODE_IDLE event. In the second case

no special HCI event is sent but the STBLC01 returns in Off mode.

5.3.5 BLE active

BLE active is the mode where the STBLC01 is able to communicate to other BLE devices.

This mode can be entered only from Idle mode. This mode represents the starting state for

any Bluetooth low energy operation (scanning, advertisement, connection). The power

mode for this configuration is Standby, as defined in Section 5.2.1. The HCI system is

available and the host can communicate with the controller using the selected transport

layer. HCI is able to receive and decode any command sent by the host as well as send any

event back to the host using either UART or SPI transport layers, according to the value of

the SEL pin. Xtal is the clock source of STBLC01 logic. Internal RC is calibrated during this

phase. The RF core can be activated and controlled in order to optimize power

consumption. The internal logic is in Halt mode, waiting for a HCI command from the host. In

order to avoid possible noise coupling, it is highly recommended to reduce the host-

controller communications when the on-air link is active.

Functional description STLBC01

20/40 DocID022984 Rev 2

5.3. 6 BLE sleep (only for SPI tra n sport layer)

BLE sleep mode is a special low power mode available only when the SPI transport layer is

used. This mode can be enabled by the HCI command.

The STBLC01 offers two possible configurations for this mode: one employing the Xtal

oscillator and another using the RC oscillator. When the Xtal oscillator is used, the high

precision of the Xtal allows the STBLC01 to act as a master, slave, advertiser or scanner

device. When the STBLC01 is a slave, advertiser or scanner device, the RC oscillator can

be chosen, and the power consumption can be significantly reduced because the Xtreme

power mode is used in that case.

The STBLC01 controls automatically the transitions between BLE Active and this mode; the

host cannot influence them directly.

The use of the RC oscillator can be enabled using the HCI command

STBLC_POWER_MODE_CONFIGURATION.

In this configuration, the RF core is turned off and the HCI system is active and able to

receive any command.

•If UART has been chosen as transport layer, only the Xtal oscillator can be selected.

•If the transport layer is SPI, the Xtal oscillator or the RC oscillator can be selected.

5.4 STBLC01 reset structure

The STBLC01 has the following reset sources:

1. Power On Reset (POR). This occurs after each power-up of the STBLC01. Once the

boot-up procedure described in Section 5.1 is completed, an

STBLC_POWER_MODE_IDLE event is reported to the host, indicating that the

STBLC01 has entered Idle mode. During POR, the RST pad is pulled to logic 0.

2. RST pa d. The host can reset the STBLC01 by pulling up the RST pin for at least 5 ms.

In this situation the STBLC01 reboots the firmware and an event

STBLC_POWER_MODE_IDLE is sent as soon as the STBLC01 has entered Idle

mode. The RST pad is pulled to logic 0 during POR.

3. HCI reset. Sending the standard BT command HCI_RESET, the host can reset the

BLE functions of the STBLC01 as described in [2].

DocID022984 Rev 2 21/40

STLBC01 Host controller interface (HCI)

6 Host controller interface (HCI)

The STBLC01 includes a host controller interface as defined in [2], volume 2; part E.

Table 12 summarizes the command, Table 13 the data format and Table 14 the event

format. A more detailed description of commands and events as well as all HCI related

information can be found in [2].

Ta bl e 12. HCI command format

Byte # Parameter Size Description

1Packet_ID 1Packet ID: packet Identifier

– For HCI Command Packet_ID = 0x01

2-3 OpCode 2

OpCode is a unique identification of the command. It

includes

– OpCode Group Field (OGF) of 6 bits. Code 0x3F is

reserved for Vendor command

– OpCode Command Field (OCF) of 10 bits

4Parameter_Total_Le

ngth 1

Lengths of all the parameters contained in the given

command packet (N.B.: total length of parameters, not

number of parameters)

Parameter_0 Each command has a specific number of parameters

associated with it. These parameters and the size of each of

the parameters are defined for each command. Each

parameter is an integer number of octets in size

...

Parameter_N

Table 13. HCI ACL data format

Byte # Parameter Size Description

1Packet_ID 1Packet ID: Packet Identifier

– For HCI Data Packet_ID = 0x02

2-3

Handle

PB flag

BC flag

Connection_Handle (12 bit) to be used for transmitting data

packet or segment over primary controller. Range: 0x000-

0xEFF (0xF00-0xFFF reserved for future use)

Packet_Boundary_Flag (bit 4 and bit 5 of the second octet)

Broadcast_Flag (bit 6 and bit 7 of the second octet)

4 Data_Total_Length 2 Length of data measured in octets.

Data ACL data (L2CAP PDU)

Host controller interface (HCI) STLBC01

22/40 DocID022984 Rev 2

In addition to standard commands, a set of HCI proprietary commands for dealing with the

power modes and some parameters linked to RF performance are supported. The complete

list of supported proprietary HCI commands is available in Section 7.

The STBLC01 supports the two different transport layers for HCI according to the level of

the SEL pin:

1. SEL = 0: UART interface as defined in [2], volume 4, part A.

2. SEL = 1: SPI interface with proprietary flow control.

6.1 HCI UART transport layer

The STBLC01 contains a 2-pin UART compatible for communication protocol with 16450,

16550 and 16750 standards. The baud rate can be set by the host by sending the related

HCI command (refer to Section 7). The default baud rate is 115.2 kbps.

6.1.1 UART interface

The UART interface is through the following pins:

•UART_RX: UART receiver line

•UART_TX: UART transmitting line

6.1.2 UART settings

The HCI UART transport layer uses the following settings for RS232:

•Baud rate: configurable via HCI

•The default baud rate is 115.2 kbps. The default value is only set by POR or the RST

•Number of data bits: 8

•Parity bit: no parity

•Start bit: 1 start bit

•Stop bit: 1 stop bit

•Flow control: not used

Table 14. HCI event format

Byte # Parameter Size Description

1Packet_ID 1Packet ID: Packet Identifier

– For HCI Event Packet_ID = 0x04

2 Event_Code 1

Each event is assigned a one-byte event code to uniquely

identify different types of events. Range: 0x00 to 0xFF,

where 0xFF is reserved for Vendor specific events.

3Parameter_Total_Le

ngth 1Lengths of all the parameters contained in the given event

packet

Event_Parameter_0 Each event has a specific number of parameters associated

with it. These parameters and the size of each of the

parameters are defined for each event. Each parameter is

an integer number of octets in size.

...

Event_Parameter_N

DocID022984 Rev 2 23/40

STLBC01 Host controller interface (HCI)

6.2 HCI SPI transport layer

The STBLC01 features a proprietary HCI SPI transport level which may allow the

host/controller system to reach lower power consumption by using lower clock frequencies.

HCI commands sent and events received over the SPI transport layer are identical to the

ones sent/received over the UART transport level. The STBLC01 supports only slave mode

SPI. The maximal SPI speed is 10 MHz. STBLC01 HCI events are signalled to host thought

the assertion of the IRQ pin. When this occurs, the host sends a clock so that event can be

read. Pin IRQ is also used to inform the host that the STBLC01 has data coming from RF

communication to send. The procedures to read events or data are exactly the same.

6.2.1 SPI interface

The STBLC01 includes a 5-wire, 8-bit, MSB first, Motorola compatible with CPOL=0,

CPHA=0 SPI interface. Only half-duplex transport is supported. The SPI interface is defined

through the following pins:

•CSN: chip select signal. This signal is active low and it is mandatory, even when only 1

slave device is connected to the host

•SPI_SCK: SPI clock signal. When CSN is active, the host sends to the controller a

number of clock cycles in multiples of 8 bits during each SPI transaction. When CSN is

not active, the STBLC01 ignores any signal sent to this pin. This allows the host to set

a clock signal to serve other devices

•SPI_MOSI: Host to controller transfer data line. The host generates data on the

negative edge and samples data on the positive edge of the SPI_SCK signal. SPI data

is sent in byte format, with the most significant bit (MSB) first.

•SPI_MISO: Controller to the host transfer data line. When CSN is active, controller

generated data on the negative edge and sample data on the positive edge of the

SPI_SCK signal. When CSN is inactive, the controller sets this output in tristate mode.

SPI data is sent in byte format, with the most significant bit (MSB) first.

•IRQ: Interrupt request. This signal is set by the controller when an event needs to be

sent to the host.

6.2.2 SPI flow control

The STBLC01 features a proprietary flow control for all communications over SPI both from

the host to the controller and from the controller to the host. Each SPI transaction is done for

8 bits of data.

Host to controller flow

When the host needs to communicate with the controller, the following flow is followed:

1. Host sets the MOSI signal to '1'.

2. Host activates CSN after 100 ns.

3. Host polls MISO line. The first polling is done at least 100 ns after CSN is activated.

4. If MISO = '0' then the controller reception buffer is full and the host is not allowed to

start the transaction.

5. If MISO = '1' then the controller reception buffer is not full and the host can start the

transaction. After each set of 8 rising edges of SPI_SCK, the host polls the MISO line to

check whether the controller reception buffer is not full. The first polling can be done on

the first SPI_SCK falling edge.

Host controller interface (HCI) STLBC01

24/40 DocID022984 Rev 2

Controller to host flow

When the controller needs to communicate with the host, the following flow is followed:

1. Controller sets IRQ line to '1'. This means that the controller has at least 1 byte of data

to transmit.

2. Host pulls down the MOSI signal.

3. Host activates CSN after 100 ns.

4. Host starts an SPI transaction by sending a data byte equal to 0x00.

5. Host reads data sent by the controller on the MISO line.

6. If IRQ is set to '0' during an SPI transaction, then the controller has no other data to

transmit. Once all bits of the transaction are read, the host can stop sending a clock.

DocID022984 Rev 2 25/40

STLBC01 Peripherals information

7 Peripherals information

The STBLC01 includes several peripherals to fulfil all the requirements of the BLE standard.

Although none of these peripherals are available for host use. This section gives a short

description of STBLC01 internal peripherals to provide a better overview of the system.

7.1 AES

The STBLC01 includes a hardware encryption/decryption accelerator based on the

advanced encryption system (AES) standard. For further information about AES please

refer to the official page of NIST (http://csrc.nist.gov/CryptoToolkit/aes/).

This block provides the following functions:

1. BLE encryption key calculation

2. BLE message integrity code (MIC) calculation

3. BLE encryption stream generation

7.2 Random number generator (RNG)

The STBLC01 features an RNG block which is used to generate a non-deterministic bit

stream as required in [2]. The result of this block is a non-deterministic 32-bit stream.

7.3 Battery lev el detector (SVLD)

The STBLC01 offers the possibility of monitoring the supply voltage of the system. The host

can launch an SVLD measurement by sending the HCI command

STBLC_SVLD_MEASUREMENT, as defined in Section 9. The measurement compares the

supply voltage level with a predefined voltage level described in Table 15. After the

measurement is completed, an event is reported to the host, as described in Section 9.3.2.

All voltages specified in Table 15 must be considered with a precision of ±10%.

Table 15. SVLD reference

Supply Reference Function

VCC 2.05 V Battery low detection

2.25 V Battery low early warning

Application design guidelines STLBC01

26/40 DocID022984 Rev 2

8 Application design guidelines

This section provides some design guidelines and constraints are given for proper

application designs. In particular, antenna port and antenna design guidelines, XTAL

oscillator and power supply connections are described. Furthermore, PCB guidelines are

stated in order to achieve an optimum RF-performance.

8.1 Antenna port

The STBLC01 features a fully differential 200 +j0 Ω antenna port for the received or emitted

signals at the pins ANTP and ANTN. The selected input/output impedance allows the

implementation of a folded dipole antenna directly connectable to the antenna port which

does not require any external matching components. Use of other types of antenna is

granted by the implementation of a matching network with few external components. The

following general guidelines can be used to achieve the best results in terms of RF

performance:

1. Use at least a 2-layer PCB, dedicating the bottom layer to one common ground plane

covering all external components and the chip itself. Connect the attached area pin of

the package to the ground plane.

2. Keep the STBLC01 ANTN/ANTP symmetry on the PCB by keeping symmetry in

components and via placement as well as line-routing.

3. Use only 100 Ω transmission lines between the STBLC01 RF output pins and the

antenna / matching network input.

4. Try to minimize RF trace lengths.

5. Respect also a 3 mm clearance to ground close to RF transmission lines and/or

matching network components. In particular, respect clearance to ground for antenna

structure (varies with antenna topology).

6. Do not put a ground plane below the antenna structure to avoid gain loss and directivity

modification.

8.1. 1 50 Ohm matching

The STBLC01 antenna impedance can be converted to 50 Ω termination to allow interfacing

with a standard measurement system or with a standard 50 Ω antenna structure. In this

case, a matching circuit which ensures the conversion from the differential 200 Ω antenna

port of the STBLC01 and the single-ended 50 Ω of the instruments, is required. Figure 7

shows an example circuit to implement a matching network. In order to achieve the best RF

performance, the layout around the antenna port - both for the chip and attached antenna

connector - needs to be done while keeping RF guidelines in mind.

DocID022984 Rev 2 27/40

STLBC01 Application design guidelines

Figure 7. Matching circuit for 50 Ohm antenna

8.2 Xtal oscillator

The STBLC01 includes a fully integrated, low power 26 MHz Xtal oscillator with an

embedded amplitude regulation loop. In order to achieve low power operation and good

frequency stability of the XTAL-oscillator, certain considerations with respect to the quartz

load capacitance C0 need to be taken into account. Figure 8 shows a simplified block

diagram of the amplitude regulated oscillator used in the STBLC01.

STBLC01

ANTP

ANTN

L1= 3.3nH

C1= 1.2pF

L3= 2.0nH

L2= 3.3nH

C1= 1.0pF

C2= 1.2pF

50 Ohm

200 Ohm

AM10261V1

Application design guidelines STLBC01

28/40 DocID022984 Rev 2

Figure 8. Xtal block diagram

Low power consumption and fast startup time is achieved by choosing a quartz crystal with

a low load capacitance C0. A reasonable choice for capacitor C0 is 10 pF. The Xtal startup

time is typically 1 ms but can go up to 10 ms depending on the quality factor of the external

quartz chosen. To achieve good frequency stability, the following equation then needs to be

satisfied:

Equation 1

where C

= C

PCB1

+ C

PAD

, C

= C

PCB2

PAD

and C

are external (SMD)

components, C

PCB1

and C

PCB2

are PCB routing parasites and C

PAD

is the equivalent small-

signal pad-capacitance. The value of C

PAD

is around 1 pF for each pad. The routing

parasites should be minimized by placing quartz and C

/ C

close to the chip, not only for

an easier matching of the load capacitance C0, but also to ensure robustness against noise

injection. Connect each capacitor of the XTAL oscillator to ground by a separate via.

To achieve good noise immunity against external interference, the XTAL oscillator is

designed with low input impedance using a chip-internal 260 kΩ resistor between XTAL1

and XTAL2. In case the noise robustness needs to be further increased, an external parallel

resistor can be added at the cost of extra current consumption.

Amplitude regulation

Buffered

rail-to-rail

clock

XTAL1 XTAL2

PA D

PB2

PB1

AM10262V1

′

⋅

′

-----------------------=

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STLBC01 Application design guidelines

8.3 Power supplies

In order to avoid any interference on the RF communication, all STBLC01 power supplies

need to be properly decoupled. In general, all decoupling capacitors defined in Figure 4

need to be as close as possible to the relative pin. Special caution needs to be taken for the

decoupling on AVDD_PA (power supply for PA) and VDD (power supply for digital part). It is

mandatory to put the decoupling capacitors as close as possible to the pin. All ground

connections must be as short as possible using vias directly to the ground plane. Avoid

sharing vias between different signals.

Vendor HCI commands STLBC01

30/40 DocID022984 Rev 2

9 Vendor HCI commands

This section describes the proprietary HCI commands which can be used to set up special

features of the STBLC01. As defined, the OGF reserved for vendor specific

commands/event is 0x3F.

9.1 STBLC_SET_PUBLIC_ADDRESS

9.1.1 Comma nd parameters for STBLC_SET_PUBLIC_ADDRESS

9.1.2 Return parameters for STBLC_SET_PUBLIC_ADDRESS

Table 16. HCI commands

HCI Command OCF Description

STBLC_SET_PUBLIC_ADDRESS 0x02 Set public address

STBLC_SET_POWER_MODE 0x03 Select power mode

STBLC_SVLD_MEASUREMENT 0x04 Run SVLD measurement

STBLC_SET_RF_POWER_LEVEL 0x05 Select TX power level

STBLC_POWER_MODE_CONFIGURAT

ION 0x06 Enable/disable transition to BLE Sleep mode

STBLC_SET_UART_BAUD_RATE 0x07 Set UART baud rate

Table 17. Command parameters for STBLC_SET_PUBLIC_ADDRESS

Parameter Size Description

Address 6 Set the public address of the device in the controller

Table 18. Return parameters for STBLC_SET_PUBLIC_ADDRESS

Parameter Size Description

Address 1 Standard BT error codes

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STLBC01 Vendor HCI commands

9.2 STLBC_SET_POWER_MODE

9.2.1 Comman d paramet ers for STLBC_SE T_POWER_M ODE

9.2.2 Return parameters for STLBC_SET_POWER_MODE

9.2.3 Returned events for STLBC_SET_POWER_MODE

The following event sequence, depending on the transition, is returned:

1. From Idle mode to Sleep/Off mode, only the command completed event is returned.

2. From Sleep/Off mode to Idle mode, a command status is sent after checking the

integrity of the command. Once Idle state has been entered completely an

STBLC_POWER_MODE_IDLE event is returned to the host to report that the action

has been completely done.

9.3 STBLC_SVLD_MEASUREMENT

9.3.1 Comma nd parameters for STBLC_SVLD_MEASUREMENT

Table 19. Command parameters for STLBC_SET_POWER_MODE

Parameter Size Description

Power mode 1

0x00 = Idle

0x01 = Sleep

0x02 = Off

0x03-0xFF = reserved

Table 20. Return parameters for STLBC_SET_POWER_MODE

Parameter Size Description

Address 1 Standard BT error codes

Table 21. Command parameters for STBLC_SVLD_MEASUREMENT

Parameter Size Description

Level 1

0x06 = 2.05 V

0x07 = 2.25 V

0x00-0x05 reserved

0x08-0xFF reserved

Source 1

0x00 = reserved

0x01 = VCC

0x02-0xFF = reserved

Vendor HCI commands STLBC01

32/40 DocID022984 Rev 2

9.3.2 Return parameters for STBLC_ SVLD_MEASUREMENT

9.3.3 Returned events for STBLC_SVLD_MEASUREMENT

Command complete event.

9.4 STBLC_SET_RF_POWER_LEVEL

9.4.1 Command parameters for STBLC_SET_RF_POWER_LEVEL

9.4.2 Return parameters for STBLC_SET_RF_POWER_LEVEL

9.4.3 Returned events for STBLC_SET_RF_POWER_LEVEL

Command complete event.

Table 22. Return parameters for STBLC_SVLD_MEASUREMENT

Parameter Size Description

Status 1 Standard Bluetooth error codes

Result 1 0x00 = voltage is above the level

0x01 = voltage is below the level

Table 23. Command parameters for STBLC_SET_RF_POWER_LEVEL

Parameter Size Description

Level 1

0x00 = -18 dBm

0x01 = -15 dBm

0x02 = -12 dBm

0x03 = -9 dBm

0x04 = -6 dBm

0x05 = -3 dBm

0x06 = 0 dBm

0x07 = +3 dBm

0x08-0xFF = reserved

Table 24. Return parameters for STBLC_SET_RF _POWER_LEVEL

Parameter Size Description

Status 1 Standard BT error codes

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STLBC01 Vendor HCI commands

9.5 STBLC_POWER_MODE-CONFIGURATION

9.5.1 Command parameters for STBLC_POWER_MODE-CONFIGURATION

9.5.2 Return parameters for STBLC_POWER_MODE-CONFIGURATION

9.5.3 Returned events for STBLC_POWER_MODE-CONFIGURATION

Command complete event.

9.6 STBLC_SET_UART_BAUD_RATE

9.6.1 Command parameters for STBLC _SET_UART_BAUD_RATE

Table 25. Command parameters for STBLC_POWER_MODE-CONFIGURATION

Parameter Size Description

Sleep_Mode_Enable 1

0x00 = transition to BLE Sleep mode disabled

0x01 = transition to BLE Sleep mode enabled

0x02-0xFF = reserved

Table 26. Retu rn parameters for STBLC_POWER_MODE-CONFIGURATION

Parameter Size Description

Status 1 Standard BT error codes

Table 27. Command parameters for STBLC_SET_UART_BAUD_RATE

Parameter Size Description

Baud_Rate 1

0x00 = 1 200 Bd

0x01 = 2 400 Bd

0x02 = 4 800 Bd

0x03 = 9 600 Bd

0x04 = 14 400 Bd

0x05 = 19 200 Bd

0x06 = 28 800 Bd

0x07 = 38 400 Bd

0x08 = 57 600 Bd

0x09 = 76 800 Bd

0x0A = 115 200 Bd

0x0B = 230 400 Bd

0x0C = 460 800 Bd

0x0D = 921 600 Bd

0x0E = 1 843 200 Bd

0x0F – 0xFF reserved

Vendor HCI commands STLBC01

34/40 DocID022984 Rev 2

9.6.2 Return parameters for STBLC_ SET_UART_BAUD_RATE

9.6.3 Returned event s for STBLC_SET_UART_BAUD_RATE

Command complete event.

The STBLC01 changes the baud rate after sending the command complete event. This

command is used only if no other event is in the controller HCI buffer. For this reason it is

strongly recommended to use this command only after power-up or reset.

Table 28. Return parameters for STBLC_SET_UART_BAUD_RATE

Parameter Size Description

Status 1 Standard BT error codes

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STLBC01 Vendor HCI events

10 Ve ndor HCI events

This section defines the STBLC01 vendor events. There is no special event mask defined

for vendor events in the STBLC01. This means that the host cannot avoid receiving vendor

events.

10.1 STBLC_POWER_MODE_IDLE

This event reports that the device has correctly entered idle mode. This event is also sent

after watchdog or bus error resets. This event is sent after POR and HCI resets.

The associated event code is 0xFF.

10.1.1 Event parameters

10.2 Hardware error event codes

The hardware error event is a standard BT event. The STBLC01 defines additional

parameter codes as follows:

Table 29. Event parameters for STBLC_POWER_MODE_IDLE

Parameter Size Description

STBLC_Event_Code 1 0x01

Table 30. Hardware error event codes

Code Description

0x00 No error

0x01 HCI synchronization lost

0x02 RF initialization fail (auto-calibration)

0x03 RF system error

0x04 CPU reset (watchdog, bus error)