AS1105WL-T - Austriamicrosystems

AS1105

Serially Interfaced, 4-Digit LED Driver

www.ams.com/LED-Driver-ICs/AS1105 Revision 1.36 1 - 15

1 General Description

The AS1105 is an LED driver for 7-segment numeric displays of up

to 4 digits. The AS1105 can be programmed via a conventional 4-

wire serial interface.

The device includes a BCD code-B decoder, a multiplex scan

circuitry, segment and display drivers, and a 32-bit memory. The

memory is used to store the LED settings, so that continuous

reprogramming is not necessary.

Every individual segment can be addressed and updated separately.

Only one external resistor is required to set the current through the

LED display.

Brightness can be controlled either in an analog or digital way. The

user can choose the internal code-B decoder to display numeric

digits or to address each segment directly.

The AS1105 features an extremely low shutdown current of only

20µA and an operational current of less than 500µA. The number of

visible digits can be programmed as well.

The AS1105 can be reset by software and an external clock can be

used. Several test modes support easy debugging.

AS1105 is offered in a 20-pin SOIC package.

Figure 1. AS1105 - Typical Application Circuit

2 Key Features

Cost effective version of AS1100 functionality for applications

up to 4-Digits

10MHz Serial Interface

Individual LED Segme nt Control

Decode/No-Decode Digit Selection

20µA Low-Power Shutdown (Data Retained)

Extremely low Operating Current 0.5mA in open loop

Digital and Analog Brightness Control

Display Blanked on Power-Up

Drive Common-Cathode LED Display

Software Reset

Optional External clock

20-pin SOIC Package

3 Applications

The AS1105 is an ideal solution for Bar-Graph Displays, Industrial

Controllers, Panel Meters, LED Matrix Displays and White Goods

such as washing machines, dishwasher, etc.

4 Digits

8 Segments

GND

CLK

LOAD

DIN

ISET

VDD

DIFG0-DIG3

SEG A-G

SEP DP

MOSI

µP I/O

SCK

+5V

4-Digit µP Display

9.53k

AS1105

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AS1105

Datasheet - Pin Assignments

4 Pin Assignments

Figure 2. Pin Configuration (Top View)

4.1 Pin Descriptions

Table 1. Pin Descriptions

Pin Number Pin Name Description

1DOUT Serial data output for cascading drivers. The output is valid after 16.5 clock cycles. The output is

never set to high impedance.

2DIN Data input. Data is programmed into the 16-bit shift register on the rising CLK edge.

3,8,5,6 DIG0 : DIG3 4-digit driver lines that sink the current from the common cathode of the display. In shutdown mode

the AS1105 switches the outputs to VDD.

4,7 GND Both GND pins must be connected.

9LOAD Strobe input. With the rising edge of the LOAD signal the 16-bit of serial data is latched into the

10 CLK Clock input. The interface is capable to support clock frequencies up to 10MHz. The serial data is

clocked into the internal shift register with the rising edge of the CLK signal. On the DOUT pin the

data is applied with the falling edge of CLK.

11:14, 17:20 SEGA:G, DP Seven segment driver lines including the decimal point. When a segment is turned off the

output is connected to GND.

15 ISET The current into ISET determines the peak current through the segments and therefore the

brightness.

16 VDD Positive Supply Voltage (+5V)

AS1105

DOUT

DIN

DIG0

GND

DIG2

DIG3

GND

DIG1

LOAD

CLK

SEG D

SEG DP

SEG E

SEG C

VDD

ISET

SEG G

SEG B

SEG F

SEG A

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AS1105

Datashee t - A b s o l u t e M a x i mu m R a t i n g s

5 Absolute Maximum Ratings

Table 2. Absolute Maximum Ratings

Parameter Min Max Units Notes

VDD to GND -0.3 +6 V

DIN, CLK, LOAD to GND -0.3 +6 V

All Other pins to GND -0.3 VDD + 0.3 V

Current

DIG0–DIG3 Sink Current 500 mA

SEGA–G, DP Source Current 100 mA

Continuous Power Dissipation (TA = +85°C)

Wide SO 941 mW Derate 11.8mW/ºC above +70ºC

Operating Temperature Range -40 +85 ºC

Storage Temperature Range -65 +150 ºC

Package body temperature +260 ºC

The reflow peak soldering temperature (body

temperature) is specified according IPC/JEDEC

J-STD-020D “Moisture/Reflow Sensitivity

Classification for non-hermetic Solid State

Surface Mount Devices”.

Moisture Sensitivity Level 3 Represents a maximum floor life of 168h

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AS1105

Datasheet - Electrical Characteristics

6 Electrical Characteristics

VDD = 5V, RSET = 9.53kΩ±1%, TA = TMIN to TMAX, unless otherwise noted

Table 3. Electrical Characteristics

Symbol Parameter Conditions Min Typ Max Units

VDD Operating Supply Voltage 4.0 5.0 5.5 V

IDDSD Shutdown Supply Current All digital inputs at VDD or GND,

TA = +25ºC 20 50 µA

IDD Operating Supply Current RSET = open circuit 500 µA

All segments and decimal point on,

ISEG = -40mA 330 mA

fOSC Display Scan Rate 500 800 1300 Hz

IDIGIT Digit Drive Sink Current VOUT = 0.65V 320 mA

ISEG Segment Drive Source Current TA = +25ºC, VOUT = (VDD -1V) -30 -40 -45 mA

ΔISEG Segment Drive Current Matching 3.0 %

IDIGIT Digit Drive Source Current Digit off, VDIGIT = (VDD -0.3V) -2 mA

ISEG Segment Drive Sink Current Segment off, VSEG = 0.3V 5 mA

Logic Inputs

IIH, IIL Input Current DIN, CLK, LOAD VIN = 0V or VDD -1 1 µA

VIH Logic High Input Voltage 3.5 V

VIL Logic Low Input Voltage 0.8 V

VOH Output High Voltage DOUT, ISOURCE = -1mA VDD - 1 V

VOL Output Low Voltage DOUT, ISINK = 1.6mA 0.4 V

Hysteresis Voltage DIN, CLK, LOAD 1 V

Timing Characteristics

tCP CLK Clock Period 100 ns

tCH CLK Pulse Width High 50 ns

tCL CLK Pulse Width Low 50 ns

tCSH CLK Rise to LOAD Rise Hold Time 0 ns

tDS DIN Setup Time 25 ns

tDH DIN Hold Time 0 ns

tDO Output Data Propagation Delay CLOAD = 50pF 25 ns

tLDCK LOAD Rising Edge to Next Clock

Rising Edge 50 ns

tCSW Minimum LOAD Pulse High 50 ns

tDSPD Data-to-Segment Delay 2.25 ms

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AS1105

Datasheet - Typical Operating Characteristics

7 Typical Operating Characteristics

Figure 3. Segment Driver Capability, Figure 4. Segment Current versa RSET

VDD = 5V, Logic Level = High

00.511.522.533.544.5

Voltage below VDD at output (V)

S egment Curr ent ( m A ) .

10 100

RSE T (k Ohm)

IS EG MENT (mA) .

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AS1105

Datasheet - Detailed Description

8 Detailed Description

8.1 Serial-Addressing Modes

The programming of the AS1105 is done via the 4-wire serial interface. A programming sequence consists of 16-bit packages. The data is shifted

into the internal 16-Bit register with the rising edge of the CLK signal. With the rising edge of the LOAD signal, the data is latched into a digital or

control register depending on the address. The LOAD signal must go to high after the 16th rising clock edge. The LOAD signal can also come

later but just before the next rising edge of CLK, otherwise data would be lost. The content of the internal shift register is applied 16.5 clock

cycles later to the DOUT pin. The data is clocked out at the falling edge of CLK. The Bits of the 16Bit-programming package are described in

Table 4. The first 4 Bits D15-D12 are ”don’t care, D11-D8 contain the address and D7-D0 contain the data. The first bit is D15, the most

significant bit (MSB). The exact timing is given in Figure 5.

Figure 5. Timing Diagram

8.2 Digit and Control Registers

The AS1105 incorporates 12 registers, which are listed in Table 5. The digit and control registers are selected via the 4Bit address word. The 4

digit registers are realized with a 32bit memory. Each digit can be controlled directly without rewriting the whole contents. The control registers

consist of decode mode, display intensity, number of scanned digits, shutdown, display test and reset/external clock register.

8.3 Shutdown Mode

The AS1105 features a shutdown mode, where it consumes only 20µA current. The shutdown mode is entered via a write to register 0Ch. Then

all segment current sources are pulled to ground and all digit drivers are connected to VDD, so that noth ing is displayed. All internal digit

registers keep the programmed values. The shutdown mode can either be used for power saving or for generating a flashing display by

repeatedly entering and leaving the shutdown mode. The AS1105 needs typically 250µs to exit the shutdown mode. During shutdown, the

AS1105 is fully programmable. Only the display test function overrides the shutdown mode.

Table 4. Serial Data Format (16 Bits)

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

X X X X Address MSB Data LSB

D15 D14

DOUT

DIN

CLK

LOAD tCSW

tCL tCtCtCtLDCK

tDO

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AS1105

Datasheet - Detailed Description

8.4 Initial Power-up

After powering up the system, all register are reset, so that the display is blank. The AS1105 starts the shutdown mode. All registers should be

programmed for normal operation. The default settings enable only scan of one digit, the internal decoder is disabled, data register and intensity

8.5 Decode-Mode Register

In the AS1105, a BCD decoder is included. Every digit can be selected via register 09h to be decoded. The BCD code consists of the numbers 0-

9, E,H, L,P and -. In register 09h, a logic high enables the decoder for the appropriate digit. In case that the decoder is bypassed (logic low), the

data Bits D7-D0 correspond to the segment lines of the AS1105. In Table 7 some possible settings for register 09h are shown. Bit D7, which

corresponds to the decimal point, is not affected by the settings of the decoder. Logic high means that the decimal point is displayed. In Table 8

the font of the Code B decoder is shown. In Table 10 the correspondence of the register to the appropriate segments of a 7 segment display is

shown (see Figure 6).

8.6 Intensity Control and Interdigit Blanking

Brightness of the display can be controlled in an analog way by changing the external resistor (RSET). The current, which flows between VDD

and ISET, defines the current that flows through the LEDs. The LED current is 100 times the ISET current. The minimum value of RSET should be

9.53kΩ, which corresponds to 40mA segment current. The brightness of the display can also be controlled digitally via register 0Ah. The

brightness can be programmed in 16 steps and is shown in Table 10. An internal pulse width modulator controls the intensity of the display.

8.7 Scan-Limit Register

The scan limit register 0Bh selects the number of digits displayed. When all 4 digits are displayed the update frequency is typically 800Hz. If the

number of digits displayed is reduced, the update frequency is reduced as well. The frequency can be calculated using 8fOSC/N, where N is the

number of digits. Since the number of displayed digits influences the brightness, the resistor RSET should be adjusted accordingly. Table 12

shows the maximum allowed current, when fewer than 4 digits are used. To avoid differences in brightness the scan limit register should not be

used to blank portions of the display (leading zeros).

Table 5. Register Address Map

D15-D12 D11 D10 D9 D8

No-Op X 0 0 0 0 0xX0

Digit 0 X 0 0 0 1 0xX1

Digit 1 X 0 0 1 0 0xX2

Digit 2 X 0 0 1 1 0xX3

Digit 3 X 0 1 0 0 0xX4

Decode Mode X 1 0 0 1 0xX9

Intensity X 1 0 1 0 0xXA

Scan Limit X 1 0 1 1 0xXB

Shutdown X 1 1 0 0 0xXC

Not used X 1 1 0 1 0xXD

Reset and ext. Clock X 1 1 1 0 0xXE

Display Test X 1 1 1 1 0xXF

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AS1105

Datasheet - Detailed Description

Note: In the above table, the decimal point (DP) is set by bit D7 = 1

Table 6. Shutdown Register Format (address (hex) = 0xXC)

Mode Address Code

(Hex) Register Data

D7 D6 D5 D4 D3 D2 D1 D0

Shutdown Mode 0xXC X X X X X X X 0

Normal Operation 0xXC X X X X X X X 1

Table 7. Decode-mode Register Examples (address (hex) = 0xX9)

Decode Mode Register Data Hex Code

D7 D6 D5 D4 D3 D2 D1 D0

No decode for digits 4–0 0 0 0 0 0 0 0 0 0x00

Code B decode for digit 0

No decode for digits 4–1 0 0 0 0 0 0 0 1 0x01

Code B decode for digits 3–0 0 0 0 0 1 1 1 1 0x0F

Code B decode for digits 4–0 1 1 1 1 1 1 1 1 0xFF

Table 8. Code B Font

7-Segment

Character Register Data On Segments = 1

D7 D6-D4 D3 D2 D1 D0 DP A B C D E F G

0X00001111110

1X00010110000

2X00101101101

3X00111111001

4X01000110011

5X01011011011

6X01101011111

7X01111110000

8X10001111111

9X10011111011

-- X 1 0 1 0 0 0 0 0 0 0 1

EX10111001111

HX11000110111

LX11010001110

PX11101100111

blank X 1 1 1 1 0 0 0 0 0 0 0

Table 9. No-decode Mode Data Bits and Corre spo ndi ng Segme nt Lines

D7 D6 D5 D4 D3 D2 D1 D0

Corresponding Segment Line DP A B C D E F G

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AS1105

Datasheet - Detailed Description

Figure 6. Standard 7-segment LED

Table 10. Intensity Register Format (address (hex) = 0xXA)

Duty Cycle D7 D6 D5 D4 D3 D2 D1 D0 Hex Code

1/32 (min on) X X X X 0 0 0 0 0xX0

3/32 X X X X 0 0 0 1 0xX1

5/32 X X X X 0 0 1 0 0xX2

7/32 X X X X 0 0 1 1 0xX3

9/32 X X X X 0 1 0 0 0xX4

11/32 X X X X 0 1 0 1 0xX5

13/32 X X X X 0 1 1 0 0xX6

15/32 X X X X 0 1 1 1 0xX7

17/32 X X X X 1 0 0 0 0xX8

19/32 X X X X 1 0 0 1 0xX9

21/32 X X X X 1 0 1 0 0xXA

23/32 X X X X 1 0 1 1 0xXB

25/32 X X X X 1 1 0 0 0xXC

27/32 X X X X 1 1 0 1 0xXD

29/32 X X X X 1 1 1 0 0xXE

31/32 (max on) X X X X 1 1 1 1 0xXF

Table 11. Scan-limit Register Format (address (hex) = 0xXB)

Scan Limit Register Data Hex Code

D7 D6 D5 D4 D3 D2 D1 D0

Display digit 0 only X X X X X 0 0 0 0xX0

Display digits 0 & 1 X X X X X 0 0 1 0xX1

Display digits 0 1 2 X X X X X 0 1 0 0xX2

Display digits 0 1 2 3 X X X X X 0 1 1 0xX3

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AS1105

Datasheet - Detailed Description

8.8 Display Test Register

With the display test register 0Fh all LED can be tested. In the test mode all LEDs are switched on at maximum brightness (duty cycle 31/32). All

programming of digit and control registers is maintained. The format of the register is given in Table 13.

Note: The AS1105 remains in display-test mode until the display-test register is reconfigured for normal operation.

8.9 No-Op Register (Cascading of AS1105)

The no-operation register 00h is used when AS1105s are cascaded in order to support more than 4 digit displays. The cascading must be done

in a way that all DOUT are connected to DIN of the following AS1105. The LOAD and CLK signals are connected to all devices. For a write

operation for example to the fifth device the command must be followed by four no-operation commands. When the LOAD signal finally goes to

high all shift registers are latched. The first four devices have got no-operation commands and only the fifth device sees the intended command

and updates its register.

8.10 Reset and External Clock Register

This register is addressed via the serial interface. It allows to switch the device to external clock mode (If D0=1 the CLK pin of the serial interface

operates as system clock input.) and to apply an external reset (D1). This brings all registers (except reg. E) to default state. For standard

operation the register contents should be "00h".

Table 12. Maximum Segment Current for 1-, 2-, or 3-digit Displays

Number of Digits Displayed Maximum Segment Current (mA)

110

220

330

Table 13. Display-test Register Format (address (hex) = 0xXF)

Mode Register Data

D7 D6 D5 D4 D3 D2 D1 D0

Normal Operation X X X X X X X 0

Display Test Mode X X X X X X X 1

Table 14. Reset and external Clock register (address (hex) = 0xXE)

Mode Address Code

(hex) Register Data

D7 D6 D5 D4 D3 D2 D1 D0

Normal Operation, internal clock 0xXE X X X X X X 0 0

Normal Operation, external clock 0xXE X X X X X X 0 1

Reset state, internal clock 0xXE X X X X X X 1 0

Reset state, external clock 0xXE X X X X X X 1 1

Table 15. RSET vs. segment current and LED forward voltage

ISEG (mA) VLED(V)

1.5 2.0 2.5 3.0 3.5

40 12.2kΩ11.8kΩ11.0kΩ10.6kΩ9.69kΩ

30 17.8kΩ17.1kΩ15.8kΩ15.0kΩ14.0kΩ

20 29.8kΩ28.0kΩ25.9kΩ24.5kΩ22.6kΩ

10 66.7kΩ63.7kΩ59.3kΩ55.4kΩ51.2kΩ

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AS1105

Datasheet - Application Information

9 Application Information

9.1 Supply Bypassing and Wiring

In order to achieve optimal performance the AS1105 shall be placed very close to the LED display to minimize effects of electromagnetic

interference and wiring inductance. Furthermore, it is recommended to connect a 10µF electrolytic and a 0.1µF ceramic capacitor between VDD

and GND to avoid power supply ripple. Also, both GNDs must be connected to ground.

9.2 Selecting RSET Resistor and Using External Drivers

The current through the segments is controlled via the external resistor RSET. Segment current is about 100 times the current in ISET. The right

values for ISET are given in Table 12. The maximum current the AS1105 can drive is 40mA. If higher currents are needed, external drivers must

be used. In that case it is no longer necessary that the AS1105 drives high currents. A recommended value for RSET is 47kΩ. In cases that the

AS1105 only drives few digits Table 10 specifies the maximum currents and RSET must be set accordingly. Refer to Absolute Maximum Ratings

to calculate acceptable limits for ambient temperature, segment current, and the LED forward-voltage drop.

9.3 4x8 LED Dot Matrix Driver

The example in Figure 7 uses the AS1105 to drive an 4x8 LED dot matrix. The LED columns have common cathode and are connected to the

DIG0-3 outputs. The rows are connected to the segment drivers. Each of the 32 LEDs can be addressed separately. The columns are sele cte d

via the digits as shown in Table 5. The decode mode register (0xX9) has to be programmed to ‘00000000’ as stated in Table 7. The single LEDs

in a column can be addressed as stated in Table 10, where D0 corresponds to segment G and D7 to segment DP. For a multiple digit dot matrix

several AS1105 have to be cascaded.

Figure 7. Application Example as LED Dot Matrix Driver

SEG F

SEG G

SEG E

SEG D

SEG C

SEG B

SEG A

SEG DP

DIG 0 DIG 3

4x8 LED Dot

SEG A-G DIG 0-3

19 VBAT

9.53k

DIN

LOA

CLK

GND GND ISET

VDD

DOUT

SEG F

SEG G

SEG E

SEG D

SEG C

SEG B

SEG A

SEG DP

DIG 0 DIG 3

4x8 LED Dot

SEG A-G DIG 0-3

19 VBAT

9.53k

DIN

LOA

CLK

GND GND ISET

VDD

DOUT

µP

Diode Arrangement

AS1105 AS1105

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AS1105

Datasheet - Application Information

9.4 Cascading Drivers

The AS1105 can be cascaded as well. The DOUT pin must be connected to the DIN pin of the following AS1105.

9.5 Computing Power Dissipation

The upper limit for power dissipation (PD) for the AS1105 is determined from the following equation:

PD = (VDD x 0.5mA) + (VDD - VLED)(DUTY x ISEG x N) (EQ 1)

Where:

VDD = supply voltage

DUTY = duty cycle set by intensity register

N = number of segments driven (worst case is 4)

VLED = LED forward voltage

ISEG = segment current set by RSET

Dissipation Example:

ISEG = 40mA, N = 4, DUTY = 31/32, VLED = 1.8V at 40mA, VDD = 5.25V

PD = 5.25V(0.5mA) + (5.25V - 1.8V)(31/32 x 40mA x 4) = 0.54W

Thus, for a SO package θJA = +85ºC/W (see Table 13), the maximum allowed ambient temperature TA is given by:

TJ,MAX = TA + PD x

JA = 150ºC = TA +0.54W x 85ºC/W (EQ 2)

Where: TA = +104ºC

Table 16. Package Thermal Resistance Data

Package Thermal Resistance (θJA)

20 Wide SO +85°C/W

Maximum Junction Temperature (TJ) = +150°C

Maximum Ambient Temperature (TA) = +85°C

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AS1105

Datasheet - Package Drawings and Markings

10 Package Drawings and Markings

The device is available in a 20-pin SOIC package.

Figure 8. SOIC-20 Package Drawings & Dimensions

Symbol Min Max

A 2.44 2.64

A1 0.10 0.30

A2 2.24 2.44

B 0.36 0.46

C 0.23 0.32

D 12.65 12.85

E 7.40 7.60

e 1.27 BSC

Symbol Min Max

H 10.11 10.51

h 0.31 0.71

J0.53 0.73

K7° BSC

L 0.51 1.01

R 0.63 0.89

ZD 0.66 REF

α0° 8°

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AS1105

Datasheet - Ordering Information

11 Ordering Information

The device is available as the standard products listed in Table 17.

Note: All products are RoHS compliant.

Buy our products or get free samples online at www.ams.com/ICdirect

Technical Support is available at www.ams.com/Technical-Support

For further information and requests, email us at sales@ams.com

(or) find your local distributor at www.ams.com/distributor

Table 17. Ordering Information

Part Temp Range Package Delivery Form

AS1105WL -40ºC to +85ºC 20-pin SOIC Tubes

AS1105WL-T -40ºC to +85ºC 20-pin SOIC T&R

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AS1105

Datasheet - Ordering Information

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devices from patent infringement. ams AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior

to designing this product into a system, it is necessary to check with ams AG for current information. This product is intended for use in normal

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