IPD040N03LG - Infineon Technologies

Type IPD040N03L G

IPS040N03L G

OptiMOS®3 Power-Transistor

Features

• Fast switching MOSFET for SMPS

• Optimized technology for DC/DC converters

• Qualified according to JEDEC1) for target applications

• N-channel, logic level

• Excellent gate charge x RDS(on) product (FOM)

• Very low on-resistance RDS(on)

• Avalanche rated

• Pb-free plating; RoHS compliant

Maximum ratings, at Tj=25 °C, unless otherwise specified

Parameter Symbol Conditions Unit

Continuous drain current IDVGS=10 V, TC=25 °C 90 A

VGS=10 V, TC=100 °C 76

VGS=4.5 V, TC=25 °C 89

VGS=4.5 V,

TC=100 °C 63

Pulsed drain current2) ID,pulse TC=25 °C 400

Avalanche current, single pulse3) IAS TC=25 °C 90

Avalanche energy, single pulse EAS ID=50 A, RGS=25 Ω60 mJ

Reverse diode dv/dtdv/dt

ID=90 A, VDS=24 V,

di/dt=200 A/µs,

Tj,max=175 °C

6 kV/µs

Gate source voltage VGS ±20 V

Value

1) J-STD20 and JESD22

VDS 30 V

RDS(on),max 4mΩ

ID90 A

Product Summary

Type IPD040N03L G IPS040N03L G

Package PG-TO252-3-11 PG-TO251-3-11

Marking 040N03L 040N03L

Rev. 1.02 page 1 2008-04-15

http://store.iiic.cc/

IPD040N03L G

IPS040N03L G

Maximum ratings, at Tj=25 °C, unless otherwise specified

Parameter Symbol Conditions Unit

Power dissipation Ptot TC=25 °C 79 W

Operating and storage temperature Tj, Tstg -55 ... 175 °C

IEC climatic category; DIN IEC 68-1 55/175/56

Parameter Symbol Conditions Unit

min. typ. max.

Thermal characteristics

Thermal resistance, junction - case RthJC - - 1.9 K/W

SMD version, device on PCB RthJA minimal footprint - - 75

6 cm² cooling area4) --50

Electrical characteristics, at Tj=25 °C, unless otherwise specified

Static characteristics

Drain-source breakdown voltage V(BR)DSS VGS=0 V, ID=1 mA 30 - - V

Gate threshold voltage VGS(th) VDS=VGS, ID=250 µA 1 - 2.2

Zero gate voltage drain current IDSS

VDS=30 V, VGS=0 V,

Tj=25 °C - 0.1 1 µA

VDS=30 V, VGS=0 V,

Tj=125 °C - 10 100

Gate-source leakage current IGSS VGS=20 V, VDS=0 V - 10 100 nA

RDS(on) VGS=4.5 V, ID=30 A - 4.7 5.9 mΩ

VGS=10 V, ID=30 A - 3.3 4

Gate resistance RG- 1.5 - Ω

Transconductance gfs

|VDS|>2|ID|RDS(on)max,

ID=30 A 44 89 - S

Value

Values

2) See figure 3 for more detailed information

Drain-source on-state resistance5)

4) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain

connection. PCB is vertical in still air.

5) Measured from drain tab to source pin

3) See figure 13 for more detailed information

Rev. 1.02 page 2 2008-04-15

http://store.iiic.cc/

IPD040N03L G

IPS040N03L G

Parameter Symbol Conditions Unit

min. typ. max.

Dynamic characteristics

Input capacitance Ciss - 2900 3900 pF

Output capacitance Coss - 1100 1500

Reverse transfer capacitance Crss -60-

Turn-on delay time td(on) - 7.4 - ns

Rise time tr- 6.8 -

Turn-off delay time td(off) -27-

Fall time tf- 4.2 -

Gate Char

e Characteristics6)

Gate to source charge Qgs - 8.8 - nC

Gate charge at threshold Qg(th) - 4.7 -

Gate to drain charge Qgd - 4.2 -

Switching charge Qsw - 8.3 -

Gate charge total Qg-1824

Gate plateau voltage Vplateau - 3.0 - V

Gate charge total Qg

VDD=15 V, ID=30 A,

VGS=0 to 10 V -38-

Gate charge total, sync. FET Qg(sync)

VDS=0.1 V,

VGS=0 to 4.5 V -1621nC

Output charge Qoss VDD=15 V, VGS=0 V -28-

Reverse Diode

Diode continuous forward current IS- - 66 A

Diode pulse current IS,pulse - - 400

Diode forward voltage VSD

VGS=0 V, IF=30 A,

Tj=25 °C - 0.83 1.1 V

Reverse recovery charge Qrr

VR=15 V, IF=IS,

diF/dt=400 A/µs - - 20 nC

6) See figure 16 for gate charge parameter definition

TC=25 °C

Values

VGS=0 V, VDS=15 V,

f=1 MHz

VDD=15 V, VGS=10 V,

ID=30 A, RG=1.6 Ω

VDD=15 V, ID=30 A,

VGS=0 to 4.5 V

Rev. 1.02 page 3 2008-04-15

http://store.iiic.cc/

IPD040N03L G

IPS040N03L G

1 Power dissipation 2 Drain current

Ptot=f(TC)ID=f(TC); VGS≥10 V

3 Safe operating area 4 Max. transient thermal impedance

ID=f(VDS); TC=25 °C; D=0 ZthJC=f(tp)

parameter: tpparameter: D=tp/T

1 µs

10 µs

100 µs

1 ms

10 ms

102

101

100

10-1

103

102

101

100

10-1

VDS [V]

ID [A]

limited by on-state

resistance

single pulse

0.01

0.02

0.05

0.1

0.2

0.5

100

10-1

10-2

10-3

10-4

10-5

10-6

0.01

0.1

0000001

tp [s]

ZthJC [K/W]

0 50 100 150 200

TC [°C]

Ptot [W]

100

0 50 100 150 200

TC [°C]

ID [A]

Rev. 1.02 page 4 2008-04-15

http://store.iiic.cc/

IPD040N03L G

IPS040N03L G

5 Typ. output characteristics 6 Typ. drain-source on resistance

ID=f(VDS); Tj=25 °C RDS(on)=f(ID); Tj=25 °C

parameter: VGS parameter: VGS

7 Typ. transfer characteristics 8 Typ. forward transconductance

ID=f(VGS); |VDS|>2|ID|RDS(on)max gfs=f(ID); Tj=25 °C

parameter: Tj

3.2 V

3.5 V

4 V

4.5 V

5 V

10 V

11.5 V

0 20406080100

ID [A]

RDS(on) [mΩ]

25 °C

175 °C

120

160

012345

VGS [V]

ID [A]

120

160

0 20406080100

ID [A]

gfs [S]

2.8 V

3 V

3.2 V

3.5 V

4 V

4.5 V

5 V

10 V

120

160

0123

VDS [V]

ID [A]

Rev. 1.02 page 5 2008-04-15

http://store.iiic.cc/

IPD040N03L G

IPS040N03L G

9 Drain-source on-state resistance 10 Typ. gate threshold voltage

RDS(on)=f(Tj); ID=30 A; VGS=10 V VGS(th)=f(Tj); VGS=VDS; ID=250 µA

11 Typ. capacitances 12 Forward characteristics of reverse diode

C=f(VDS); VGS=0 V; f=1 MHz IF=f(VSD)

parameter: Tj

typ

98 %

-60 -20 20 60 100 140 180

Tj [°C]

RDS(on) [mΩ]

0.5

1.5

2.5

-60 -20 20 60 100 140 180

Tj [°C]

VGS(th) [V]

Ciss

Coss

Crss

104

103

102

101

0102030

VDS [V]

C [pF]

25 °C

175 °C

25 °C, 98%

175 °C, 98%

103

102

101

100

0 0.5 1 1.5 2

VSD [V]

IF [A]

Rev. 1.02 page 6 2008-04-15

http://store.iiic.cc/

IPD040N03L G

IPS040N03L G

13 Avalanche characteristics 14 Typ. gate charge

IAS=f(tAV); RGS=25 ΩVGS=f(Qgate); ID=30 A pulsed

parameter: Tj(start) parameter: VDD

15 Drain-source breakdown voltage 16 Gate charge waveforms

VBR(DSS)=f(Tj); ID=1 mA

-60 -20 20 60 100 140 180

Tj [°C]

VBR(DSS) [V]

gate

gs(th)

g(th)

25 °C

100 °C

150 °C

103

102

101

100

10-1

100

tAV [µs]

IAV [A]

6 V

15 V

24 V

0 1020304050

Qgate [nC]

VGS [V]

Rev. 1.02 page 7 2008-04-15

http://store.iiic.cc/

IPD040N03L G

IPS040N03L G

Package Outline PG-TO252-3-11

Rev. 1.02 page 8 2008-04-15

http://store.iiic.cc/

IPD040N03L G

IPS040N03L G

Package Outline PG-TO251-3-11

Rev. 1.02 page 9 2008-04-15

http://store.iiic.cc/

IPD040N03L G

IPS040N03L G

Published by

Infineon Technologies AG

81726 Munich, Germany

Legal Disclaimer

The information given in this document shall in no event be regarded as a guarantee of

conditions or characteristics. With respect to any examples or hints given herein, any typical

values stated herein and/or any information regarding the application of the device,

Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind,

including without limitation, warranties of non-infringement of intellectual property rights

of any third party.

Information

For further information on technology, delivery terms and conditions and prices, please

contact the nearest Infineon Technologies Office (www.infineon.com).

Warnings

Due to technical requirements, components may contain dangerous substances. For information

on the types in question, please contact the nearest Infineon Technologies Office.

Infineon Technologies components may be used in life-support devices or systems only with

the express written approval of Infineon Technologies, if a failure of such components can

reasonably be expected to cause the failure of that life-support device or system or to affect

the safety or effectiveness of that device or system. Life support devices or systems are

intended to be implanted in the human body or to support and/or maintain and sustain

and/or protect human life. If they fail, it is reasonable to assume that the health of the user

or other persons may be endangered.

Rev. 1.02 page 10 2008-04-15

http://store.iiic.cc/