Figure 1. ADS-943 Functional Block Diagram
REF
DAC
REGISTER
REGISTER
OUTPUT REGISTER
16 BIT 14 (LSB)
15 BIT 13
12 TIB 12
11 BIT 11
10 BIT 10
9 BIT 9
8 BIT 8
7 BIT 7
6 BIT 6
5 BIT 5
4 BIT 4
3 BIT 3
2 BIT 2
1 BIT 1 (MSB)
TIMING AND
CONTROL LOGIC
OFFSET ADJUST 23
ANALOG INPUT 21
START CONVERT 18
EOC 17
+5V ANALOG SUPPLY 22
+5V DIGITAL SUPPLY 13
DIGITAL GROUND 14
–5V SUPPLY 20
ANALOG GROUND 19, 24
–
+
S/H
BUFFER
DIGITAL CORRECTION LOGIC
FLASH
ADC
1
FLASH
ADC
2
POWER AND GROUNDING
3
AMP
BLOCK DIAGRAM
The low-cost ADS-943 is a 14-bit, 3MHz
sampling A/D converter optimized to meet the
demanding dynamic-range and sampling-rate
requirements of contemporary digital telecommu-
nications applications. The ADS-943's outstanding
dynamic performance is evidenced by a peak har-
monic specifi cation of –83dB and a signal-to-noise
ratio (SNR) of 79dB. Additionally, the ADS-943
easily achieves the 2.2MHz minimum sampling
rate required by digital receivers in certain ADSL,
HDSL and ATM applications. The ADS-943 also
addresses size and power constraints normally
associated with these types of applications. This
device requires just ±5V supplies, dissipates 1.7
Watts, and is packaged in a very small 24-pin DDIP.
Although optimized for frequency-domain
applications, the ADS-943's DNL and noise speci-
fi cations are also outstanding, thereby making
it an equally impressive device for time-domain
applications (graphic and medical imaging, pro-
cess control, etc.). In fact, the ADS-943 guarantees
no missing codes to the 14-bit level over the full
HI-REL operating temperature range.
The functionally complete ADS-943 contains a
fast-settling sample-hold amplifi er, a subranging
(two-pass) A/D converter, an internal reference,
timing/control logic, and error-correction circuitry.
Digital input and output levels are TTL. The unit is
edge-triggered, requiring only the rising edge of
a start convert pulse to initiate a conversion. The
device is offered with a bipolar input range of ±2V.
Models are available for use in either commercial
(0 to +70°C) or HI-REL (–55 to +125°C) operating
temperature ranges. A proprietary, auto-calibrat-
ing, error-correcting circuit allows the device to
achieve specifi ed performance over the full HI-REL
temperature range.
PRODUCT OVERVIEW
FEATURES
■ 14-bit resolution
■ 3MHz minimum sampling rate
■ Ideal for both frequency and time-domain
applications
■ Excellent peak harmonics, –83dB
■ Excellent signal-to-noise ratio, 79dB
■ No missing codes over full HI-REL temperature
range
■ ±5V supplies, 1.7 Watts
■ Small, 24-pin ceramic DDIP or SMT
■ Low cost
INPUT/OUTPUT CONNECTIONS
PIN FUNCTION PIN FUNCTION
1 BIT1 (MSB) 24 ANALOG GROUND
2 BIT 2 23 OFFSET ADJUST
3 BIT 3 22 +5V ANALOG SUPPLY
4 BIT 4 21 ANALOG INPUT
5 BIT 5 20 –5V SUPPLY
6 BIT 6 19 ANALOG GROUND
7 BIT 7 18 START CONVERT
8 BIT 8 17 EOC
9 BIT 9 16 BIT 14 (LSB)
10 BIT 10 15 BIT 13
11 BIT 11 14 DIGITAL GROUND
12 BIT 12 13 +5V DIGITAL SUPPLY
ADS-943
14-Bit, 3MHz, Low-Distortion, Sampling A/D Converters
®®
DATEL • 11 Cabot Boulevard, Mansfi eld, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: help@datel.com
01 Apr 2011 MDA_ADS-943.B03 Page 1 of 8
PHYSICAL/ENVIRONMENTAL
PARAMETERS MIN. TYP. MAX. UNITS
Operating Temp. Range, Case
ADS-943MC, GC 0 — +70 °C
ADS-943MM, GM –55 — +125 °C
Thermal Impedance
Tjc — 6 — °C/Watt
Tca — 24 — °C/Watt
Storage Temperature Range –65 — +150 °C
Package Type 24-pin, metal-sealed, ceramic DDIP or SMT
Weight 0.42 ounces (12 grams)
ABSOLUTE MAXIMUM RATINGS
PARAMETERS LIMITS UNITS
+12V/+15V Supply (Pin 22) 0 to +16 Volts
–12V/–15V Supply (Pin 24) 0 to –16 Volts
+5V Supply (Pin 13) 0 to +6 Volts
Digital Input (Pin 16) –0.3 to +VDD +0.3 Volts
Analog Input (Pin 20) ±15 Volts
Lead Temperature (10 seconds) +300 °C
+25°C 0 TO +70°C –55 TO +125°C
ANALOG INPUT MIN. TYP. MAX. MIN. TYP. MAX. MIN. TYP. MAX. UNITS
Input Voltage Range d — ±2 — — ±2 — — ±2 — Volts
Input Resistance — 280 — — 280 — — 280 — :
Input Capacitance — 6 15 — 6 15 — 6 15 pF
DIGITAL INPUT
Logic Levels
Logic "1" +2.0 — — +2.0 — — +2.0 — — Volts
Logic "0" — — +0.8 — — +0.8 — — +0.8 Volts
Logic Loading "1" — — +20 — — +20 — — +20 µA
Logic Loading "0" — — –20 — — –20 — — –20 µA
Start Convert Positive Pulse Width ➂ 10 20 — 10 20 — 10 20 —
STATIC PERFORMANCE
Resolution — 14 — — 14 — — 14 — Bits
Integral Nonlinearity (fi n = 10kHz) — ±0.75 — — ±0.75 — — ±1 — LSB
Differential Nonlinearity (fi n = 10kHz) –0.95 ±0.5 +1.25 –0.95 ±0.5 +1.25 –0.95 ±0.75 +1.5 LSB
Full Scale Absolute Accuracy — ±0.15 ±0.4 — ±0.15 ±0.4 — ±0.4 ±0.6 %FSR
Bipolar Zero Error (Tech Note 2) — ±0.1 ±0.3 — ±0.1 ±0.3 — ±0.3 ±0.6 %FSR
Gain Error (Tech Note 2) — ±0.2 ±0.5 — ±0.2 ±0.5 — ±0.4 ±1.25 %
No Missing Codes (fi n = 10kHz) 14 — — 14 — — 14 — — Bits
No Missing Codes (fin = 10kHz) 14 — — 14 — — 14 — — Bits
DYNAMIC PERFORMANCE
Peak Harmonics (–0.5dB)
dc to 500kHz — –83 –77 — –83 –77 — –81 –75 dB
500kHz to 1MHz — –83 –77 — –83 –77 — –81 –75 dB
1MHz to 1.5MHz — –83 –77 — –83 –77 — –81 –75 dB
Total Harmonic Distortion (–0.5dB)
dc to 500kHz — –80 –76 — –80 –76 — –78 –74 dB
500kHz to 1MHz — –80 –76 — –80 –76 — –77 –73 dB
1MHz to 1.5MHz — –80 –76 — –80 –76 — –77 –73 dB
Signal-to-Noise Ratio (w/o distortion, –0.5dB)
dc to 500kHz 76 79 — 76 79 — 75 78 — dB
500kHz to 1MHz 76 79 — 76 79 — 74 77 — dB
1MHz to 1.5MHz 75 78 — 75 78 — 74 77 — dB
Signal-to-Noise Ratio f (& distortion, –0.5dB)
dc to 500kHz 73 77 — 73 77 — 71 75 — dB
500kHz to 1MHz 73 77 — 73 77 — 71 75 — dB
1MHz to 1.5MHz 73 77 — 73 77 — 71 74 — dB
Noise — 125 — — 125 — — 125 — Vrms
Two-Tone Intermodulation Distortion
(fi n = 975kHz, 1.2MHz, fs = 3MHz, –0.5dB) — –82 — — –82 — — –82 — dB
Input Bandwidth (–3dB)
Small Signal (–20dB input) — 30 — — 30 — — 30 — MHz
Large Signal (–0dB input) — 10 — — 10 — — 10 — MHz
Feedthrough Rejection (fi n = 1.5MHz) — 85 — — 85 — — 85 — dB
Slew Rate — ±400 — — ±400 — — ±400 — V/s
Aperture Delay Time — +5 — — +5 — — +5 — ns
Aperture Uncertainty — 2 — — 2 — — 2 — ps rms
S/H Acquisition Time ( to ±0.003%FSR, 4V step) — 208 215 — 208 215 — 208 215 ns
Overvoltage Recovery Time ➄ — 100 333 — 100 333 — 100 333 ns
A/D Conversion Rate 3 — — 3 — — 3 — — MHz
FUNCTIONAL SPECIFICATIONS
(TA = +25°C, +VDD = +5V, 3MHz sampling rate, and a minimum 3 minute warmup ➀ unless otherwise specifi ed.)
ADS-943
14-Bit, 3MHz, Low-Distortion, Sampling A/D Converters
®®
DATEL • 11 Cabot Boulevard, Mansfi eld, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: help@datel.com
01 Apr 2011 MDA_ADS-943.B03 Page 2 of 8
TECHNICAL NOTES
Footnotes:
➀ All power supplies must be on before applying a start convert pulse. All supplies and
the clock (START CONVERT) must be present during warmup periods. The device
must be continuously converting during this time.
➁ Contact DATEL for availability of other input voltage ranges.
➂ A 3MHz clock with a 20nsec positive pulse width is used for all production testing.
When sampling at 3MHz, the start convert pulse must be between 10 and 110nsec
wide or between 160 and 300nsec wide. The falling edge must not occur between
110 and 160nsec. For lower sampling rates, wider start pulses may be used.
➄ This is the time required before the A/D output data is valid after the analog input is
back within the specifi ed range. This time is only guaranteed if the input does not
exceed ±2.2V (S/H Saturation Voltage).
➅ The minimum supply voltages of +4.9V and –4.9V for ±VDD are required for –55°C
operation only. The minumum limits are +4.75V and –4.75V when operating at +125°C.
(SNR + Distortion) – 1.76 + 20 log Full Scale Amplitude
Actual Input Amplitude
6.02
➃ Effective bits is equal to:
1. Obtaining fully specifi ed performance from the ADS-943 requires care-
ful attention to pc-card layout and power supply decoupling. The device's
analog and digital ground systems are connected to each other internally.
For optimal performance, tie all ground pins (14, 19 and 24) directly to a
large analog ground plane beneath the package.
Bypass all power supplies to ground with 4.7F tantalum capacitors in
parallel with 0.1F ceramic capacitors. Locate the bypass capacitors as
close to the unit as possible.
2. The ADS-943 achieves its specifi ed accuracies without the need for exter-
nal calibration. If required, the device's small initial offset and gain errors
can be reduced to zero using the adjustment circuitry shown in Figures 2
and 3. When using this circuitry, or any similar offset and gain-calibration
hardware, make adjustments following warmup. To avoid interaction,
always adjust offset before gain.
3. Applying a start convert pulse while a conversion is in progress (EOC =
logic "1") will initiate a new and inaccurate conversion cycle. Data for the
interrupted and subsequent conversions will be invalid.
4. A passive bandpass fi lter is used at the input of the A/D for all production
testing.
+25°C 0 TO +70°C –55 TO +125°C
DIGITAL OUTPUTS MIN. TYP. MAX. MIN. TYP. MAX. MIN. TYP. MAX. UNITS
Logic Levels
Logic "1" +2.4 — — +2.4 — — +2.4 — — Volts
Logic "0" — — +0.4 — — +0.4 — — +0.4 Volts
Logic Loading "1" — — –4 — — –4 — — –4 mA
Logic Loading "0" — — +4 — — +4 — — +4 mA
Output Coding Offset Binary
POWER REQUIREMENTS
Power Supply Ranges➅
+5V Supply +4.75 +5.0 +5.25 +4.75 +5.0 +5.25 +4.9 +5.0 +5.25 Volts
–5V Supply –4.75 –5.0 –5.25 –4.75 –5.0 –5.25 –4.9 –5.0 –5.25 Volts
Power Supply Currents
+5V Supply — +210 +230 — +210 +230 — +210 +230 mA
–5V Supply — –180 –195 — –180 –195 — –180 –195 mA
Power Dissipation — 1.7 2.0 — 1.7 2.0 — 1.7 2.0 Watts
Power Supply Rejection — — ±0.05 — — ±0.05 — — ±0.05 %FSR/%V
To Pin21
of ADS-943
–5V
SIGNAL
INPUT
GAIN
ADJUST
1.98k7
507
+5V
2k7
Figure 2. Optional ADS-943 Gain
Adjust Calibration Circuit
ADS-943
14-Bit, 3MHz, Low-Distortion, Sampling A/D Converters
®®
DATEL • 11 Cabot Boulevard, Mansfi eld, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: help@datel.com
01 Apr 2011 MDA_ADS-943.B03 Page 3 of 8
0.1F0.1F
4.7F 4.7F
22, 13
24
2019
ADS-943
–5V
20k7
0.1F
4.7F
+5V
14
–5V
+5V
21
23
18
1
2
3
4
5
6
7
8
9
10
11
12
15
16
17
BIT 1 (MSB)
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
BIT 9
BIT 10
BIT 11
BIT 12
BIT 13
BIT 14 (LSB)
EOC
ANALOG
INPUT
START
CONVERT
A single +5V supply should be used for both the +5V analog and +5V digital.
If separate supplies are used, the difference between the two cannot exceed 100mV.
~
~
+ + +
ZERO/
OFFSET
ADJUST
Figure 3. Connection Diagram
CALIBRATION PROCEDURE
Any offset and/or gain calibration procedures should not be implemented
until devices are fully warmed up. To avoid interaction, offset must be
adjusted before gain. The ranges of adjustment for the circuits in Figures
2 and 3 are guaranteed to compensate for the ADS-943's initial accuracy
errors and may not be able to compensate for additional system errors.
A/D converters are calibrated by positioning their digital outputs exactly
on the transition point between two adjacent digital output codes. This can
be accomplished by connecting LED's to the digital outputs and adjusting
until certain LED's "fl icker" equally between on and off. Other approaches
employ digital comparators or microcontrollers to detect when the outputs
change from one code to the next.
Offset adjusting for the ADS-943 is normally accomplished at the point
where the MSB is a 1 and all other output bits are 0's and the LSB just
changes from a 0 to a 1. This digital output transition ideally occurs when
the applied analog input is +½ LSB (+122V).
Gain adjusting is accomplished when all bits are 1's and the LSB just
changes from a 1 to a 0. This transition ideally occurs when the analog
input is at +full scale minus 1½ LSB's (+1.99963V).
Zero/Offset Adjust Procedure
1. Apply a train of pulses to the START CONVERT input (pin 18) so the con-
verter is continuously converting.
2. Apply +122V to the ANALOG INPUT (pin 21).
3. Adjust the offset potentiometer until the output bits are 10 0000 0000
0000 and the LSB fl ickers between 0 and 1.
Gain Adjust Procedure
1. Apply +1.99963V to the ANALOG INPUT (pin 21).
2. Adjust the gain potentiometer until all output bits are 1's and the LSB
fl ickers between 1 and 0.
3. To confi rm proper operation of the device, vary the input signal to obtain
the output coding listed in Table 2.
Table 2. Output Coding for Bipolar Operation
BIPOLAR SCALE INPUT VOLTAGE
(±2V RANGE)
OFFSET BINARY
MSB LSB
+FS – 1 LSB +1.99976 11 1111 1111 1111
+3/4FS +1.50000 11 1000 0000 0000
+1/2FS +1.00000 11 0000 0000 0000
0 0.00000 10 0000 0000 0000
–1/2 FS –1.00000 01 0000 0000 0000
–3/4 FS –1.50000 00 1000 0000 0000
–FS +1 LSB 1.99976 00 0000 0000 0001
–FS –2.00000 00 0000 0000 0000
Table 1. Gain and Zero Adjust
INPUT VOLTAGE
RANGE
ZERO ADJUST
+½ LSB
GAIN ADJUST
+FS –1½ LSB
±2V +122V +1.99963V
ADS-943
14-Bit, 3MHz, Low-Distortion, Sampling A/D Converters
®®
DATEL • 11 Cabot Boulevard, Mansfi eld, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: help@datel.com
01 Apr 2011 MDA_ADS-943.B03 Page 4 of 8
OUTPUT
DATA Data N Valid
Scale is approximately 20ns per division. Sampling rate = 3MHz.
EOC
Data N-1 Valid Data N+1 Valid
Invalid
Data
283ns typ.
35ns typ.
130ns
1.
The start convert positive pulse width must be between either 10 and 110nsec or
160 and 300nsec (when sampling at 3MHz) to ensure proper operation. For sampling
rates lower than 3MHz, the start pulse can be wider than 300nsec, however a minimum
pulse width low of 30nsec should be maintained. A 3MHz clock with a 20nsec positive
p
ulse width is used for all
p
roduction testin
g
.
2.
Note:
10ns max.
INTERNAL S/H
10ns typ.
Acquisition Time
125ns typ. 208ns typ.
215ns max.
Hold
Conversion Time
120ns min., 130ns typ.,
140ns max.
50ns typ.
30ns typ.
125ns typ.
START
CONVERT
NN+1
333nsec
20ns typ.
Figure 4. ADS-943 Timing Diagram
devices do not overheat. The ground and power planes beneath the package,
as well as all pcb signal runs to and from the device, should be as heavy as
possible to help conduct heat away from the package.
Electrically-insulating, thermally-conductive "pads" may be installed
underneath the package. Devices should be soldered to boards rather than
"socketed," and of course, minimal air fl ow over the surface can greatly help
reduce the package temperature.
THERMAL REQUIREMENTS
All DATEL sampling A/D converters are fully characterized and speci-
fi ed over operating temperature (case) ranges of 0 to +70°C and –55
to +125°C. All room-temperature (TA = +25°C) production testing is
performed without the use of heat sinks or forced-air cooling. Thermal
impedance fi gures for each device are listed in their respective specifi ca-
tion tables.
These devices do not normally require heat sinks; however, standard
precautionary design and layout procedures should be used to ensure
ADS-943
14-Bit, 3MHz, Low-Distortion, Sampling A/D Converters
®®
DATEL • 11 Cabot Boulevard, Mansfi eld, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: help@datel.com
01 Apr 2011 MDA_ADS-943.B03 Page 5 of 8
Figure 5. ADS-943 Evaluation Board Schematic
GND
Q
CLR
CK
D
PR
+5VF
+5VA
+15V
–15V
-15V
+15V
–5VA
+5V
–5V
+5VF
-15V
-5VA
OPTION
+5VF
Q
PR
D
CK
CLR
+5VF
+5VF
+5VF
+5V
–5V
+5VA
BIT12
BIT11
BIT10
BIT9
BIT8
BIT7
BIT6
BIT5
BIT4
BIT3
BIT2
BIT1
ADS-943
+5VD
DGND
BIT13
BIT14
EOC
TRIG
AGND
-5V
AIN
+5VA
OFFSET
AGND
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
8D
7D
6D
5D
4D
3D
2D
1D
+
+
+
+
+
+
+
–
+5VA+15V
+
+
+
+
+
C15
U6
P2
SG10
SG3
SG2
SG1
C14
C7
C13
C6
C12C5
L7
L6
R1
C20
C4 C11
L5
L4
L3
C3 C10
C2 C9
L2
C8C1
L1
P4
C19
SG8SG7
U4
R2
C18
SG5 SG6
SG4
R3
C26 C27 C25
SG9
C24
C23
C16
C22
C17
C21
X1
U6
P3
JPR1
U5
P1
JPR2
U5
U1
U3
OFFSET
ADJUST
ANA. IN
IN
ANA.
CLC402
HI2541
ANA. IN
START CONVERT
7
8
14
CONV.
START
74HCT86
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
TRIG
74HCT86
74HCT573
74HCT573
74HCT86
HCT7474
20H
20H
20k
20H
20H
20H
20H
20H
HCT7474
3MHz
CRYSTAL
15pF
3.2k
2.2F
4
5
6
13
12 14
11
7
9
8
13
11
12
10
26
24
22
25
23
21
19
17
15
13
11
9
7
5
3
1
20
18
16
14
12
10
8
6
4
2
2
5
411
10
14
5
6
4
2
3
1
7
231
2
13
33
31
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
23
1
9
10
8
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
10
1
12
13
14
15
16
17
18
19
20
2
3
4
5
6
7
8
9
11
SPARE GATES
C1 - C7 ARE 20V.
2. CLOSE SG1-SG3, SG9, SG10.
ALL RESISTORS ARE IN OHMS.
1. UNLESS OTHERWISE SPECIFIED ALL CAPACITORS ARE 50V.
NOTES:
OE
CE
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
8D
7D
6D
5D
4D
3D
2D
1D
U2
10
12
13
14
15
16
17
18
19
20
2
3
4
5
6
7
8
9
11 OE
CE
1
CE
0.1F
0.1F
0.1F
0.1F
0.1F
2.2F
0.1F
2.2F
2.2F
0.1F
2.2F
2.2F
2.2F
2.2F
2.2F
2.2F
2.2F
6
+5VF
(Optional) (Optional)
(Optional)
(Optional)
0.01F
0.01F
0.01F
0.01F
0.01F
0.01F
0.01F
0.1F
U5
U5
Q
3. SEE DATEL DWG A-24546 FOR ADDITIONAL INFORMATION
ON ADS-B946 EVALUATION BOARD.
ADS-943
14-Bit, 3MHz, Low-Distortion, Sampling A/D Converters
®®
DATEL • 11 Cabot Boulevard, Mansfi eld, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: help@datel.com
01 Apr 2011 MDA_ADS-943.B03 Page 6 of 8
Figure 6. ADS-943 FFT Analysis
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
–140
–150
Amplitude Relative to Full Scale (dB)
0 150 300 450 600 750 900 1.05 1.20 1.35 1.5
kHz kHz kHz kHz kHz kHz MHz MHz MHz MH
z
Frequency
(fs = 3MHz, fin = 1.485MHz, Vin = –0.5dB, 16,384-point FFT)
Figure 7. ADS-943 Histogram and Differential Nonlinearity
Number of Occurences
Digital Output Code
016,384
+0.60
0.00
–0.58
016,384
Digital Output Code
DNL (LSB's)
ADS-943
14-Bit, 3MHz, Low-Distortion, Sampling A/D Converters
®®
DATEL • 11 Cabot Boulevard, Mansfi eld, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: help@datel.com
01 Apr 2011 MDA_ADS-943.B03 Page 7 of 8
MECHANICAL DIMENSIONS - INCHES (mm)
ORDERING INFORMATION
MODEL
NUMBER
OPERATING
TEMP. RANGE 24-PIN PACKAGE ACCESSORIES
ADS-943MC 0 to +70°C DDIP ADS-B943 Evaluation Board (without ADS-943)
ADS-943MC-C* 0 to +70°C DDIP HS-24 Heat Sinks for all ADS-943 DDIP models.
ADS-943MM –55 to +125°C DDIP
Receptacles for PC board mounting can be ordered through AMP
Inc. Part #3-331272-8 (Component Lead Socket), 24 required.
For MIL-STD-883 product specifi cations, contact DATEL.
ADS-943/883 –55 to +125°C DDIP
ADS-943GC 0 to +70°C SMT
ADS-943GC-C* 0 to +70°C SMT
ADS-943GM –55 to +125°C SMT
ADS-943G/883 –55 to +125°C SMT
*RoHS-6 hazardous substance compliant. Product models without the "-C" suffi x are not RoHS compliant. RoHS-6 fabrication does not
claim EU RoHS exemption 7b – lead in solder.
0.80 MAX.
(20.32)
0.015
(0.381)
MAX. radius
for any pin
1.31 MAX.
(33.02)
0.100 TYP.
(2.540)
0.100
(2.540)
0.190 MAX.
(4.826)
0.040
(1.016)
0.020 TYP.
(0.508)
0.020
(0.508)
24 13
121
PIN 1
INDEX
0.130 TYP.
(3.302)
Dimension Tolerances (unless otherwise indicated):
2 place decimal (.XX) ±0.010 (±0.254)
3 place decimal (.XXX) ±0.005 (±0.127)
Lead Material: Kovar alloy
Lead Finish: 50 microinches (minimum) gold plating
over 100 microinches (nominal) nickel plating
0.060 TYP.
(1.524)
0.010 TYP.
(0.254)
0.200 MAX.
(5.080)
0.235 MAX.
(5.969)
0.600 ±0.010
(15.240)
0.80 MAX.
(20.32)
0.100 TYP.
(2.540)
0.100
(2.540)
0.018 ±0.002
(0.457)
0.100
(2.540)
0.040
(1.016)
1.31 MAX.
(33.27)
112
13
24
1.100
(27.940)
0.190 MAX.
(4.826)
0.010
(0.254)
+0.002
–0.001
SEATING
PLANE
0.025
(0.635)
Dimension Tolerances (unless otherwise indicated):
2 place decimal (.XX) ±0.010 (±0.254)
3 place decimal (.XXX) ±0.005 (±0.127)
Lead Material: Kovar alloy
Lead Finish: 50 microinches (minimum) gold plating
over 100 microinches (nominal) nickel plating
PIN 1 INDEX
24-Pin DDIP
Versions
ADS-943MC
ADS-943MM
ADS-943/883
24-Pin
Surface Mount
Versions
ADS-943GC
ADS-943GM
ADS-943G/883
ADS-943
14-Bit, 3MHz, Low-Distortion, Sampling A/D Converters
. makes no representation that the use of its products in the circuits described herein, or the use of other
technical information contained herein, will not infringe upon existing or future patent rights. The descriptions contained herein do not
imply the granting of licenses to make, use, or sell equipment constructed in accordance therewith. Specifi cations are subject to change
without notice.
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01 Apr 2011 MDA_ADS-943.B03 Page 8 of 8