VN5770AK-E Quad smart power solid state relay for complete H-bridge configurations Features Type RDS(on) IOUT VCC VN5770AK-E 280m(1) 8.5A(2) 36V 2. Typical current limitation value General features - Inrush current management by active power limitation on the high-side switches - Very low standby current - Very low electromagnetic susceptibility - In compliance with the 2002/95/EC European directive Protection - High-side drivers undervoltage shutdown - Overvoltage clamp - Output current limitation - High and low-side overtemperature shutdown - Short circuit protection - ESD protection ) (s ct u d o r P e t e l o Diagnostic functions - Proportional load current sense - Thermal shutdown indication on both the high and low-side switches s b OApplications u d o Description r P e The VN5770AK-E is a device formed by three monolithic chips housed in a standard SO-28 package: a double high-side and two low-side switches. The double high-side is made using STMicroelectronics(R) VIPower(R) M0-5 Technology, while the low-side switches are fully protected VIPower M0-3 OMNIFET II. This device is suitable to drive a DC motor in a bridge configuration as well as to be used as a quad switch for any low voltage application. t e l o s b O The dual high-side switches integrate built-in nonlatching thermal shutdown with thermal hysteresis. An output current limiter protects the device in overload condition. In case of long overload duration, the device limits the dissipated power to a safe level up to thermal shut-down intervention. An analog current sense pin delivers a current proportional to the load current (according to a known ratio) and indicates overtemperature shutdown of the relevant highside switch through a voltage flag. The low-side switches have built-in non-latching thermal shutdown with thermal hysteresis, linear current limitation and overvoltage clamping. DC motor driving in full or half bridge configuration All types of resistive, inductive and capacitive loads February 2012 ) s ( ct SO-28 1. Total resistance of one side in bridge configuration Fault feedback for overtemperature shutdown of the low-side switch is indicated by the relevant input pin current consumption going up to the fault sink current flag. Doc ID 13228 Rev 6 1/34 www.st.com 1 Contents VN5770AK-E Contents 1 Block diagram and pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4 Electrical characteristics for dual high-side switch . . . . . . . . . . . . . . . . . . . 9 3.2 Electrical characteristics curves for dual high-side switch . . . . . . . . . . . . 13 3.3 Electrical characteristics for low-side switches . . . . . . . . . . . . . . . . . . . . . 15 3.4 Electrical characteristics for low-side switches . . . . . . . . . . . . . . . . . . . . . 17 u d o r P e Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5 t e l o Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . . 23 s b O Package and thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5.1 6 ) (s SO-28 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 t c u Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 6.1 ECOPACK(R) 6.2 SO-28 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 d o r . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 P e 6.3 SO-28 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 t e l o 7 s b O 2/34 ) s ( ct 3.1 4.1 8 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Doc ID 13228 Rev 6 VN5770AK-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Dual high-side switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Low-side switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Switching (VCC = 13V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Current sense (8V<VCC<16V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 On . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Dynamic (Tj = 25C, unless otherwise specified) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Switching (Tj = 25C, unless otherwise specified) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Source drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Protection and diagnostics (-40C < Tj < 150C, unless otherwise specified) . . . . . . . . . . 16 Thermal calculations in clockwise and anti-clockwise operation in steady-state mode . . . 25 Thermal resistances definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Single pulse thermal impedance definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Thermal calculations in transient mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 SO-28 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O Doc ID 13228 Rev 6 3/34 List of figures VN5770AK-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Figure 41. Figure 42. Figure 43. Figure 44. Figure 45. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Static drain source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Input voltage vs input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Source-drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Static drain-source on resistance vs ID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Static drain-source on resistance vs input voltage (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . 18 Static drain-source on resistance vs input voltage (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . 18 Normalized input threshold voltage vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Normalized on resistance vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Current limit vs junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Typical application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Recommended motor operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Maximum turn off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 SO-28 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Chipset configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Auto and mutual Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . 24 SO-28 HSD thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . 26 SO-28 LSD thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . 26 Thermal fitting model of an H-Bridge in SO-28 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 SO-28 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 SO-28 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Tape and reel shipment (suffix "TR") . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 4/34 Doc ID 13228 Rev 6 VN5770AK-E 1 Block diagram and pin descriptions Block diagram and pin descriptions Figure 1. Block diagram 6CC 6CC CLAMP 5NDERVOLTAGE '.$ #LAMP ).054 3/52#% $RIVER #LAMP ).054 #URRENT LIMITER ,OGIC ) s ( ct $RIVER 3/52#% 6DS LIMITER #URRENT LIMITER /VERTEMP u d o 0OWER LIMITATION 6$3 LIMITER /VERTEMP r P e 0OWER LIMITATION )$3 + #3%.3% )- s ( t c u d o s b O /VER 4EMPERATURE Pr $2!). 3/52#% ,INEAR #URRENT ,IMITER /VERVOLTAGE #LAMP $2!). 'ATE #ONTROL ).054 so b O /VERVOLTAGE #LAMP 'ATE #ONTROL ).054 e t e l t e l o )$3 + 3/52#% /VER 4EMPERATURE ,INEAR #URRENT ,IMITER ("1($'5 Table 1. Pin descriptions No Name Function 1, 3, 25, 28 DRAIN 3 Drain of Switch 3 (low-side switch) 2 INPUT 3 Input of Switch 3 (low-side switch) N.C. Not Connected 4, 11 Doc ID 13228 Rev 6 5/34 Block diagram and pin descriptions Table 1. VN5770AK-E Pin descriptions (continued) No Name Function 5, 10, 19, 24 VCC Drain of Switches 1 and 2 (high-side switches) and Power Supply Voltage 6 GND Ground of Switches 1 and 2 (high-side switches) 7 INPUT 1 Input of Switch 1 (high-side switches) 8 INPUT 2 Input of Switch 2 (high-side switch) 9 CURRENT SENSE Analog current sense pin, it delivers a current proportional to the load current 12, 14, 15, 18 DRAIN 4 13 Drain of switch 4 (low-side switch) INPUT 4 Input of Switch 4 (low-side switch) 16, 17 SOURCE 4 Source of Switch 4 (low-side switch) 20, 21 SOURCE 2 Source of Switch 2 (high-side switch) 22, 23 SOURCE 1 Source of Switch 1 (high-side switch) 26, 27 SOURCE 3 Source of Switch 3 (low-side switch) Figure 2. u d o r P e t e l o Configuration diagram (top view) ) (s ) s ( ct s b O t c u d o r P e t e l o s b O Table 2. Symbol 6/34 Thermal data Parameter Max value Unit Rthj-case Thermal resistance junction-lead (high-side switch) 10 C/W Rthj-case Thermal resistance junction-lead (low-side switch) 7 C/W Rthj-amb Thermal resistance junction-ambient See Figure 39 C/W Doc ID 13228 Rev 6 VN5770AK-E 2 Absolute maximum ratings Absolute maximum ratings Stressing the device above the rating listed in Table 3 and Table 4 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to the conditions in Section 2.1: Absolute maximum ratings for extended periods may affect device reliability. 2.1 Absolute maximum ratings Table 3. Symbol Parameter VCC DC supply voltage -VCC Reverse DC supply voltage -IGND DC reverse ground pin current IOUT DC output current -IOUT Reverse DC output current IIN ICSD ) s ( ct Dual high-side switch Value O V 0.3 V P e 200 mA Internally limited A t e l o -12 A bs DC input current -1 to 10 mA DC current sense disable input current -1 to 10 mA O ) VCC-41 +VCC V V s ( t c Maximum switching energy (single pulse) (L = 3.7mH; RL = 0; Vbat = 13.5V; Tjstart = 150C; IOUT = IlimL(Typ.)) 32 mJ u d o r P e VESD Electrostatic Discharge (Human Body Model: R = 1.5K; C = 100pF) - INPUT - CURRENT SENSE - OUTPUT - VCC 4000 2000 5000 5000 VESD Charge device model (CDM-AEC-Q100-011) 750 V Junction operating temperature -40 to 150 C Storage temperature -55 to 150 C let o s b 41 ro VCSENSE Current sense maximum voltage EMAX du Unit Tj Tstg Doc ID 13228 Rev 6 V V V V 7/34 Absolute maximum ratings Table 4. VN5770AK-E Low-side switch Symbol Parameter Unit VDSn Drain-source voltage (VINn = 0V) Internally clamped V VINn Input voltage Internally clamped V IINn Input current +/-20 mA 220 Internally limited A -12 A V RIN MINn Minimum input series impedance IDn Drain current IRn Reverse DC output current VESD1 Electrostatic discharge (R = 1.5K, C = 100pF) 4000 VESD2 Electrostatic discharge on output pins only (R = 330, C = 150pF) 16500 Ptot 4 Operating junction temperature Tc Case operating temperature e t e ol Storage temperature ) (s s b O t c u d o r P e t e l o s b O Doc ID 13228 Rev 6 ) s ( ct du Total dissipation at Tc = 25C Tj Tstg 8/34 Value V W Internally limited C Internally limited C -55 to 150 C o r P VN5770AK-E Electrical characteristics 3 Electrical characteristics 3.1 Electrical characteristics for dual high-side switch Values specified in this section are for 8V < VCC < 36V; -40C < Tj < 150C, unless otherwise specified (for each channel). Table 5. Power section Symbol Parameter Test conditions VCC Operating supply voltage VUSD Undervoltage shutdown VUSDhyst Undervoltage shutdown hysteresis Min. Typ. Max. Unit 4.5 13 36 V 4.5 V du 0.5 ro IOUT = 3A; Tj = 25C m 320 m 210 m 46 52 V Off State; VCC = 13V; Tj = 25C; VIN = VOUT = VSENSE = 0V 2(1) 5(1) A On State; VCC = 13V; VIN = 5V; IOUT = 0A 3 6 mA P e let IOUT = 3A; VCC = 5V; Tj = 25C Clamp voltage Vclamp IS e t e ol o s b 41 O ) s ( t c Off state output current(2) IL(off) VF IS = 20 mA Supply current du o r P Output - VCC diode voltage(2) V 160 IOUT = 3A; Tj = 150C On state resistance RON ) s ( ct 3.5 VIN = VOUT = 0V; VCC = 13V; Tj = 25C 0 3 A VIN = VOUT = 0V; VCC = 13V; Tj = 125C 0 5 A 0.7 V -IOUT = 3A; Tj = 150C 1. PowerMOS leakage included 2. For each channel s b O Table 6. Symbol Switching (VCC = 13V) Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time RL = 4.3 (see Figure 3) -- 15 -- s td(off) Turn-off delay time RL = 4.3 (see Figure 3) -- 10 -- s (dVOUT/dt)on Turn-on voltage slope RL = 4.3 -- See Figure 15 -- V/s (dVOUT/dt)off Turn-off voltage slope RL = 4.3 -- See Figure 17 -- V/s WON Switching energy losses during twon RL=4.3 (see Figure 3) -- 0.16 -- mJ WOFF Switching energy losses during twoff RL = 4.3 (see Figure 3) -- 0.08 -- mJ Doc ID 13228 Rev 6 9/34 Electrical characteristics Table 7. Logic input Symbol Parameter Input low level voltage IIL Low level input current VIH Input high level voltage IIH High level input current VI(hyst) Input hysteresis voltage Table 8. 0.25 7 -0.7 TTSD Shutdown temperature TR Reset temperature TRS Thermal reset of STATUS 5V<VCC<36V so s ( t c u d o e t e l VCC = 13V; TR<Tj<TTSD )- Thermal hysteresis (TTSD-TR) b O Turn-off output voltage clamp IOUT = 1A; VIN = 0; L = 20mH Output voltage drop limitation IOUT = 0.03A; Tj = -40C to 150C (see Figure 4) r P e o r P Typ. 8.5 V Max. Unit 12 A 12 A 3.5 150 175 A 200 TRS + 1 TRS + 5 135 C C C 7 C VCC-41 VCC-46 VCC-52 V 25 mV 1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles Doc ID 13228 Rev 6 V ) s ( ct du Min. 6 A V 5.5 VCC = 13V Short circuit current during thermal cycling t e l o 10 Test conditions V V VIN = 2.1V Parameter Unit 2.1 Protection and diagnostics(1) IlimL VON Max. A IIN = -1mA DC Short circuit current VDEMAG Typ. 1 VIN = 0.9V IIN = 1mA IlimH THYST Min. 0.9 Input clamp voltage Symbol 10/34 Test conditions VIL VICL s b O VN5770AK-E VN5770AK-E Electrical characteristics Table 9. Current sense (8V<VCC<16V) Symbol Parameter Min. Typ. Max. IOUT/ISENSE IOUT = 0.08 A; VSENSE = 0.5 V; Tj = -40C to 150C K1 IOUT/ISENSE IOUT = 0.35 A; VSENSE = 0.5V; Tj = -40C to 150C Tj = 25C to 150C K2 IOUT/ISENSE IOUT = 3A; VSENSE = 4V; Tj = -40C to 150C 1200 1270 1350 K3 IOUT/ISENSE IOUT = 4A; VSENSE = 4V; Tj = -40C to 150C 1200 1270 1350 K0 ISENSE0 Analog sense current Unit 1266 1900 3100 840 980 IOUT = 0A; VSENSE = 0V; VIN = 0V; Tj = -40C to 150C IOUT = 0A; VSENSE = 0V; VIN = 5V; Tj = -40C to 150C 1360 2000 1360 1740 ) s ( ct 0 u d o r P e 0 1 A 2 A VSENSE Max analog sense output voltage VSENSEH Analog sense output voltage in overtemperature VCC = 13V; RSENSE = 3.9K condition 9 V ISENSEH Analog sense output current in overtemperature VCC = 13V condition 8 mA tDSENSE2H e t e ol ) (s Figure 3. IOUT = 5A; RSENSE = 3.9K t e l o s b O 5 V Delay response time from rising edge of INPUT pin VSENSE<4V; 0.35A<Iout<5A; ISENSE = 90% of ISENSE max (see Figure 5) 70 300 s Delay response time from falling edge of INPUT pin VSENSE<4V; 0.35A<Iout<5A; ISENSE = 10% of ISENSE max (see Figure 5) 100 250 s ct u d o Pr tDSENSE2L s b O Test conditions Switching time waveforms 6/54N D6/54DTOFF D6/54DTON T 6).N TDON TDOFF T ("1($'5 Doc ID 13228 Rev 6 11/34 Electrical characteristics Figure 4. VN5770AK-E Output voltage drop limitation 6CC 6OU T 4JO# 4JO# 4J O# 6ON )OUT 6ON2ON4 ("1($'5 Table 10. Conditions Input Output Normal operation L H L H Overtemperature L H L L Undervoltage L H Short circuit to GND L H Short circuit to VCC t c u P e let o s b O d o r e t e ol Sense du o r P 0 Nominal 0 VSENSEH L L 0 0 L L 0 0 L H H H 0 < Nominal L L 0 ) (s Negative output voltage clamp Figure 5. ) s ( ct Truth table s b O Current sense delay characteristics ,1387 /2$'&855(17 6(16(&855(17 W'6(16(+ W'6(16(/ *$3*&)7 12/34 Doc ID 13228 Rev 6 VN5770AK-E 3.2 Electrical characteristics Electrical characteristics curves for dual high-side switch Figure 6. Off-state output current Figure 7. )LOFF U! High level input current )IH U! 6IN6 /FF 3TATE 6CC6 6IN6OUT 6 ) s ( ct 4C # ("1($'5 Figure 8. Input clamp voltage Figure 9. Pr 4C # ("1($'5 6IL 6 LI NM! )- s b O s ( t c u d o Pr e t e l O Input low level e t e ol 6ICL 6 o s b u d o 4C # 4C # Figure 11. ("1($'5 ("1($'5 Figure 10. Input high level Input hysteresis voltage 6IHYST 6 6IH 6 4C # ("1($'5 Doc ID 13228 Rev 6 4C # ("1($'5 13/34 Electrical characteristics VN5770AK-E Figure 12. On-state resistance vs Tcase Figure 13. On-state resistance vs VCC 2ON M/HM 2ON M/HM )OUT ! 6CC6 )OUT ! 4C # 4C # 4C # 4C # ) s ( ct 4C # u d o ("1($'5 Figure 15. Turn-on voltage slope r P e 6USD 6 D6OUTDT ON 6MS t e l o bs O ) du e t e l o r P 6CC6 2)/HM s ( t c 4C # ("1($'5 4C # ("1($'5 Figure 16. ILIMH vs Tcase Figure 17. Turn-off voltage slope )LIMH ! D6OUTDT OFF 6MS 6CC6 6CC6 2)/HM 4C # 14/34 6CC 6 b O ("1($'5 Figure 14. Undervoltage shutdown so ("1($'5 Doc ID 13228 Rev 6 4C # ("1($'5 VN5770AK-E 3.3 Electrical characteristics Electrical characteristics for low-side switches Values specified in this section are for -40C < Tj < 150C, unless otherwise specified Table 11. Off Symbol Parameter Test conditions Min Typ Max Unit 40 45 55 V VCLAMP Drain-source clamp voltage VIN=0V; ID = 1.5A VCLTH Drain-source clamp threshold voltage VIN = 0V; ID = 2mA 36 VINTH Input threshold voltage VDS = VIN; ID = 1mA 0.5 Supply current from input pin VDS=0V; VIN = 5V IISS VINCL Input-source clamp voltage IDSS Zero input voltage drain current (VIN = 0V) Table 12. Symbol RDS(on) Table 13. Symbol gfs ete COSS b O l o s Symbol td(on) tr td(off) tf td(on) tr td(off) tf IIN = -1mA -1.0 t e l o bs Test conditions O ) s ( t c ct du V (s) 150 6.8 ro P e VDS = 25V; VIN = 0V Static drain-source on VIN = 5V; ID = 3A; Tj = 25C resistance VIN = 5V; ID = 3A A 8 V -0.3 V 30 A 75 A Min Typ Max Unit -- -- 120 m -- -- 240 m Min Typ Max Unit Dynamic (Tj = 25C, unless otherwise specified) du Parameter o r P Table 14. 6 VDS = 13V; VIN = 0V; Tj = 25C Parameter 2.5 100 IIN = 1mA On V Test conditions Forward transconductance VDD = 13V; ID = 1.5A -- 2.5 -- S Output capacitance VDS = 13V; f = 1MHz; VIN = 0V -- 150 -- pF Min Typ Max Unit -- 200 400 ns -- 1.2 2.5 s -- 600 1350 ns Fall time -- 400 1000 ns Turn-on delay time -- 0.80 2.5 s -- 3.7 7.5 s -- 2.6 7.5 s -- 2.3 7.0 s Switching (Tj = 25C, unless otherwise specified) Parameter Test conditions Turn-on delay time Rise time Turn-off delay time Rise time Turn-off delay time VDD = 15V; ID = 3A; Vgen = 5V; Rgen = RIN MINn = 220 VDD = 15V; ID = 3A; Vgen = 5V; Rgen = 2.2K Fall time Doc ID 13228 Rev 6 15/34 Electrical characteristics Table 14. Symbol VN5770AK-E Switching (Tj = 25C, unless otherwise specified) (continued) Parameter Test conditions (dI/dt)on Turn-on current slope Qi Total input charge Table 15. Min Typ VDD = 15V; ID = 3A; Vgen = 5V; Rgen = RIN MINn = 220 -- 3.0 A/s VDD = 12V; ID = 3A; VIN = 5V; Igen = 2.13mA -- 9.0 nC Min Typ Max Unit -- 0.8 -- V -- 400 -- ns -- 200 -- nC -- 1.0 -- A Parameter Test conditions Forward on voltage ISD=1.5A; VIN=0V Reverse recovery time trr Qrr Reverse recovery charge IRRM Reverse recovery current ISD=1.5A; dI/dt=12A/ms; VDD=30V; L=200H t e l o bs Parameter Test conditions Min Typ 6 8.5 Ilim Drain current limit tdlim Step response current limit VIN = 5V; VDS=13V Tjsh Overtemperature shutdown Tjrs Overtemperature reset Igf Fault sink current VIN = 5V; VDS = 13V; Tj = Tjsh 10 Single pulse avalanche energy Starting Tj = 25C; VDD = 24V; VIN = 5V; Rgen = RIN MINn = 220; L = 24mH 100 e t e ol VIN=5V; VDS=13V O ) s ( t c du o r P Max Unit 12 150 175 Doc ID 13228 Rev 6 A s 10 200 135 s b O 16/34 u d o Protection and diagnostics (-40C < Tj < 150C, unless otherwise specified) Symbol Eas ) s ( ct r P e 1. Pulsed: pulse duration = 300s, duty cycle 1.5% Table 16. Unit Source drain diode Symbol VSD(1) Max C C 15 20 mA mJ VN5770AK-E 3.4 Electrical characteristics Electrical characteristics for low-side switches Figure 18. Static drain source on resistance Figure 19. Derating curve 2DSON MOHMS 4J # 6IN6 4J# ) s ( ct 4J# u d o Pr ("1($'5 )D! Figure 20. Transconductance ("1($'5 Figure 21. Transfer characteristics e t e ol )DON ! 'FS 3 bs 6DS6 4J # -O 4J# 4J# (s) t c u e t e ol Pr 4J# 4J # od 6DS6 4J# ("1($'5 )D ! 6IN 6 ("1($'5 Figure 22. Input voltage vs input charge Figure 23. Capacitance variations O bs 6IN 6 #P& 6DS6 )D! F-(Z 6IN6 1G N# ("1($'5 Doc ID 13228 Rev 6 6DS6 ("1($'5 17/34 Electrical characteristics VN5770AK-E Figure 24. Output characteristics Figure 25. Step response current limit )D ! 4DLIMUSEC 6IN6 6IN6 6IN6 2GOHM 6IN6 6DS 6 Figure 26. Source-drain diode forward characteristics t e l o 6IN6 ("1($'5 6IN6 4J# s b O ) (s ct du o r P e t e ol 4J# 4J # )D ! 2DSON MOHMS )D! 4J# 4J# )D! )D! 4J# ("1($'5 Figure 29. Static drain-source on resistance vs input voltage (part 2) 2DSON MOHMS )D ! ("1($'5 Figure 28. Static drain-source on resistance vs input voltage (part 1) 4J # )D! )D! )D! )D! 4J# 4J # 6IN6 18/34 r P e ) s ( ct u d o 2DSON MOHMS Figure 27. Static drain-source on resistance vs ID 6DD6 6SD M6 s b O ("1($'5 ("1($'5 Doc ID 13228 Rev 6 6IN6 ("1($'5 VN5770AK-E Electrical characteristics Figure 30. Normalized input threshold voltage vs temperature Figure 31. Normalized on resistance vs temperature 2ON M/HM 6INTH 6 6DS6IN )DM! )OUT ! 6CC6 ) s ( ct 4C # Figure 32. Current limit vs junction temperature u d o ("1($'5 r P e )LIM ! t e l o 6CC6 6IN6 4C # ("1($'5 ) (s s b O t c u d o r P e 4C # ("1($'5 t e l o s b O Doc ID 13228 Rev 6 19/34 Application information 4 VN5770AK-E Application information Figure 33. Typical application schematic $ 6BATT 6 6CC # : 6Z 6 6 )NPUT 3OURCE )NPUT 3OURCE -ICRO #ONTROL 3OURCE e t e ol $RAIN )NPUT #ONTROL )- s b O -OTOR INDUCUCTANCE ENERGY RECIRCULATION )- 3OURCE ("1($'5 Mostly motor bridge drivers use a reverse battery protection diode (D) inside supply rail. This diode prevents a reverse current flow back to Vbatt in case the bridge gets disabled via the logic inputs while motor inductance still carries energy. In order to prevent a hazardous overvoltage at circuit supply terminal (Vcc), a blocking capacitor (C) is needed to limit the voltage overshoot. As basic orientation, 50F per 1A load current in recommended. In alternative, also a Zener protection (Z) is suitable. Even if a reverse polarity diode is not present, it is recommended to use a capacitor or zener at Vcc because a similar problem appears in case supply terminal of the module has intermittent electrical contact to the battery or gets disconnected while motor is operating. u d o r P e t e l o 20/34 Pr '.$ s ( t c s b O u d o $RAIN )NPUT Note: ) s ( ct #ONTROL #URRENT 3ENSE Doc ID 13228 Rev 6 VN5770AK-E Application information #L OC KW ISE OP !C ER TIV AT E IO N M OT OR ST OP #O OP UNT ER ER AT CL IO OC N KW I SE 0A SS IVE M OT OR ST OP OT OR S M IVE 0A SS #L OC KW ISE OP ER A TO P TIO N Figure 34. Recommended motor operation )NPUT )NPUT )NPUT )NPUT 6Z &LYBACK CLAMPED BY :ENER DIODE : ) s ( ct &LYBACK ENERGY CHARGED &LYBACK SPIKE DURING CROSS INTO CAPACITOR # CURRENT PROTECTION TIME u d o 6CC e t e ol )- )- )- s b O Pr T T $EAD TIME TO AVOID CROSS CONDUCTION ("1($'5 s ( t c u d o r P e t e l o s b O Doc ID 13228 Rev 6 21/34 Application information VN5770AK-E Figure 35. Waveforms NORMAL OPERATION INPUT CS_DIS LOAD CURRENT SENSE CURRENT UNDERVOLTAGE VUSDhyst VCC ) s ( ct VUSD INPUT CS_DIS u d o LOAD CURRENT SENSE CURRENT r P e t e l o SHORT TO VCC INPUT CS_DIS LOAD VOLTAGE LOAD CURRENT )- SENSE CURRENT <Nominal s ( t c Tj ol ete bs O Pr u d o s b O <Nominal OVERLOAD OPERATION TR TTSD TRS INPUT CS_DIS ILIMH ILIML LOAD CURRENT VSENSEH SENSE CURRENT thermal cycling current power limitation limitation SHORTED LOAD 22/34 Doc ID 13228 Rev 6 NORMAL LOAD VN5770AK-E 4.1 Application information Maximum demagnetization energy (VCC = 13.5V) Figure 36. Maximum turn off current versus load inductance ILMAX (A) 100 10 A B C u d o 1 A = Single Pulse at TJstart=150C B= Repetitive pulse at TJstart=100C C= Repetitive Pulse at TJstart=125C r P e t e l o 0.1 0.01 0.1 ) s ( ct 1 10 100 L (mH) ) (s VIN, IL s b O Demagnetization Demagnetization Demagnetization t c u d o r P e Note: t e l o bs O t Values are generated with RL=0 In case of repetitive pulses, Tjstart (at the beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. Doc ID 13228 Rev 6 23/34 Package and thermal data VN5770AK-E 5 Package and thermal data 5.1 SO-28 thermal data Figure 37. SO-28 PC board ) s ( ct u d o Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm, Cu thickness=35mm, Copper areas: from minimum pad layout to 16cm2). r P e t e l o Figure 38. Chipset configuration RthAB LOW SIDE CHIP bs HIGH SIDE CHIP channels 1,2 O ) channel 3 t(s RthB uc d o r RthAC LOW SIDE CHIP channel 4 RthA RthC RthBC Figure 39. Auto and mutual Rthj-amb vs PCB copper area in open box free air condition(a) let P e o s b O Rth (C/W) RthA RthB = RthC RthAB = RthAC RthBC 60 50 40 30 20 10 0 0 1 2 3 4 5 Cu Area (refer to PCB layout) 24/34 Doc ID 13228 Rev 6 6 7 VN5770AK-E Package and thermal data Table 17. Thermal calculations in clockwise and anti-clockwise operation in steady-state mode HS1 HS2 LS3 LS4 ON OFF OFF ON PdHS1 x RthHS + PdLS4 x PdHS1 x RthHSLS + PdHS1 x RthHSLS + RthHSLS + Tamb PdLS4 x RthLSLS + Tamb PdLS4 x RthLS + Tamb OFF ON ON OFF PdHS2 x RthHS + PdLS3 x PdHS2 x RthHSLS + RthHSLS + Tamb PdLS3 x RthLS + Tamb Table 18. TjHS12 TjLS3 TjLS4 PdHS2 x RthHSLS + PdLS3 x RthLSLS + Tamb Thermal resistances definitions(1) RthHS = RthHS1 = RthHS2 High-side chip thermal resistance junction to ambient (HS1 or HS2 in ON state) RthLS = RthLS3 = RthLS4 Low-side chip thermal resistance junction to ambient RthHSLS = RthHS1LS4 = RthHS2LS3 Mutual thermal resistance junction to ambient between high-side and low-side chips RthLSLS = RthLS3LS4 Mutual thermal resistance junction to ambient between low-side chips ) s ( ct u d o r P e t e l o 1. values dependent on PCB heatsink area Table 19. Single pulse thermal impedance definitions(1) ZthHS s b O High-side chip thermal impedance junction to ambient )- ZthLS = ZthLS3 = ZthLS4 Low-side chip thermal impedance junction to ambient t(s ZthHSLS = ZthHS12LS3 = ZthHS12LS4 Mutual thermal impedance junction to ambient between high-side and low-side chips ZthLSLS = ZthLS3LS4 Mutual thermal impedance junction to ambient between low-side chips c u d o r P 1. values dependent on PCB heatsink area e t e l Table 20. O o s b Thermal calculations in transient mode(1) TjHS12 ZthHS x PdHS12 + ZthHSLS x (PdLS3 + PdLS4) + Tamb TjLS3 ZthHSLS x PdHS12 + ZthLS x PdLS3 + ZthLSLS x PdLS4 + Tamb TjLS4 ZthHSLS x PdHS12 + ZthLSLS x PdLS3 + ZthLS x PdLS4 + Tamb 1. Calculation is valid in any dynamic operating condition. Pd values set by user. a. See Figure 38. For more detailed information see Table 17 and Table 18. Doc ID 13228 Rev 6 25/34 Package and thermal data VN5770AK-E Figure 40. SO-28 HSD thermal impedance junction ambient single pulse ZTH (C/W) Footprint 100 1 cm2 2 cm2 6 cm2 Footprint 1 cm2 10 2 cm2 HSD 6 cm2 ) s ( ct HsLsD 1 u d o 0.1 0.001 let 10 1 0.1 0.01 time (sec) r P e o s b 100 1000 Figure 41. SO-28 LSD thermal impedance junction ambient single pulse O ) ZTH (C/W) 10 e t e l Footprint s ( t c 100 u d o Pr 1 cm2 2 cm2 6 cm2 Footprint 1 cm2 LSD 2 cm2 6 cm2 LsLsD o s b O 0.1 0.001 0.01 0.1 1 time (sec) 26/34 Doc ID 13228 Rev 6 10 100 1000 VN5770AK-E Package and thermal data Equation 1: pulse calculation formula Z TH = R TH + Z THtp ( 1 - ) where = tp T Figure 42. Thermal fitting model of an H-Bridge in SO-28 ) s ( ct u d o r P e t e l o Table 21. ) (s Thermal parameters(1) od Area/island (cm2) Pr Footprint R1 (C/W) 1 R2 (C/W) 1.8 R3 (C/W) 3.5 R4 (C/W) 13.5 R5 (C/W) 10.5 R6 (C/W) 62.28 R7 (C/W) 1 R8 (C/W) 1.8 R9 (C/W) 0.24 R10 (C/W) 1.2 R11 (C/W) 3.5 R12 (C/W) 15.2 R13 (C/W) 10.5 R14 (C/W) 62.28 e t e ol s b O t c u s b O 1 2 6 52.28 44.28 32.28 52.28 44.28 32.28 Doc ID 13228 Rev 6 27/34 Package and thermal data VN5770AK-E Thermal parameters(1) (continued) Table 21. Area/island (cm2) Footprint R15 (C/W) 0.24 R16 (C/W) 1.2 R17 (C/W) 3.5 R18 (C/W) 15.5 R19 (C/W) 10.5 R20 (C/W) 62.28 R21 (C/W) 150 R22 (C/W) 150 R23 (C/W) 150 R24 (C/W) 150 C1 (W*s/C) 0.0008 C2 (W*s/C) 0.001 C3 (W*s/C) 0.008 C5 (W*s/C) 0.2 C6 (W*s/C) 1.6 C7 (W*s/C) 0.0008 C8 (W*s/C) 0.001 du C11 (W*s/C) ro C13 (W*s/C) o s b O 6 52.28 44.28 32.28 44.28 ) s ( ct 52.28 e t e ol bs 32.28 o r P 1.61 1.7 3.25 1.61 1.7 3.25 1.61 1.7 3.25 O ) 0.0005 0.008 0.2 C14 (W*s/C) 1.6 C15 (W*s/C) 0.00015 C16 (W*s/C) 0.0005 C17 (W*s/C) 0.008 C19 (W*s/C) 0.2 C20 (W*s/C) 1.6 1. A blank space means that the value is the same as the previous one 28/34 du 0.00015 C10 (W*s/C) let 2 s ( t c C9 (W*s/C) P e 1 Doc ID 13228 Rev 6 VN5770AK-E Package and packing information 6 Package and packing information 6.1 ECOPACK(R) In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. 6.2 SO-28 package information Table 22. millimeters u d o Symbol Min Typ A a1 0.10 b 0.35 b1 0.23 C )- c1 D s ( t c E ro e3 P e ete ol s b O Pr Max 2.65 0.30 0.49 0.32 0.50 45 (typ.) 17.7 18.1 10.00 10.65 du e t e l o ) s ( ct SO-28 mechanical data 1.27 16.51 F 7.40 7.60 L 0.40 1.27 S 8 (max.) s b O Doc ID 13228 Rev 6 29/34 Package and packing information VN5770AK-E Figure 43. SO-28 package dimensions ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 30/34 Doc ID 13228 Rev 6 VN5770AK-E 6.3 Package and packing information SO-28 packing information Figure 44. SO-28 tube shipment (no suffix) C B A Base Q.ty 28 Bulk Q.ty 700 Tube length ( 0.5) 532 A 3.5 B 13.8 C ( 0.1) 0.6 ) s ( ct All dimensions are in mm. Figure 45. Tape and reel shipment (suffix "TR") u d o Reel dimensions r P e t e l o ) (s s b O t c u Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 1000 1000 330 1.5 13 20.2 16.4 60 22.4 Tape dimensions According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 d o r P e Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing s b O t e l o W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) 16 4 12 1.5 1.5 7.5 6.5 2 End All dimensions are in mm. Start Top cover tape No components Components 500mm min No components 500mm min Empty components pockets sealed with cover tape. User direction of feed Doc ID 13228 Rev 6 31/34 Order codes VN5770AK-E 7 Order codes Table 23. Device summary Order codes Package SO-28 Tube Tape and reel VN5770AK-E VN5770AKTR-E ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 32/34 Doc ID 13228 Rev 6 VN5770AK-E 8 Revision history Revision history Table 24. Document revision history Date Revision Changes June-2006 1 Initial release. 2 Reformatted. Table 5: Power section updated. Table 6: Switching (VCC = 13V) updated. Table 9: Current sense (8V<VCC<16V) updated. Table 12: On updated. Table 14: Switching (Tj = 25C, unless otherwise specified) updated. Characteristic curves for high-side and low-side switches added. Figure 38: Chipset configuration updated. Figure 39: Auto and mutual Rthj-amb vs PCB copper area in open box free air condition added. Figure 40: SO-28 HSD thermal impedance junction ambient single pulse, Figure 41: SO-28 LSD thermal impedance junction ambient single pulse and Figure 42: Thermal fitting model of an H-Bridge in SO-28 added. Figure 21: Thermal parameters added. High-side and low-side characteristic curves added. Figure 35: Waveforms added. Section 4.1: Maximum demagnetization energy (VCC = 13.5V) added. Figure 33: Typical application schematic added. ) s ( ct 15-Feb-2007 u d o r P e t e l o 02-Jul-2007 t c u 24-Jul-2007 3 r P e od 04-Jan-2012 let 12-Feb-2012 o s b ) (s s b O Table 9: Current sense (8V<VCC<16V) updated 4 Table 9: Current sense (8V<VCC<16V) - K0, K1 and K3 values modified 5 Table 9: Current sense (8V<VCC<16V) - K0 values modified 6 Update Figure 2: Configuration diagram (top view) and Figure 33: Typical application schematic O Doc ID 13228 Rev 6 33/34 VN5770AK-E ) s ( ct Please Read Carefully: u d o Information in this document is provided solely in connection with ST products. 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(c) 2012 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 34/34 Doc ID 13228 Rev 6