CCD image sensors
S11071/S10420-01 series
Improved etaloning characteristics,
High-speed type and low noise type available
www.hamamatsu.com 1
The S11071/S10420-01 series are back-thinned CCD image sensors designed for spectrometers. Two types consisting of
a high-speed type (S11071 series) and low noise type (S10420-01 series) are available with improved etaloning charac-
teristics. The S11071/S10420-01 series offer nearly at spectral response characteristics with high quantum ef ciency
from the UV to near infrared region.
Improved etaloning characteristics
High sensitivity over a wide spectral range and nearly
at spectral response characteristics
High full well capacity and wide dynamic range
(with anti-blooming function)
High CCD node sensitivity: 8 μV/e- (S11071 series)
6.5 μV/e- (S10420-01 series)
Pixel size: 14 × 14 μm
Selection guide
Type no. Number of
total pixels
Number of effective
pixels
Image size
[mm (H) × mm (V)]
Readout speed
max.
(MHz)
Suitable
driver circuit
S11071-1004 1044 × 22 1024 × 16 14.336 × 0.224
10 C11288
S11071-1006 1044 × 70 1024 × 64 14.336 × 0.896
S11071-1104 2068 × 22 2048 × 16 28.672 × 0.224
S11071-1106 2068 × 70 2048 × 64 28.672 × 0.896
S10420-1004-01 1044 × 22 1024 × 16 14.336 × 0.224
0.5 C11287
S10420-1006-01 1044 × 70 1024 × 64 14.336 × 0.896
S10420-1104-01 2068 × 22 2048 × 16 28.672 × 0.224
S10420-1106-01 2068 × 70 2048 × 64 28.672 × 0.896
Improved etaloning characteristics
Etaloning is an interference phenomenon that occurs when the light
incident on a CCD repeatedly re ects between the front and back
surfaces of the CCD while being attenuated, and causes alternately
high and low sensitivity. When long-wavelength light enters a back-
thinned CCD, etaloning occurs due to the relationship between the
silicon substrate thickness and the absorption length. The S11071/
S10420-01 series back-thinned CCDs have achieved a signi cant im-
provement in etaloning by using a unique structure that is unlikely
to cause interference.
Etaloning characteristics (typical example)
Wavelength (nm)
Relative sensitivity (%)
900 1000950 960 970 980 990930910 940920
(Ta=25 °C)
Etaloning-improved type
Previous type
0
40
30
20
10
50
60
70
80
90
100
110
KMPDB0284EB
Spectrometers, etc.
Features Applications
CCD image sensors S11071/S10420-01 series
2
Structure
Absolute maximum ratings (Ta=25 °C)
Operating conditions (MPP mode, Ta=25 °C)
Parameter S11071 series S10420-01 series
Pixel size (H × V) 14 × 14 μm
Vertical clock phase 2-phase
Horizontal clock phase 4-phase
Output circuit Two-stage MOSFET source follower One-stage MOSFET source follower
Package 24-pin ceramic DIP (refer to dimensional outline)
Window material*1Quartz glass*2
Cooling Non-cooled
*1: Temporary window type (ex: S11071-1106N, S10420-1106N-01) is available upon request.
*2: Resin sealing
Parameter Symbol Min. Typ. Max. Unit
Operating temperature*3Topr -50 - +50 °C
Storage temperature Tstg -50 - +70 °C
Output transistor
drain voltage
S11071 series VOD -0.5 - +25 V
S10420-01 series -0.5 - +30
Reset drain voltage VRD -0.5 - +18 V
Output ampli er return voltage Vret -0.5 - +18 V
Over ow drain voltage VOFD -0.5 - +18 V
Vertical input source voltage VISV -0.5 - +18 V
Horizontal input source voltage VISH -0.5 - +18 V
Over ow gate voltage VOFG -10 - +15 V
Vertical input gate voltage VIG1V, VIG2V -10 - +15 V
Horizontal input gate voltage VIG1H, VIG2H -10 - +15 V
Summing gate voltage VSG -10 - +15 V
Output gate voltage VOG -10 - +15 V
Reset gate voltage VRG -10 - +15 V
Transfer gate voltage VTG -10 - +15 V
Vertical shift register clock voltage VP1V, VP2V -10 - +15 V
Horizontal shift register clock voltage VP1H, VP2H
VP3H, VP4H -10 - +15 V
Note: Exceeding the absolute maximum ratings even momentarily may cause a drop in product quality. Always be sure to use the
product within the absolute maximum ratings.
*3: Package temperature
Parameter Symbol S11071 series S10420-01 series Unit
Min. Typ. Max. Min. Typ. Max.
Output transistor drain voltage VOD 12 15 18 23 24 25 V
Reset drain voltage VRD 14 15 16 11 12 13 V
Over ow drain voltage VOFD 11 12 13 11 12 13 V
Over ow gate voltage VOFG 0 13 14 0 12 13 V
Output gate voltage VOG 4 56456 V
Substrate voltage VSS - 0 - - 0 - V
Output ampli er return voltage Vret - 1 2 V
Test point
Input source VISV, VISH - VRD - - VRD - V
Vertical input gate VIG1V, VIG2V -9 -8 - -9 -8 - V
Horizontal input gate VIG1H, VIG2H -9 -8 - -9 -8 - V
Vertical shift register clock voltage High VP1VH, VP2VH 4 68468 V
Low VP1VL, VP2VL -9 -8 -7 -9 -8 -7
Horizontal shift register clock voltage
High VP1HH, VP2HH
VP3HH, VP4HH 468468
V
Low VP1HL, VP2HL
VP3HL, VP4HL -6 -5 -4 -6 -5 -4
Summing gate voltage High VSGH 4 68468 V
Low VSGL -6 -5 -4 -6 -5 -4
Reset gate voltage High VRGH 468468 V
Low VRGL -6 -5 -4 -6 -5 -4
Transfer gate voltage High VTGH 468468 V
Low VTGL -9 -8 -7 -9 -8 -7
External load resistance RL
2.0 2.2 2.4 90 100 110 k
Ω
CCD image sensors S11071/S10420-01 series
3
Electrical characteristics (Ta=25 °C)
Electrical and optical characteristics (Ta=25 °C, unless otherwise noted)
Parameter Symbol S11071 series S10420-01 series Unit
Min. Typ. Max. Min. Typ. Max.
Signal output frequency*4fc - 5 10 - 0.25 0.5 MHz
Vertical shift register
capacitance
-1004(-01)
CP1V, CP2V
- 200 - - 200 -
pF
-1006(-01) - 600 - - 600 -
-1104(-01) - 400 - - 400 -
-1106(-01) - 1200 - - 1200 -
Horizontal shift register
capacitance
-1004(-01)/-1006(-01) CP1H, CP2H
CP3H, CP4H
-80- -80-pF
-1104(-01)/-1106(-01) - 160 - - 160 -
Summing gate capacitance CSG -10- -10-pF
Reset gate capacitance CRG -10- -10-pF
Transfer gate capacitance -1004(-01)/-1006(-01) CTG -30- -30-pF
-1104(-01)/-1106(-01) - 60 - - 60 -
Charge transfer ef ciency*5CTE 0.99995 0.99999 - 0.99995 0.99999 - -
DC output level*4Vout 7 8 9 17 18 19 V
Output impedance*4Zo - 0.3 - - 10 - kΩ
Power consumption*4 *6P-
75
--4-mW
*4: The values depend on the load resistance. (S11071 series: VOD=15 V, RL=2.2 kΩ, S10420-01 series: VOD=24 V, RL=100 kΩ)
*5: Charge transfer ef ciency per pixel, measured at half of the full well capacity
*6: Power consumption of the on-chip ampli er plus load resistance
Parameter Symbol S11071 series S10420-01 series Unit
Min. Typ. Max. Min. Typ. Max.
Saturation output voltage Vsat - Fw × Sv - - Fw × Sv - V
Full well capacity Vertical Fw 50 60 - 50 60 - ke-
Horizontal 150 200 - 250 300 -
CCD node sensitivity*7Sv 7 8 9 5.5 6.5 7.5 μV/e-
Dark current*8DS - 50 500 - 50 500
e
-
/pixel/s
Readout noise*9Nr - 23 28 - 6 15 e- rms
Dynamic range*10 Line binning DR 6520 8700 - 41700 50000 - -
Spectral response range λ-200 to
1100 --
200 to
1100 -nm
Photoresponse nonuniformity*11 PRNU - ±3 ±10 - ±3 ±10 %
*7: The values depend on the load resistance. (S11071 series: VOD=15 V, RL=2.2 kΩ, S10420-01 series: VOD=24 V, RL=100 kΩ)
*8: Dark current is reduced to half for every 5 to 7 °C decrease in temperature.
*9: S11071 series (temperature: 25 °C): fc=2 MHz, S10420-01 series (temperature: -40 °C): fc=20 kHz
*10: Dynamic range = Full well capacity / Readout noise
*11: Measured at one-half of the saturation output (full well capacity) using LED light (peak emission wavelength: 660 nm)
Fixed pattern noise (peak to peak)
Signal × 100
[%]Photoresponse nonuniformity =
CCD image sensors S11071/S10420-01 series
Spectral response (without window)*12
Dark current vs. temperature
Spectral transmittance characteristic of window material
KMPDB0303EA
4
*12: Spectral response with quartz glass is decreased according to
the spectral transmittance characteristic of window material.
Wavelength (nm)
(Typ. Ta=25 °C)
Quantum efficiency (%)
0
100
80
60
40
20
1200200 400 600 800 1000
Temperature (°C)
Dark current (e-/pixel/s)
0.01
100 (Typ.)
10
1
0.1
3020-50 -30-40 -20 -10 100
Wavelength (nm)
(Typ. Ta=25 °C)
Transmittance (%)
0
100
80
90
70
50
30
10
60
40
20
1200
100 300 400200 500 600 700 800 900
1000 1100
KMPDB0316EA
KMPDB0304EA
CCD image sensors S11071/S10420-01 series
KMPDC0343EB
KMPDC0269EC
Device structure (conceptual drawing of top view in dimensional outline)
S11071 series
S10420-01 series
Effective pixels
Effective pixels
Horizontal
shift register
Thinning
Thinning
23 22 21 20 19 18 17 16
1
2
6 7 8 9 11 12
14
15
5
64
4
3
2
12345
1024
24
2n signal output
4-bevel 2-bevel
13
4 blank pixels
2n signal output
4 blank pixels
6-bevel 6-bevel
3 4 5 10
V=16, 64
H=1024, 2048
Note: When viewed from the direction of the incident light, the horizontal shift register is
covered with a thick silicon layer (dead layer). However, long-wavelength light
passes through the silicon dead layer and may possibly be detected by the horizontal
shift register. To prevent this, provide light shield on that area as needed.
Horizontal
shift register
Note: When viewed from the direction of the incident light, the horizontal shift register is
covered with a thick silicon layer (dead layer). However, long-wavelength light
passes through the silicon dead layer and may possibly be detected by the horizontal
shift register. To prevent this, provide light shield on that area as needed.
Effective pixels
Effective pixels
Horizontal
shift register
Thinning
Thinning
23 22 21 20 19 18 17 16
1
2
6 7 8 9 11 12
14
15
5
64
4
3
2
12345
1024
24
2n signal output
4-bevel 2-bevel
13
4 blank pixels
2n signal output
4 blank pixels
6-bevel 6-bevel
3 4 5 10
V=16, 64
H=1024, 2048
Horizontal
shift register
5
CCD image sensors S11071/S10420-01 series
6
Timing chart (line binning)
KMPDC0270ED
Integration time
(shutter has to be open)
(shutter has to be closed) (shutter has to be closed)
P1V
P2H
P3H
Readout periodVertical binning period
Tpwv
Tovr
Tovr
P2V, TG
P4H, SG
P1H
RG
OS
TovrhTpwh, Tpws
Tpwr
4...1043 1044: S11071/S10420-1004, -1006
4...2067 2068: S11071/S10420-1104, -1106
D3...D10, S1...S1024, D11...D18: S11071/S10420-1004, -1006
S1...S2048 : S11071/S10420-1104, -1106
D1 D2 D19 D20
12
123
3...21 2216 + 6 (bevel): S11071/S10420-1004, -1104
3...69 7064 + 6 (bevel): S11071/S10420-1006, -1106
Parameter Symbol S11071 series S10420-01 series Unit
Min. Typ. Max. Min. Typ. Max.
P1V, P2V, TG Pulse width*13 Tpwv 1 8 - 6 8 - μs
Rise and fall times*13 Tprv, Tpfv 20 - - 20 - - ns
P1H, P2H, P3H, P4H
Pulse width*13 Tpwh 50 100 - 1000 2000 - ns
Rise and fall times*13 Tprh, Tpfh 10 - - 10 - - ns
Pulse overlap time Tovrh 25 50 - 500 1000 - ns
Duty ratio*13 - 405060405060 %
SG
Pulse width*13 Tpws 50 100 - 1000 2000 - ns
Rise and fall times*13 Tprs, Tpfs 10 - - 10 - - ns
Pulse overlap time Tovrh 25 50 - 500 1000 - ns
Duty ratio*13 - 405060405060 %
RG Pulse width Tpwr 5 50 - 100 1000 - ns
Rise and fall times Tprr, Tpfr 5 - - 5 - - ns
TG-P1H Overlap time Tovr 1 2 - 1 2 - μs
*13: Symmetrical clock pulses should be overlapped at 50% of maximum pulse amplitude.
CCD image sensors S11071/S10420-01 series
KMPDA0223ED
Dimensional outline (unit: mm)
Index mark
38.10 ± 0.4
24
112
13
27.94 ± 0.3
A3.3 ± 0.35
0.25-0.03
+0.05
10.41 ± 0.25
10.03 ± 0.3
B
Photosensitive area
Type no.
S11071/
S10420
-1004(-01) 14.336 (H)
14.336 (H)
28.672 (H)
28.672 (H)
0.224 (V)
AB
0.896 (V)
0.224 (V)
0.896 (V)
-1006(-01)
-1104(-01)
-1106(-01)
1.47
2.54 ± 0.130.46 ± 0.05
1.27 ± 0.2
1.27 ± 0.25
3.0 ± 0.5
Photosensitive surface
1.72 ± 0.17
Index mark
7
CCD image sensors S11071/S10420-01 series
8
Pin connections
Pin no. Symbol Function Remark
(standard operation)
1 OS Output transistor source RL=2.2 kΩ
2 OD Output transistor drain +15 V
3 OG Output gate +5 V
4 SG Summing gate Same pulse as P4H
5 Vret Output ampli er return +1 V
6 RD Reset drain +15 V
7 P4H CCD horizontal register clock-4
8 P3H CCD horizontal register clock-3
9 P2H CCD horizontal register clock-2
10 P1H CCD horizontal register clock-1
11 IG2H Test point (horizontal input gate-2) -8 V
12 IG1H Test point (horizontal input gate-1) -8 V
13 OFG Over ow gate +13 V
14 OFD Over ow drain +12 V
15 ISH Test point (horizontal input source) Connect to RD
16 ISV Test point (vertical input source) Connect to RD
17 SS Substrate GND
18 RD Reset drain +15 V
19 IG2V Test point (vertical input gate-2) -8 V
20 IG1V Test point (vertical input gate-1) -8 V
21 P2V CCD vertical register clock-2
22 P1V CCD vertical register clock-1
23 TG Transfer gate Same pulse as P2V
24 RG Reset gate
Pin no. Symbol Function Remark
(standard operation)
1 OS Output transistor source RL=100 kΩ
2 OD Output transistor drain +24 V
3 OG Output gate +5 V
4 SG Summing gate Same pulse as P4H
5 SS Substrate GND
6 RD Reset drain +12 V
7 P4H CCD horizontal register clock-4
8 P3H CCD horizontal register clock-3
9 P2H CCD horizontal register clock-2
10 P1H CCD horizontal register clock-1
11 IG2H Test point (horizontal input gate-2) -8 V
12 IG1H Test point (horizontal input gate-1) -8 V
13 OFG Over ow gate +12 V
14 OFD Over ow drain +12 V
15 ISH Test point (horizontal input source) Connect to RD
16 ISV Test point (vertical input source) Connect to RD
17 SS Substrate GND
18 RD Reset drain +12 V
19 IG2V Test point (vertical input gate-2) -8 V
20 IG1V Test point (vertical input gate-1) -8 V
21 P2V CCD vertical register clock-2
22 P1V CCD vertical register clock-1
23 TG Transfer gate Same pulse as P2V
24 RG Reset gate
S11071 series
S10420-01 series
CCD image sensors S11071/S10420-01 series
9
Driver circuits for CCD image sensor (S10420-01/S11071 series) C11287/C11288 [sold separately]
The C11287, C11288 are driver circuits designed for HAMAMATSU CCD image sensors S10420-01/S11071 series. The C11287, C11288
can be used in spectrometers, etc. when combined with the CCD image sensor.
Features
Built-in 14-bit A/D converter
Interface to computer: USB 2.0
Power supply: USB bus power operation (C11287)
DC+5 V operation (C11288)
Precautions (electrostatic countermeasures)
Handle these sensors with bare hands or wearing cotton gloves. In addition, wear anti-static clothing or use a wrist band with an
earth ring, in order to prevent electrostatic damage due to electrical charges from friction.
Avoid directly placing these sensors on a work-desk or work-bench that may carry an electrostatic charge.
Provide ground lines or ground connection with the work- oor, work-desk and work-bench to allow static electricity to discharge.
Ground the tools used to handle these sensors, such as tweezers and soldering irons.
It is not always necessary to provide all the electrostatic measures stated above. Implement these measures according to the
amount of damage that occurs.
C11287
C11288
Related information
Precautions
Notice
Image sensors/Precautions
Technical information
FFT-CCD area image sensor/Technical information
www.hamamatsu.com/sp/ssd/doc_en.html
CCD image sensors S11071/S10420-01 series
Cat. No. KMPD1120E06 Aug. 2012 DN
www.hamamatsu.com
HAMAMATSU PHOTONICS K.K., Solid State Division
1126-1 Ichino-cho, Higashi-ku, Hamamatsu City, 435-8558 Japan, Telephone: (81) 53-434-3311, Fax: (81) 53-434-5184
U.S.A.: Hamamatsu Corporation: 360 Foothill Road, P.O.Box 6910, Bridgewater, N.J. 08807-0910, U.S.A., Telephone: (1) 908-231-0960, Fax: (1) 908-231-1218
Germany: Hamamatsu Photonics Deutschland GmbH: Arzbergerstr. 10, D-82211 Herrsching am Ammersee, Germany, Telephone: (49) 8152-375-0, Fax: (49) 8152-265-8
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China: Hamamatsu Photonics (China) Co., Ltd.: 1201 Tower B, Jiaming Center, No.27 Dongsanhuan Beilu, Chaoyang District, Beijing 100020, China, Telephone: (86) 10-6586-6006, Fax: (86) 10-6586-2866
Product specifications are subject to change without prior notice due to improvements or other reasons. This document has been carefully prepared and the
information contained is believed to be accurate. In rare cases, however, there may be inaccuracies such as text errors. Before using these products, always
contact us for the delivery specification sheet to check the latest specifications.
T
ype numbers of products listed in the delivery specification sheets or supplied as samples may have a suffix "(X)" which means preliminary specifications or
a suffix "(Z)" which means developmental specifications.
T
he product warranty is valid for one year after delivery and is limited to product repair or replacement for defects discovered and reported to us within that
one year period. However, even if within the warranty period we accept absolutely no liability for any loss caused by natural disasters or improper product
use.
Copying or reprinting the contents described in this material in whole or in part is prohibited without our prior permission.
Information described in this material is current as of August, 2012.
10