MIL-PRF-19500/255AA
19 MAY 2016
w/AMENDMENT 1
SUPERSEDING
MIL-PRF-19500/255AA
18 Sept 2015
PERFORMANCE SPECIFICATION SHEET
TRANSISTOR, NPN, SILICON, SWITCHING,
TYPES 2N2221, 2N2222, JAN, JANTX, JANTXV, JANS, JANHC, AND JANKC
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
The requirements for acquiring the product described herein shall consist of
this specification sheet and MIL-PRF-19500.
1. SCOPE
1.1 Scope. This specificatio n covers the performance requirements for NPN, silicon, switching transistors. Four
levels of product assurance (JAN, JANTX, JANTXV, and JANS) are provided for each encapsulated device type as
specified in MIL-PRF-19500, and two levels of product assurance (JANHC and JANKC) are provided for each
unencapsulated device type. RHA level designators “M”, “D”, “P“, “L”, “R”, “F’, “G” and “H” are appended to the
device prefix to identify devices, which have passed RHA requirements.
1.2 Physical dimensions. The device packages for the encapsulated device types are as follows: (2N2221A and
2N2222A) (TO-18) in accordance with figure 1, (UA) in accordance with figure 2, (UB, UBC, UBN, and UBCN) in
accordance with figure 3. The dimensions and topography for JANHC and JANKC unencapsulated die is as follows:
The B version die in ac corda n ce w ith fi gure 4. The C version die in accordance w ith figure 5. The D version die in
accordance with figure 6.
1.3 Maximum ratings. Unless otherwise specif ied TA = +25°C.
Types
I
C
V
CBO
V
CEO
V
EBO
T
J
and T
STG
All devices
mA dc
800
V dc
75
V dc
50
V dc
6
°C
-65 to +200
AMSC N/A FSC 5961
INCH-POUND
Comments, suggestions, or questions on this document should be addressed to DLA Land and Mar itime , ATTN:
VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to Semiconductor@dla.mil. Since con tact
information can change, you may want to verify the currency of this address information using the ASSIST
Online databas e at https://assist.dla.mil.
The documentation and process conversion measures
necessary to comply with this document shall be
completed by 19 August 2016.
MIL-PRF-19500/255AA
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1.3 Maximum ratings. Unless otherwise specif ied TA = +25°C. - Continued.
Types
P
T
TA = +25°C
(1) (2)
P
T
TC = +25°C
(1) (2)
P
T
TSP(IS) =
+25°C (1) (2)
P
T
TSP(AM) =
+25°C (1) (2)
RθJA
(2) (3)
RθJC
(2) (3)
RθJSP(IS)
(2) (3)
RθJSP(AM)
(2) (3)
W
W
W
W
°C/W
°C/W
°C/W
°C/W
2N2221A, AL
2N2222A, AL
0.50
0.50
1
1
N/A
N/A
N/A
N/A
325
325
150
150
N/A
N/A
N/A
N/A
2N2221AUA
2N2222AUA
(4) 0.50
(4) 0.50
N/A
N/A
1
1
1.5
1.5
(4) 325
(4) 325
N/A
N/A
110
110
40
40
2N2221AUB, UBC,
UBN and UBCN
2N2222AUB, UBC,
UBN and UBCN
(4) 0.50
(4) 0.50
N/A
N/A
1
1
N/A
N/A
(4) 325
(4) 325
N/A
N/A
90
90
N/A
N/A
(1) For derating, see fi gure 7, figure 8, figure 9, figure 10, and figur e 11.
(2) See 3.3 for abbreviations.
(3) For thermal impedance curves, see figure 12, figure 13, f igure 14, figure 15, and fig ure 16.
(4) For non-thermal conductive PCB or unknown PCB surface mount conditions in free air, substitute figure 8
And figure 13 for the UA, UB, UC, UBN, and UBCN package and use RθJA.
1.4 Primary electrical chara ct er ist ic s. Unless otherwise specified, TA = +25°C.
h
FE
at V
CE
= 10 V dc
Limits
h
FE1
IC = 0. 1 mA dc
h
FE2
IC = 1.0 mA dc
h
FE3
IC = 10 mA dc
h
FE4
(1)
IC = 150 mA dc
h
FE5
(1)
IC = 500 mA dc
Min
Max
AL, UA, UB, UBC,
UBN, and UBCN
2N2221A, 2N2222A
30 50
AL, UA, UB, UBC,
UBN, and UBCN
2N2221A, 2N2222A
35 75
150 325
AL, UA, UB, UBC,
UBN, and UBCN
2N2221A, 2N2222A
40 100
AL, UA, UB, UBC,
UBN, and UBCN
2N2221A, 2N2222A
40 100
120 300
AL, UA, UB, UBC,
UBN, and UBCN
2N2221A, 2N2222A
20 30
Types
Limit
/hfe/
f = 100 MHz
Cobo
100 kHz
≤
Switching (saturated)
VCE = 20 V dc
IC = 20 mA dc
f ≤ 1 MHz
VCB = 10 V dc
IE = 0
ton
See figure 17
toff
See figure 18
2N2221A, 2N2222A
AL, UA, UB, UBC,
UBN, and UBCN
Min
Max
2.5
pF
8
ns
35
ns
300
Types
Limit
V
CE(sat)1
(1)
IC = 150 mA dc
IB = 15 mA dc
V
CE(sat)2
(1)
IC = 500 mA dc
IB = 50 mA dc
V
BE(sat)1
(1)
IC = 150 mA dc
IB = 15 mA dc
V
BE(sat)2
(1)
IC = 500 mA dc
IB = 50 mA dc
2N2221A, 2N2222A
AL, UA, UB, UBC,
UBN, and UBCN
Min
Max
V dc
0.3
V dc
1.0
V dc
0.6
1.2
V dc
2.0
(1) Pulsed see 4.5.1.
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1.5 Part or Identifying Number (PIN). The PIN is in accordance with MIL-PRF-19500, and as specified herein.
See 6.6 for PIN construction example and 6.7 for a list of available PINs.
1.5.1 JAN certification mark and quality level.
1.5.1.1 Quality level designators for encapsulated devices. The quality level designators for encapsulated devices
that are applicable for this specification sheet from the lowest to the highest level are as follows: "JAN", "JANTX",
"JANTXV", and "JANS".
1.5.1.2 Quality level designators for unencapsulated devices (die). The quality level designators for
unencapsulated devices (die) that are applicable for this specification sheet from the lowest to the highest level are as
follows: "JANHC" and "JANKC".
1.5.2 Radiation hardness assurance (RHA) designator. The RHA levels that are applicable for this specification
sheet from lowest to highest are as follows: "M", "D", "P", "L", "R", "F", "G", and "H").
1.5.3 Dev ice ty pe. The designation system for the device types of transistors covered by this specification sheet
are as follows.
1.5.3.1 First number and first letter symbols. The transistors of this specification sheet use the first number and
letter symbols "2N".
1.5.3.2 Second number symbols. The second number symbols for the transistors covered by this specification
sheet are as follows: "2 221” a nd “22 22".
1.5.4 Suffix symbols. The following suffix letters are incorporated in the PIN in the order listed in the table as
applicable:
A
Indicates a modified version of the non-suffix device.
L For L suffix devices, dimension LL = 1.5 inches (38.10 mm) min. and 1.75 inches (44.45 mm) max.
UA
Indicates a 4 pad surface mount package. (see figure 2)
UB
Indicates a 4 pad surface mount package. The metal lid is connected to pad 4 (see figure 3)
UBN Indicates a 4 pad surface mount package. Pad 1 = Base, Pad 2 = Emitter, Pad 3 = Collector, Isolated lid with
three pads only. (see fi gure 3).
UBC
Indicates a 4 pad surface mount package. (ceramic lid) only: Pad 1 = Base, Pad 2 = Emitter, Pad 3 =
Collector, Pad 4 = Connected to the lid braze ring.
UBCN Indicates a 4 pad surface mount package. (ceramic lid) only: Pad 1 = Base, Pad 2 = Emitter, Pad 3 =
Collector, Isolated lid with three pads only.
1.5.5 Lead finish. The lead finishes applicable to this specification sheet are listed on QML-19500.
1.5.6 Die identifiers for unencapsulated devices (manufacturers and critical interface identifiers). The
manufact urer die ide ntifiers t h at are applic able for thi s specification she et are "B", “C”, and ”D”.
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Dimensions
Symbol
Inches
Millimeters
Note
Min
Max
Min
Max
CD
.178
.195
4.52
4.95
CH
.170
.210
4.32
5.33
HD
.209
.230
5.31
5.84
LC
.100 TP
2.54 TP
6
LD
.016
.021
0.41
0.53
7,8
LL
.500
.750
12.70
19.05
7,8,13
LU
.016
.019
0.41
0.48
7,8
L1
.050
1.27
7,8
L2
.250
6.35
7,8
P
.100
2.54
Q
.030
0.76
5
TL
.028
.048
0.71
1.22
3,4
TW
.036
.046
0.91
1.17
3
r
.010
0.25
10
α
45° TP
45° TP
6
1, 2, 9, 11, 12, 13
NOTES:
1. Dimensions a re in inches.
2. Millime ter s are giv en for general inf or mat ion only .
3. Beyond r (radius) maximum, TL shall be held for a minimum length of .011 inch (0.28 mm).
4. Dimension TL measured from maximum HD.
5. Body contour optional within zone defined by HD, CD, and Q.
6. Leads at gauge plane .054 +.001 -.000 inch (1.37 +0.03 -0.00 mm) below seating plane shall be within .007
inch (0.18 mm) radius of true position (TP) at maximum material condition (MMC) relative to tab at MMC.
7. Dimension LU applies between L1 and L2. Dimens ion LD appl ies between L2 and LL minimum. Diameter
is uncontrolled in L1 and beyond LL minimum.
8. All three leads.
9. The collector shall be internally connected to the case.
10. Dimension r (r adius) applies to both inside corners of tab.
11. In accordance with ASME Y14.5M, diameters are equivalent to φx symbology.
12. Lead 1 = emitter, lead 2 = base, lead 3 = collector.
13. For L suffix devices, dimension LL = 1.5 inches (38.10 mm) min. and 1.75 inches (44.45 mm) max.
FIGURE 1. Physical dimensio ns (sim ilar t o TO -18).
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Dimensions
Note
Symbol
Inches
Millimeters
Min
Max
Min
Max
BL
.215
.225
5.46
5.71
BL2
.225
5.71
BW
.145
.155
3.68
3.93
BW2
.155
3.93
CH
.061
.075
1.55
1.90
3
L3
.003
0.08
5
LH
.029
.042
0.74
1.07
LL1
.032
.048
0.81
1.22
LL2
.072
.088
1.83
2.23
LS
.045
.055
1.14
1.39
LW
.022
.028
0.56
0.71
LW2
.006
.022
0.15
0.56
5
Pin no.
1
2
3
4
Transistor
Collector
Emitter
Base
N/C
NOTES:
1. Dimensions are in inches.
2. Millimeters are given for general information only.
3. Dimension CH controls the overall package thickness. When a window lid is used, dimension CH must increase
by a minimum of .010 inch (0.254 mm) and a maximum of .040 inch (1.020 mm).
4. The corner shape (squar e, not c h, radiu s) may vary at the manufacturer's option, from that shown on the
drawing.
5. Dimensions LW2 minimum and L3 minimum and the appropriate castellation length define an unobstructed
three-dimensional space traversing all of the ceramic layers in which a castellation was designed.
(Castellations are required on the bottom two layers, optional on the top ceramic layer.) Dimension LW2
maximum define the maximum width of the castellation at any point on its surface. Measurement of this
dimension may be made pr ior to solder dip pin g.
6. The co-planarity deviation of all terminal contact points, as defined by the device seating plane, shall not exceed
.006 inch (0.15mm) for solder dipped leadless c hip carr ier s .
7. In accordance with ASME Y14.5M, diameters are equivalent to φx symbology.
FIGURE 2. Physical dimensio ns, surf a ce mount (UA vers ion ).
UA
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FIGURE 3. Physical dimensio ns, surf a ce mount (UB, UBN, U BC , and UBCN versions).
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Dimensions
Symbol
Inches
Millimeters
Note
Min
Max
Min
Max
BL
.115
.128
2.92
3.25
BW
.085
.108
2.16
2.74
BH
.046
.056
1.17
1.42
UB only, 4
BH
.046
.056
1.17
1.42
UBN only, 5
BH
.055
.069
1.40
1.75
UBC only, 6
BH
.055
.069
1.40
1.75
UBCN only, 7
CL
.128
3.25
CW
.108
2.74
LL1
.022
.038
0.56
0.97
3 places
LL2
.014
.035
0.356
0.89
3 places
LS1
.035
.040
0.89
1.02
LS2
.071
.079
1.80
2.01
LW
.016
.024
0.41
0.61
r
.008
0.20
6
r1
.012
0.30
8
r2
.022
0.56
UB and UBC only, 8
NOTES:
1. Dimensions are in inches.
2. Millimeters are given for general information only.
3. Hatched areas on package denote metallized areas.
4. UB only: Pad 1 = Base, Pad 2 = Emitter, Pad 3 = Collector, Pad 4 = Shielding connected to the metal lid.
5. UBN only: Pad 1 = Base, Pad 2 = Emitter, Pad 3 = Collector, Isolated lid with three pads only.
6. UBC (ceramic lid) only: Pad 1 = Base, Pad 2 = Emitter, Pad 3 = Collector, Pad 4 = Connected to the lid braze
ring.
7. UBCN (ceramic lid) only : Pad 1 = Base, Pad 2 = Emitter, Pad 3 = Collector, Isolated lid with three pads only.
8. For design reference only.
9. In accordance with ASME Y14.5M, diameters are equivalent to φx symbology.
* FIGURE 3. Physical dimensions, surface mount (UB, UBN, UBC, and UBCN versions) - Continued.
*
MIL-PRF-19500/255AA
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Physical characteristics:
B-version
NOTES:
1. Chip size: .023 x .023 inch ±.002 inch (0.584 mm x 0.584 mm ±0.051 mm).
2. Chip thickness: .010 ±.0015 inch (0.254 mm ±0.038 mm).
3. Top metal: Aluminum 15,000Å mi nim um, 18,000Å nominal for JA NHC.
AlSiCu 16,000Å minimum, 18,000Å n omi nal for JANKC .
4. Back metal: Gold 4,500Å minimum, 5,000Å nominal.
5. Glassivation: Si3N4 2,000 Å minimum, 8,000 Å nominal for JANHC.
SiON 8,500 Å minimum, 9,000 Å nominal for JANKC
6. Backsi de: Collector.
7. Bonding pad: B = .0042 x .0042 inch (0.107 mm x 0.107 mm).
E = .0042 x .0042 inch (0.107 mm x 0.107 mm).
8. In accordance with ASME Y14.5M, diameters are equivalent to φx symbology.
FIGURE 4. JANHC and JANKC (B-version) die di men sio ns.
E
B
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NOTES:
1. Die size: .020 x .020 inch (0.508 mm x 0.508 mm).
2. Die thickness: .008 ±.0016 inch (0.2032 mm ±0.04064 mm).
3. Base bonding pad: .004 x .004 inch (0.1016 mm x 0.1016 mm).
4. Emitter bonding pad: .004 x .004 inch.
5. Back metal: Gold, 6,500 ±1,950 Å.
6. Top metal: Aluminum, 27,000 ±3,000 Å.
7. Back side: Collector.
8. Glassivation: SiO2, 7,500 ±1,500 Å.
9. In accordance with ASME Y14.5M, diameters are equivalent to φx symbology.
FIGURE 5. JANHC and JANKC (C-version) die dim en sion s.
E
B
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NOTES:
* 1. Chip size: .025 x .025 inch ±.002 inch ( 0.635 mm x 0.635 mm ±0.051 mm).
2. Chip thickness .010 ±.0015 inch (0.254 mm ±0.038 mm).
3. Top metal: AlSiCu 16,260 Å minimum, 20,320 Å nominal for JANHC and JANKC.
4. Back metal: Gold 4,500 Å minimum, 5,000 Å nominal for JANHC and JANKC.
5. Glassivation: SiO2 6,500 Å minimum, 8,000 Å nominal for JANHC and JANKC.
6. Backside: Collector.
7. Bonding pad: B = .0043 x .0043 inch (0.110 mm x 0.110 mm).
E = .0043 x .0043 inch (0.110 mm x 0.110 mm).
8. In accordance with ASME Y14.5M, diameters are equivalent to φx symbology.
FIGURE 6. JANHC and JANKC (D-ver sion) die dim en sion s.
E
B
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2. APPLICABLE DOCUMENTS
2.1 General. The documents listed in this section are specified in sections 3 and 4 of this specification. This
section does not include documents cited in other sections of this specification or recommended for additional
information or as examples. While every effort has been made to ensure the completeness of this list, document
users are cautioned that they must meet all specified requirements of documents cited in sections 3 and 4 of this
specification, whether or not they are listed.
2.2 Government docum ent s.
2.2.1 Specifications, standards, and handbooks. The following specifications, standards, and handbooks form a
part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are
those cited in the solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATIONS
MIL-PRF-19500 - Semiconductor Devices, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-750 - Test Methods for Semiconductor Devices.
(Copies of these documents are available online at http://quicksearch.dla.mil.
2.3 Order of prece den ce. Unless otherwise noted herein or in the contract, in the event of a conflict between the
text of this document and the references cited herein, the text of this document takes precedence. Nothing in this
document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained.
3. REQUIREMENTS
3.1 General. The individual item requirements shall be as specified in MIL-PRF-19500 and as modified herein.
3.2 Qualification. Devices furnished under this specification shall be products that are manufactured by a
manufacturer authorized by the qualifying activity for listing on the applicable qualified manufacturers list before
contract aw ard (see 4.2 and 6.3).
3.3 Abbreviations, symbols, and definitions. Abbreviations, symbol s, and defi niti on s used herein shall be as
specified in MIL-PRF-19500 and as follows.
PCB ............................................. Printed circuit board.
RθJA .............................................. Thermal resistan ce jun cti on to ambi ent.
RθJC .............................................. Thermal resistan ce jun cti on to cas e.
RθJSP(AM) ....................................... Thermal resistance junction to solder pads (adhesive mount to PCB).
RθJSP(IS) ......................................... Thermal resistance junction to solder pads (infinite sink mount to PCB).
TSP(AM) .......................................... Temperature of solder pads (adhesive mount to PCB).
TSP(IS) ............................................ Temperature of solder pad s (infini te sink mount to PCB).
UA, .............................................. Surface mount case outlines (see figure 2).
UB, UBC, UBN, and UBCN .......... Surface mount case outlines (see figure 3).
3.4 Interfa ce and phy si cal dim ensi ons . The interface and physical dimensions shall be as specified in
MIL-PRF-19500, and figure 1 (TO-18), figure 2 (UA), fi gure 3 (UB), figure 4 (JANHC and JANKC version B), figure 5
(JANHC and JANKC version C), and figure 6 (JANHC and JANKC version D) herein.
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3.4.1 Lead finish. Lead finish shall be solderable in accordance with MIL-PRF-19500, MIL-STD-750, and herein.
Where a choice of lead finish is desired, it shall be specified in the acquisition document (see 6.2).
3.5 Radiation hardness assurance (RHA). Radiation hardness assurance requirements, PIN designators, and test
levels shall be as defined in MIL-PRF-19500.
3.6 Electr ica l perf or man ce ch aract er is tic s. Unless otherwise specified herein, the electrical performance
characteristics are as specified in paragraph 1.3, 1.4, and table I.
3.7 Electrical test requirements. The electrical test requirements shall be as specified in table I.
3.8 Marking. Marking shall be in accordance with MIL-PRF-19500, except for the UB, UBC, UBN, and UBCN
suffix packages. Marking on the UB, UBC, UBN, and UBCN packages shall consi st of an abbreviated part number,
the date code, and the manufacturer’s symbol or logo. The prefixes JAN, JANTX, JANTXV, and JANS can be
abbreviat ed as J, JX, JV, and JS respectively. The "2N" prefix and the "AUB" suffix can also be omitted. The
radiation hardened designator M, D, P, L, R, F, G, or H shall immediately precede (or replace) the device “2N”
identifier (depending upon degree of abbreviation required).
3.9 Workmanship. Semiconductor devices shall be processed in such a manner as to be uniform in quality and
shall be free from other defects that will affect life, serviceability, or appearance.
4. VERIFICATION
4.1 Clas sifi cat ion of insp ect ions. The inspection requirements specified herein are classified as follows:
a. Qualification inspection (see 4.2).
b. Screening (see 4.3).
c. Conformance inspection (see 4.4, and tables I and II).
4.2 Qualification inspection. Qualification inspection shall be in accordance with MIL-PRF-19500 and as specified
herein.
4.2.1 JANHC and JANKC qualification. JANHC and JANKC qualification insp ect ion sh all b e in accorda nce w ith
MIL-PRF-19500.
4.2.2 Gro up E qualifi cat ion. Group E inspection shall be performed for qualification or re-qualification only. In
case qualification was awarded to a prior revision of the specification sheet that did not request the performance of
table III tes ts, the tests specified in table III herein that were not performed in the prior revision shall be performed on
the first inspection lot of this revision to maintain qualification.
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4.3 Screening (JANS, JANTX, and JANTXV levels only). Screening shall be in accordance with
table E-IV MIL-PRF-19500, and as specified herein. The following measurements shall be made in accordance with
table I herein. Devices that exceed the limits of table I herein shall not be acceptable.
Screen
Measurement
JANS level
JANTX and JANTXV levels
2
Optional
Optional
3a
Required
Required
3b
Not applicable
Not applicable
(1) 3c
Thermal impedance (transient), method
3131 of MIL-STD-750.
(see 4.3.3)
Thermal impedance (transient), method
3131 of MIL-STD-750. (2)
(see 4.3.3)
4
Required
Optional
5
Required
Not applicable
8
Required
Not required
9
ICBO2, hFE4
Not applicable
10
48 hours minimum
48 hours minimum
11
ICBO2; hFE4;
∆ICBO2 = 100 percent of initial value or 5
nA dc, whichever is greater.
∆hFE4 = ±15 percent
ICBO2; hFE4
12
See 4.3.2
See 4.3.2
13
Subgroups 2 and 3 of table I herein;
∆ICBO2 = 100 percent of initial value or
5 nA dc, whichever is greater;
∆hFE4 = ±15 percent
Subgroup 2 of table I herein;
∆ICBO2 = 100 percent of init ial v alue or
5 nA dc, whichever is greater;
∆hFE4 = ±15 percent
15
Required
Not required
16
Required
Not required
(1) Thermal impedance limits shall not exceed figures 12, 13, 14, 15, and 16.
(2) Shall be performed anytime after tempera ture cy cli ng, sc reen 3a; JANTX and JANTXV levels do not need to be
repeated in screening requirements.
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4.3.1 Screening (JANHC and JANKC). Screening of JANHC and JANKC die shall be in accordance with
MIL-PRF-19500 "Discrete Semiconductor Die/Chip Lot Acceptance". Burn-in durat ion for the JANKC lev el f ollow s
JANS requirements; the JANHC follows JANTX requirements.
4.3.2 Power burn-in conditions. Power burn-in conditions are as follows: VCB = 10 - 30 V dc. Power shall be
applied to achieve TJ = +135°C minimum using a minimum PD = 75 percent of PT maximum, TA ambient rated as
defined in 1.3. With approva l of the qualifying activity and preparing activity, altern at e burn -in criteria (hours, bias
conditions, TJ, and mounting conditions) may be used for JANTX and JANTXV quality levels. A justification
demonstrating equivalence is required. In addition, the man u facturing site’s burn-in data and performance history will
be essential criteria for burn-in modification approval. Method 3100 of MIL-STD-750 to measure TJ shall be used.
4.3.3 Thermal impedance. The thermal impedance measurements shall be performed in accordance with method
3131 of MIL-STD-750 using the guidelines in that method for determining IM, IH, tH, tMD (and VC where appropriate).
The thermal impedance limit shall comply with the thermal impedance graph on figures 12, 13, 14, 15, and 16 (less
than or equal to the curve value at the same tH time) and sha ll be less than the pro cess determined statistica l
maximum limit as outlined in method 3131 of MIL-STD-750. See table III, subgroup 4 herein.
4.4 Conformance inspection. Conformance inspection shall be in accordance with MIL-PRF-19500, an d as
specified herein. If alternate screening is being performed in accordance with MIL-PRF-19500, a sample of screened
devices shall be submitted to and pass the requirements of subgroups 1 and 2, of table I herein, inspection only (table
E-VIb, group B, subgroup 1 is not required to be performed since solderability and resistance to solvents testing is
performed in A1 herein.
4.4.1 Gro up A inspe ctio n. Group A inspection shall be conducted in accordance with MIL-PRF-19500, and table I
herein.
4.4.2 Gro up B inspe ctio n. Group B inspection shall be conducted in accordance with the tests and conditions
specified for subgroup testing in table E-VIa (JANS) of MIL-PRF-19500 and 4.4.2.1. Delta requirements shall be in
accordance with table I, sub gr oup 2 and 4.5.3 herein: delta requirements only apply to subgroups B4, and B5. See
4.4.2.2 for JAN, JANTX, and JANTXV group B testing. Delta requirements for JAN, JANTX, and JANTXV shall be
after each step in 4.4.2.2 and shall be in accordance with 4.5.3 herein.
4.4.2.1 Group B inspection (JANS), table E-VIa of MIL-PRF-19500.
Subgroup Method Condition
B4 1037 VCB = 10 V dc, ad jus t devi ce c urrent , or pow er, to achiev e a mini mu m ∆TJ of +100°C.
B5 1027 VCB = 10 V dc; PD ≥ 100 percent of maximum rated PT (see 1.3). (NOTE: If a failure occurs,
resubmission shall be at the test conditions of the original sample.)
Option 1: 96 hours minimum sample size in accordance with MIL-PRF-19500, table E-VIa,
adjust TA or PD to achieve TJ = +275°C min i mu m.
Option 2: 216 hours minimum, sample size = 45, c = 0; adjust TA or PD to achieve a
TJ = +225°C minimum.
MIL-PRF-19500/255AA
w/AMENDMENT 1
15
4.4.2.2 Group B inspection, (JAN, JANTX, and JANTXV). Separate samples may be used for each step. In the
event of a lot failure, the resubmission requirements of MIL-PRF-19500 s hall a pply. In addition, all catastr ophi c
failures during CI shall be analyzed to the extent possible to identify root cause and corrective action. Whenever a
failure is identified as wafer lot or wafer processing related, the entire wafer lot and related devices assembled from
the wafer lot shall be rejected unless an appropriate determined corrective action to eliminate the failures mode has
been implemented and the devices from the wafer lot are screened to eliminate the failure mode.
Step Method Condition
1 1026 Steady-state life: 1,000 hours minimum, VCB = 10 V dc, power shall be applied to achieve
TJ = +150°C min imum using a min imum of PD = 75 percent of maximum rated PT as defined
in 1.3. n = 45 devices, c = 0. The sample size may be increased and the test time
decreased as long as the devices are stressed for a total of 45,000 device hours minimum,
and the actual time of test is at least 340 hours.
2 1048 Blocking life, TA = +150°C, VCB = 80 percent of rated voltage, 48 hours minimum.
n = 45 devices, c = 0.
3 1032 High-temperature life (non-operating), t = 340 hours, TA = +200°C. n = 22, c = 0.
4.4.2.3 Group B sample selection. Samples selected from group B inspection shall meet all of the following
requirements:
a. For JAN, JANTX, and JANTXV samples shall be selected randomly from a minimum of three wafers (or from
each wafer in the lot) from each wafer lot. For JANS, samples shall be selected from each inspection lot.
See MIL-PRF-19500.
b. Shall be chosen fr om an inspe ctio n lot that has been sub mitt ed to and passed table I, subgroup 2,
conformance inspection. When the final lead finish is solder, or any plating prone to oxidation at high
temperature, the samples for life test (subgroups B4 and B5 for JANS, and group B for JAN, JANTX, and
JANTXV) may be pulled prior to the application of final lead finish.
4.4.3 Gro up C inspec tion , Group C inspection shall be conducted in accordance with the test and conditions
specified for subgroup testing in table E-VII of MIL-PRF-19500, and in 4.4.3.1 (JANS) and 4.4.3.2 (JAN, JANTX , and
JANTXV) herein for group C testing. Delta requirements shall be in accordance with 4.5.3 herein; delta requirements
only apply to subgroup C6.
4.4.3.1 Group C inspection (JANS), table E-VII of MIL-PRF-19500.
Subgroup Method Condition
C2 2036 Test condition E; (not applicable for UA, UB, UBC, UBN, and UBCN devices).
C5 3131 RθJA and RθJC only, as applicable (see 1.3) and in accordance with thermal impedance
curves.
C6 1026 1,000 hours at VCB = 10 V dc; power shall be applied to achieve TJ = +150°C minimum
and a minimum of PD = 75 percent of maximum rated PT a s defin ed in 1.3 n = 45, c = 0.
The sample size may be increased and the test time decreased as long as the devic es are
stressed for a total of 45,000 device hours minimum, and the actual time of test is at least
340 hours.
MIL-PRF-19500/255AA
w/AMENDMENT 1
16
4.4.3.2 Group C inspection (JAN, JANTX, and JANTXV), table E-VII of MIL-PRF-19500.
Subgroup Method Condition
C2 2036 Test condition E; not applicable for UA, UB, UBC, UBN, and UBCN devices.
C5 3131 RθJA and RθJC only, as applicable (see 1.3 and 4.3.3) and in accordance with thermal
impedance curv es.
C6 Not applicable.
4.4.3.3 Group C sample selection. Samples for subgroups in group C shall be chosen at random from any
inspection lot containing the intended package type and lead finish procured to the same specification which is
submitted to and passes t able I tests herein for conformance inspection. When the final lead finish is solder or any
plating prone to oxidation at high temperature, the samples for C6 life test may be pulled prior to the appl ic atio n of
final lead finish. Testing of a subgroup using a single device type enclosed in the intended package type shall be
considered as complying with the requirements for that subgroup.
4.4.4 Gro up D inspec tion . Conformance inspection for hardness assured JANS and JANTXV types shall include
the group D tests specified in t able II herein. These tests shall be performed as required in accordance with
MIL-PRF-19500 and method 1019 of MIL-STD-750, for total ionizing dose or method 1017 of MIL-STD-750 for
neutron fluence as applicable (see 6.2 herein), except group D, subgroup 2 may be performed separate from other
subgroups. Alternate package options may also be substituted for the testing provided there is no adverse effect to
the fluence profile.
4.4.5 Gro up E inspe ctio n. Group E inspection shall be conducted in accordance with the conditions specified for
subgroup test ing in table E-IX of MIL-PRF-19500 and as specified in ta ble III herein. Del ta mea surements shal l be in
accordance with the applicable steps of 4.5.3.
4.5 Method of inspection. Methods of inspection shall be as specified in the appropriate tables and as follows.
4.5.1 Pul se mea sure ment s. Conditions for pulse measurement shall be as specified in section 4 of MIL-STD-750.
4.5.2 Input capacitance. This test shall be conducted in accordance with method 3240 of MIL-STD-750, except
the output capacitor shall be omitted.
4.5.3 Delta requirements. Delta requirements shall be as specified below:
Step
Inspection
MIL-STD-750
Symbol
Limit
Unit
Method
Conditions
1
Collector-base cutoff
current
3036
Bias condition D,
VCB = 60 V dc
∆ICB02
(1)
100 percent of initial
value or 8 nA dc,
whichever is greater.
2
Forward current
transfer ratio
3076
V
CE
= 10 V dc;
IC = 150 mA dc;
pulsed, see 4.5.1
∆h
FE4
(1)
±25 percent change
from initial reading.
(1) Devices which exceed the table I limits herein for this test shall not be accepted.
MIL-PRF-19500/255AA
w/AMENDMENT 1
17
TABLE I. Group A inspection.
Inspecti on 1/
MIL-STD-750
Limit
Unit
Method
Conditions
Symbol
Min
Max
Subgroup 1 2/
Visual and mechanical
examination 3/
2071
Solderability 3/ 4/
Resistanc e to solvents
3/ 4/ 5/
2026
1022
n = 15 leads, c = 0
n = 15 devices, c = 0
Salt atmosphere (c orrosion)
1041
n = 6 devices, c = 0, (For laser
marked devices only)
Temp cycling 3/ 4/
1051
Test condition C, 25 cycles.
n = 22 devices, c = 0
Hermetic seal 4/ 6/
1071
n = 22 devices, c = 0
Fine leak
Gross leak
Electrical measurements 4/
Table I, subgroup 2
Bond strength 3/ 4/
2037
Precondition
TA = +250°C at t = 24 hours or
TA = +300°C at t = 2 hours
n = 11 wires, c = 0
Decap internal visual (des ign
verification) 4/
2075
n = 4 devices, c = 0
Subgroup 2
Thermal impedance 7/
3131
See 4.3.3
ZθJX
°C/W
Collector to base cutoff current
3036
Bias condition D; VCB = 75 V dc
ICBO1
10
µA dc
Emitter to base cutoff current
3061
Bias condition D; VEB = 6 V dc IEBO1
10
µA dc
Breakdown voltage, collector to
emitter
3011
Bias condition D; I
C
= 10 mA dc;
pulsed (see 4.5.1)
V
(BR)CEO
50
V dc
Collector to emitter
cutoff current
3041
Bias condition C; VCE = 50 V dc ICES
50
nA dc
Collector to base cutoff current
3036
Bias condition D; V
CB
= 60 V dc
I
CBO2
10
nA dc
Emitter to base cutoff current
3061
Bias condition D; VEB = 4 V dc
IEBO2
10
nA dc
Forward-current transf er rat i o
3076
VCE = 10 V dc; IC = 0.1 mA dc
hFE1
2N2221A, AL, UA, UB, UBC,
UBN, and UBCN
30
2N2222A, AL, UA, UB, UBC,
UBN, and UBCN
50
See footnotes at end of table.
*
MIL-PRF-19500/255AA
w/AMENDMENT 1
18
TABLE I. Group A inspection - Continued.
Inspecti on 1/
MIL-STD-750
Limit
Unit
Method
Conditions
Symbol
Min
Max
Subgroup 2 - Continued
Forward-current transf er rat i o
3076
VCE = 10 V dc; IC = 1.0 mA dc
hFE2
2N2221A, AL, UA, UB, UBC,
UBN, and UBCN
35
150
2N2222A, AL, UA, UB, UBC,
UBN, and UBCN
75
325
Forward-current transf er rat i o
3076
VCE = 10 V dc; IC = 10 mA dc
hFE3
2N2221A, AL, UA, UB, UBC,
UBN, and UBCN
40
2N2222A, AL, UA, UB, UBC,
UBN, and UBCN
100
Forward-current transf er rat i o
3076
V
CE
= 10 V dc; I
C
= 1 50 mA dc;
pulsed (see 4.5.1)
h
FE4
2N2221A, AL, UA, UB, UBC,
UBN, and UBCN
40
120
2N2222A, AL, UA, UB, UBC,
UBN, and UBCN
100
300
Forward-current transf er rat i o
3076
VCE = 10 V dc; IC = 500 mA dc ;
pulsed (see 4.5.1)
hFE5
2N2221A, AL, UA, UB, UBC,
UBN, and UBCN
20
2N2222A, AL, UA, UB, UBC,
UBN, and UBCN
30
Collector-emitter saturation
voltage
3071
IC = 150 mA dc; IB = 15 mA dc;
pulsed (see 4.5.1)
VCE(sat)1
0.3
V dc
Collector-e mitter saturation
voltage
3071
IC = 500 mA dc; IB = 50 mA dc;
pulsed (see 4.5.1)
VCE(sat)2
1.0
V dc
Base-emitt er saturati on
voltage
3066
Test condition A; IC = 150 mA dc;
IB = 15 mA dc; pulsed (see 4.5.1)
VBE(sat)1
0.6
1.2
V dc
Base-emitt er saturati on
voltage
3066
Test condition A; IC = 500 mA dc;
IB = 50 mA dc; pulsed (see 4.5.1)
VBE(sat)2
2.0
V dc
See footnotes at end of table.
MIL-PRF-19500/255AA
w/AMENDMENT 1
19
TABLE I. Group A inspection - Continued.
Inspecti on 1/
MIL-STD-750
Limit
Unit
Method
Conditions
Symbol
Min
Max
Subgroup 3
High temperature operation
TA = +150°C
Collector to base cutoff current
3036
Bias condition D; V
CB
= 60 V dc
I
CBO3
10
µA dc
Low temperature operat i on
T
A
= -55°C
Forward-current transf er rat i o
3076
V
CE
= 10 V dc; I
C
= 1 0 m A dc
h
FE6
2N2221A, AL, UA, UB, UBC,
UBN, and UBCN
15
2N2222A, AL, UA, UB, UBC,
UBN, and UBCN
35
Subgroup 4
Small-signal short-circuit
forward current trans f er ratio
3206
V
CE
= 10 V dc; I
C
= 1 mA dc;
f = 1 kHz
h
fe
2N2221A, AL, UA, UB, UBC,
UBN, and UBCN
30
2N2222A, AL, UA, UB, UBC,
UBN, and UBCN
50
Magnitude of small-signal
short- circuit forward current
transf e r ratio
3306
V
CE
= 20 V dc; I
C
= 2 0 m A dc ;
f = 100 MHz
|h
fe
|
2.5
Open circuit output
capacitance
3236
V
CB
= 10 V dc; I
E
= 0;
100 kHz
≤
f
≤
1 MHz
C
obo
8
pF
Input capacitance (output
open-circuited)
3240
V
EB
= 0.5 V dc; I
C
= 0;
100 kHz
≤
f
≤
1 MHz
C
ibo
25
pF
Saturated turn-on time
(See figure 17)
ton
35
ns
Saturated turn-off time
(See figure 18)
t
off
300
ns
Subgroups 5 and 6
Not required
1/ For sampling pla n see MIL-PRF-19500.
2/ For resubmission of failed test in subgroup 1 of table I, do uble the sa mple size of the fail ed test or sequence of
tests. A failure in table I, subgroup 1 shall not require retest of the entire subgroup. Only the failed test shall be
rerun upon submi ssion.
3/ Separate samples may be used .
4/ Not required for JANS devices.
5/ Not required for laser marked devices.
6/ This hermetic seal test is an end-point to temp-cycling in addit ion to elec tric al mea surements.
7/ This test required for the following end-point measurements only:
Group B, subgroup 3, 4, and 5 (JANS).
Group B, step 1 (TX and TXV).
Group C, subgroup 2 and 6.
MIL-PRF-19500/255AA
w/AMENDMENT 1
20
TABLE II. Group D inspection.
Inspecti on 1/ 2/ 3/
MIL-STD-750
Limit
Unit
Method
Conditions
Symbol
Min
Max
Subgroup 1 4/
Neutron irradiati on
1017
Neutron exposure V
CES
= 0V
Collector to base cutoff current
3036
Bias condition D; VCB = 75 V dc
ICBO1
20
µA dc
Emitter to base cutoff current
3061
Bias condition D; V
EB
= 6 V dc
I
EBO1
20
µA dc
Breakdown voltage, collector to
emitter
3011
Bias condition D; I
C
= 10 mA dc;
pulsed (see 4.5.1)
V
(BR)CEO
50
V dc
Collector to emitter
cutoff current
3041
Bias condition C; V
CE
= 50 V dc
I
CES
100
nA dc
Collector to base cutoff current
3036
Bias condition D; V
CB
= 60 V dc
I
CBO2
20
nA dc
Emitter to base cutoff current
3061
Bias condition D; V
EB
= 4 V dc
I
EBO2
20
nA dc
Forward-current transf er ratio
3076
VCE = 10 V dc; IC = 0.1 mA dc
[hFE1] 5/
M through H2N2221A
[15]
M through H2N2222A
[25]
Forward-current transf er rat i o
3076
VCE = 10 V dc; IC = 1.0 mA dc
[hFE2] 5/
M through H2N2221A
[17.5]
150
M through H2N2222A
[37.5]
325
Forward-current transf er ratio
3076
VCE = 10 V dc; IC = 10 mA dc
[hFE3] 5/
M through H2N2221A
[20]
M through H2N2222A
[50]
Forward-current transf er ratio
3076
VCE = 10 V dc; IC = 150 mA dc
[hFE4] 5/
M through H2N2221A
[20]
120
M through H2N2222A
[50]
300
Forward-current transf er ratio
3076
VCE = 10 V dc; IC = 500 mA dc
[hFE5] 5/
M through H2N2221A
[10]
M through H2N2222A
[15]
Collector-emitter saturation
voltage
3071
IC = 150 mA dc; IB = 15 mA dc VCE(sat)1
.35
V dc
Collector-emitter saturation
voltage
3071
I
C
= 5 00 mA dc; I
B
= 50 mA dc
V
CE(sat)2
1.15
V dc
Base-emitt er saturati on voltage
3066
Test condition A; IC = 150 mA dc;
IB = 15 mA dc; pulsed (see 4.5.1)
VBE(sat)1
0.6
1.38
V dc
Base-emitt er saturati on voltage
3066
Test condition A; IC = 500 mA dc;
IB = 50 mA dc; pulsed (see 4.5.1)
VBE(sat)2
2.3
V dc
See footnotes at end of table.
MIL-PRF-19500/255AA
w/AMENDMENT 1
21
TABLE II. Group D inspection - Continued.
Inspecti on 1/ 2/ 3/
MIL-STD-750
Limit
Unit
Method
Conditions
Symbol
Min
Max
Subgroup 2
Total dose irradiation
1019
Gamma exposure V
CES
= 4 0 V
Condition A
Collector to base cutoff current
3036
Bias condition D; V
CB
= 75 V dc
I
CBO1
20
µA dc
Emitter to base cutoff current
3061
Bias condition D; VEB = 6 V dc IEBO1
20
µA dc
Breakdown voltage, collector to
emitter
3011
Bias condition D; I
C
= 10 mA dc;
pulsed (see 4.5.1)
V
(BR)CEO
50
V dc
Collector to emitter
cutoff current
3041
Bias condition C; VCE = 50 V dc ICES
100
nA dc
Collector to base cutoff current
3036
Bias condition D; V
CB
= 60 V dc
I
CBO2
20
nA dc
Emitter to base cutoff current
3061
Bias condition D; VEB = 4 V dc IEBO2
20
nA dc
Forward-current transf er ratio
3076
VCE = 10 V dc; IC = 0.1 mA dc
[hFE1] 5/
M through H2N2221A
[15]
M through H2N2222A
[25]
Forward-current transf er rat i o
3076
VCE = 10 V dc; IC = 1.0 mA dc
[hFE2] 5/
M through H2N2221A
[17.5]
150
M through H2N2222A
[37.5]
325
Forward-current transf er rat i o
3076
VCE = 10 V dc; IC = 10 mA dc
[hFE3] 5/
M through H2N2221A
[20]
M through H2N2222A
[50]
Forward-current transf er rat i o
3076
VCE = 10 V dc; IC = 150 mA dc
[hFE4] 5/
M through H2N2221A
[20]
120
M through H2N2222A
[50]
300
Forward-current transf er rat i o
3076
VCE = 10 V dc; IC = 500 mA dc
[hFE5] 5/
M thr ough H2N2221A
[10]
M through H2N2222A
[15]
Collector-emitter saturation
voltage
3071
I
C
= 1 50 mA dc; I
B
= 15 mA dc
V
CE(sat)1
.35
V dc
Collector-emitter saturation
voltage
3071
I
C
= 500 mA dc; I
B
= 50 mA dc
V
CE(sat)2
1.15
V dc
See footnotes at end of table.
MIL-PRF-19500/255AA
w/AMENDMENT 1
22
TABLE II. Group D inspection - Continued.
Inspecti on 1/ 2/ 3/
MIL-STD-750
Limit
Unit
Method
Conditions
Symbol
Min
Max
Subgroup 2 - Continued
Base-emitt er saturati on voltage
3066
Test condition A; IC = 150 mA dc;
IB = 15 mA dc; pulsed (see 4.5.1)
VBE(sat)1
0.6
1.38
V dc
Base-emitt er saturati on voltage
3066
Test condition A; IC = 500 mA dc;
IB = 50 mA dc; pulsed (see 4.5.1)
VBE(sat)2
2.3
V dc
1/ Tests to be performed on all devices receiving radiation exposure.
2/ For sampling plan, see MIL-PRF-19500.
3/ Electrical characteristics apply to the corresponding AL, UA, UB, UBC, UBN, and UBCN suffix versions unless
otherwise noted.
4/ See 6.2.g herein.
5/ See met hod 101 9 of MIL-STD-750 for how to determine [hFE] by first calcula ting the delta (1/hFE) from the pre-
and Post-radiation hFE. Notice the [hFE] is not the same as hFE and cannot be measured directly. The [hFE]
value can never exceed the pre-radiation minimum hFE that it is based upon.
MIL-PRF-19500/255AA
w/AMENDMENT 1
23
TABLE III. Group E inspection (all quality levels) - for qualification or re-qua lif i cat ion only .
Inspection
MIL-STD-750
Qualification
Method
Conditions
Subgroup 1
45 devices
c = 0
Temperature c ycling
(air to air)
1051
Test condition C, 500 cycles
Hermetic seal
1071
Fine leak
Gross leak
Electrical measurements
See table I, subgroup 2 and 4.5.3 herein
Subgroup 2
Intermittent life
1037
Intermittent operation life: VCB = 10 V dc, 6,000 cycles. Adjust
device current, or power, to achi eve a minimum ∆TJ of +100°C
45 devices
c = 0
Electrical measurements
See table I, subgroup 2 and 4.5.3 herein
Subgroup 4
Thermal resistanc e
3131
RθJSP(IS) can be calculated but shall be measured once in the
same package with a similar die size to confirm calc ulati ons
(may apply to multiple specification sheets)
RθJSP(AM) need be calculated only
15 devices,
c = 0
Thermal impedance
curves
See MIL-PRF-19500, table E-IX, group E, subgroup 4
Sample size
N/A
Subgroup 5
Not applicable
Subgroup 6
Electrostat ic discharge
(ESD)
1020
Subgroup 8
45 devices
c = 0
Reverse stability
1033
Condition B
MIL-PRF-19500/255AA
w/AMENDMENT 1
24
NOTES:
1. This is the true inverse of the worst case thermal resistance value. All devices are capable of operating at ≤ TJ
specified on this curve. Any parallel line to this curve will intersect the appropriate power for the desired
maximum TJ allowed.
2. Derate design curve constrained by the maximum junction temperature (TJ ≤ 200°C) and power rating
specified. (See 1.3 herein.)
3. Derate design curve chosen at TJ ≤ 150°C, where the maximum temperature of electrical test is performed.
4. Derate design curve chosen at TJ ≤ 125°C, and 110°C to show power rating where most users want to limit TJ
in their application.
FIGURE 7. Temperature-power derating for 2N2221A, 2N2221AL, 2N2222A, and 2N2222AL (TO-18 package).
MIL-PRF-19500/255AA
w/AMENDMENT 1
25
NOTES:
1. This is the true inverse of the worst case thermal resistance value. All devices are capable of operating at ≤ TJ
specified on this curve. Any parallel line to this curve will intersect the appropriate power for the desired
maximum TJ allowed.
2. Derate design curve constrained by the maximum junction temperatures and power rating specified. (See 1.3
herein.)
3. Derate design curve chosen at TJ ≤ +150°C, where the maximum temperature of electrical test is performed.
4. Derate design curve chosen at TJ ≤ +125°C, and +110°C to show power rating where most users want to limit
TJ in their application.
FIGURE 8. Temperature-power derating for 2N2221A, 2N2221AL, 2N2222A, and 2N2222AL
(TO-18 package case base m ounte d) .
MIL-PRF-19500/255AA
w/AMENDMENT 1
26
NOTES:
1. This is the true inverse of the worst case thermal resistance value. All devices are capable of operating at ≤ TJ
specified on this curve. Any parallel line to this curve will intersect the appropriate power for the desired
maximum TJ allowed.
2. Derate design curve constrained by the maximum junction temperatures and power rating specified. (See 1.3
herein.)
3. Derate design curve chosen at TJ ≤ +150°C, where the maximum temperature of electrical test is performed.
4. Derate design curve chosen at TJ ≤ +125°C, and +110°C to show power rating where most users want to limit
TJ in their application.
FIGURE 9. Temperature-power derating for 2N2221AUA and 2N2222AUA.
MIL-PRF-19500/255AA
w/AMENDMENT 1
27
NOTES:
1. This is the true inverse of the worst case thermal resistance value. All devices are capable of operating at ≤ TJ
specified on this curve. Any parallel line to this curve will intersect the appropriate power for the desired
maximum TJ allowed.
2. Derate design curve constrained by the maximum junction temperatures and power rating specified. (See 1.3
herein.)
3. Derate design curve chosen at TJ ≤ +150°C, where the maximum temperature of electrical test is performed.
4. Derate design curve chosen at TJ ≤ +125°C, and +110°C to show power rating where most users want to limit
TJ in their application.
FIGURE 10. Temperature-power derating for 2N2221AUA and 2N2222AUA.
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NOTES:
1. This is the true inverse of the worst case thermal resistance value. All devices are capable of operating at ≤ TJ
specified on this curve. Any parallel line to this curve will intersect the appropriate power for the desired
maximum TJ allowed.
2. Derate design curve constrained by the maximum junction temperatures and power rating specified. (See 1.3
herein.)
3. Derate design curve chosen at TJ ≤ +150°C, where the maximum temperature of electrical test is performed.
4. Derate design curve chosen at TJ ≤ +125°C, and +110°C to show power rating where most users want to limit
TJ in their application.
FIGURE 11. Temperature-power derating curve for 2N2221AUB and UBN and 2N2222AUB and UBCN.
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FIGURE 12. Thermal impedance graph (RθJA) for 2N2221A, 2N2221AL, 2N2222A, and 2N2222AL (TO-18).
Maximum Thermal Impedance
1
10
100
1000
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
Time (s)
Theta (C/W)
2N2221A and 2N2222A T0-18 package with 0.125" lead mount
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FIGURE 13. Thermal impedance graph (RθJC) for 2N2221A, 2N2221AL, 2N2222A, and 2N2222AL (TO-18).
Maximum Thermal Impedance
1
10
100
1000
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
Time (s)
Theta (C/W)
2N2221A and 2N2222A T0-18 package with case base in copper heat sink
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FIGURE 14. Thermal impedance graph (RθJSP(AM)) for 2N2221AUA and 2N2222AUA.
Maximum Thermal Impedance
1
10
100
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
Time (s)
Theta (C/W)
2N2221AUA and 2N2222AUA 4 points solder pad (adhesive mount to PCB)
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FIGURE 15. Thermal impedance graph (RθJSP(IS)) for 2N2221AUA and 2N2222AUA.
Maximum Thermal Impedance
1
10
100
1000
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
Time (s)
Theta (C/W)
2N2221AUA and 2N2222AUA 4 points solder pads (infinite sink mount to PCB)
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FIGURE 16. Thermal impedance graph (RθJSP(IS)) for 2N2221AUB and UBN and 2N2222AUB and UBCN.
Maximum Thermal Impedance
1
10
100
1000
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
Time (s)
Theta (C/W)
2N2221AUB and 2N2222AUB 3 points solder pad (infinite sink mount) to PCB
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NOTES:
1. The rise time (tr) of the applied pulse shall be ≤ 2.0 ns, duty cycle ≤ 2 percent, and the generator source
impedance sha ll be 50 Ω.
2. Sampling oscilloscope: ZIN ≥ 100 k Ω, CIN ≤ 12 pF, rise time ≤ 5 ns.
FIGURE 17. Saturated turn-on switching time test circuit.
NOTES:
1. The rise time (tr) of the applied pulse shall be ≤ 2.0 ns, duty cycle ≤ 2 percent, and the generator source
impedance shall be 50 Ω.
2. Sampling oscilloscope: ZIN ≥ 100 k Ω, CIN ≤ 12 pF, rise time ≤ 5 ns.
3. Alternate test point for high impedance attenuating probe.
FIGURE 18. Saturated turn-off switching time test circuit.
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5. PACKAGING
5.1 Packaging. For acquisition purposes, the packaging requirements shall be as specified in the contract or
order (see 6.2). When packaging of materiel is to be performed by DoD or in-house contractor personnel, these
personnel need to contact the responsible packaging activity to ascertain packaging requirements. Packaging
requirements are maintained by the Inventory Control Point's packaging activities within the Military Service or
Defense Agency, or within the Military Service’s system commands. Packaging data retrieval is available from the
managing Military Department's or Defense Agency's automated packaging files, CD-ROM products, or by contacting
the responsi ble packaging acti v ity .
6. NOTES
(This section contains information of a general or explanatory nature that may be helpful, but is not mandatory.
The notes specified in MIL-PRF-19500 are applicable to this specification.)
6.1 Inten ded use. Semiconductors conforming to this specification are intended for original equipment design
applications and logistic support of existing equipment.
6.2 Acqui sit ion requ ir e ment s. Acquisition documents should specify the following:
a. Title, number, and date of this specif ica tio n.
b. Packaging requirements (see 5.1).
c. Lead finish (see 3.4.1).
d. Product assurance level and type designator.
e. For die acquisition, the JANHC or JANKC letter version shall be specified (see figures 4, 5, and 6) as well as
the RHA designer, if applicable. The JANHCA/JANKCA die version is obsolete as of the date of this revision.
Other letter versions should be used.
f. Surface mount designation if applicable.
g. For acquisition of RHA designated devices, table II, subgroup 1 testing of group D herein is optional. If
subgroup 1 is desired, it must be specified in the contract.
6.3 Qualification. With respect to products requiring qualification, awards will be made only for products which
are, at the time of award of contract, qualified for inclusion in Qualified Manufacturers List (QML 19500) whether or
not such products have actually been so listed by that date. The attention of the contractors is called to these
requirements, and manufacturers are urged to arrange to have the products that they propose to offer to the Federal
Government tested for qualification in order that they may be eligible to be awarded contracts or orders for the
products covered by this specification. Information pertaining to qualification of products may be obtained from DLA
Land and Maritime, ATTN: VQE, P.O. Box 3990, Columbus, OH 43218-3990 or e-mail vqe.chief@dla.mil. An online
listing of products qualified to this specification may be found in the Qualified Products Database (QPD) at
https://assist.dla.mil.
6.4 Supersession data. Devices covered by this specification supersede the manufacturers' and users' Part or
Identifying Number (PIN). The term PIN is equivalent to the term part number which was previously used in this
specification. This information in no way implies that manufacturers' PIN's are suitable as a substitute for the military
PIN.
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6.5 Suppliers of JANHC and JANKC die. The qualified JANHC and JANKC suppliers with the applicable letter
version (example JANHCB2N2221A) will be identified on the QML. The JANHCA/JANKCA die version is obsolete as
of the date of this revision.
Die ordering information (1)
PIN
Manufacturer
43611
34156
52GC4
2N2221A
2N2222A
JANHCB2N2221A
JANHCB2N2222A
JANHCC2N2221A
JANHCC2N2222A
JANHCD2N2221A
JANHCD2N2222A
(1) For JANKC level, replace JANHC with JANKC.
6.6 PIN constr u ctio n ex ample .
6.6.1 Encapsulated devices The PINs for encapsulated devices are constructed using the following form.
JANS M 2N 2221 AUB
JAN certification mark and quality level (see 1.5.1.1)
RHA designator (see 1.5.2)
First number and first letter symbols (see 1.5.3.1)
Second number symbols (see 1.5.3.2)
Suffix symbol (see 1.5.4)
6.6.2 Unencapsulated devices. The PINs for un-encapsulated devices are constructed using the following form.
JANHC B M 2N 2221 A
JAN certificat ion mark and quality level (see 1.5.1.2)
Die identifier for unencapsulated devices (see 1.5.6)
RHA designator (see 1.5.2)
First number and first letter symbols (see 1.5.3.1)
Second number symbols (see 1.5.3.2)
Suffix symbol (see 1.5.4)
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6.7 List of PINs.
6.7.1 PINs for encapsulated devices. The following is a list of possible PINs for encapsulated devices available on
this specific atio n sheet .
PINs for type 2N2221A and 2N2222A.
JAN2N2221A
JANTX2N2221A
JANTXV#2N2221A
JANS#2N2221A
JAN2N2222A
JANTX2N2222A
JANTXV#2N2222A
JANS#2N2222A
JAN2N2221AL JANTX2N2221AL JANTXV#2N2221AL JANS#2N2221AL
JAN2N2222AL JANTX2N2222AL JANTXV#2N2222AL JANS#2N2222AL
JAN2N2221AUA
JANTX2N2221AUA
JANTXV#2N2221AUA
JANS#2N2221AUA
JAN2N2222AUA
JANTX2N2222AUA
JANTXV#2N2222AUA
JANS#2N2222AUA
JAN2N2221AUB
JANTX2N2221AUB
JANTXV#2N2221AUB
JANS#2N2221AUB
JAN2N2222AUB
JANTX2N2222AUB
JANTXV#2N2222AUB
JANS#2N2222AUB
JAN2N2221AUBC JANTX2N2221AUBC JANTXV#2N2221AUBC JANS#2N2221AUBC
JAN2N2222AUBC JANTX2N2222AUBC JANTXV#2N2222AUBC JANS#2N2222AUBC
JAN2N2221AUBN
JANTX2N2221AUBN
JANTXV#2N2221AUBN
JANS#2N2221AUBN
JAN2N2222AUBN
JANTX2N2222AUBN
JANTXV#2N2222AUBN
JANS#2N2222AUBN
JAN2N2221AUBCN
JANTX2N2221AUBCN
JANTXV#2N2221AUBCN
JANS#2N2221AUBCN
JAN2N2222AUBCN
JANTX2N2222AUBCN
JANTXV#2N2222AUBCN
JANS#2N2222AUBCN
(1) The number sign (#) represent one of eight RHA designators available (M, D, P, L, R, F, G, or H). The PIN is
also available without a RHA designator.
6.7.2 PINs for unencapsulated devices (die). The following is a list of possible PINs for unencapsulated devices
available on this spe cif ica tio n shee t.
Quality level HC Quality level KC
JANHCB#2N2221A JANKCB#2N2221A
JANHCB#2N2222A JANKCB#2N2222A
JANHCC#2N2221A JANKCC#2N2221A
JANHCC#2N2222A JANKCC#2N2222A
JANHCD#2N2221A JANKCD#2N2221A
JANHCD#2N2222A JANKCD#2N2222A
(1) The number sign (#) represents one of eight RHA designators available (M, D, P, L, R, F, G, or H). The PIN is
also available without a RHA designator.
6.8 Changes from previous issue. The margins of this specification are marked with asterisks to indicate where
changes from the previous issue were made. This was done as a convenience only and the Government assumes
no liability whatsoever for any inaccuracies in these notations. Bidders and contractors are cautioned to evaluate the
requirements of this document based on the entire content irrespective of the marginal notations and relationship to
the previous issue.
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Custodians: Preparing activity:
Army - CR DLA - CC
Navy - EC
Air Force - 85 (Project 5961-2016-039)
NASA - NA
DLA - CC
Review activities:
Army - AR, MI, SM
Navy - AS, MC
Air Force - 19, 71, 99
NOTE: The activities listed above were interested in this document as of the date of this document. Since
organizations and responsibilities can change, you should verify the currency of the information above using the
ASSIST Online database at https://assist.dla.mil.
