MCO100-12io1
Single Thyristor
Thyristor
31/4
2
Part number
MCO100-12io1
Backside: isolated
TAV
T
VV1.3
RRM
101
1200
=
V= V
I= A
Features / Ad vantages: Applications: Package:
● Thyristor for line frequency
● Planar passivated chip
● Long-term stability
● Line rectifying 50/60 Hz
● Softstart AC motor control
● DC Motor control
● Power converter
● AC power control
● Lighting and temperature control
SOT-227B (minibloc)
● Industry standard outline
● RoHS compliant
● Epoxy meets UL 94V-0
● Base plate: Copper
internally DCB isolated
● Advanced power cycling
● Isolation Voltage: V~
3000
IXYS reserves the right to change limits, conditions and dimensions. 20140123aData according to IEC 60747and per semiconductor unless otherwise specified
© 2014 IXYS all rights reserved
MCO100-12io1
V = V
kA²s
kA²s
kA²s
kA²s
Symbol Definition
Ratings
typ. max.
I
V
IA
V
T
1.31
R0.35 K/W
min.
101
VV
100T = 25°C
VJ
T = °C
VJ
mA10V = V
T = 25°C
VJ
I = A
T
V
T = °C
C
80
P
tot
350 WT = 25°C
C
100
1200
forward voltage drop
total power dissipation
Conditions Unit
1.66
T = 25°C
VJ
125
V
T0
V0.85T = °C
VJ
150
r
T
4.5 mΩ
V1.30T = °C
VJ
I = A
T
V
100
1.74
I = A200
I = A200
threshold voltage
slope resistance for power loss calculation only
µA
125
VV1200T = 25°C
VJ
IA160
P
GM
Wt = 30 µs 10
max. gate power dissipation
P
T = °C
C
150
Wt = 5
P
P
GAV
W0.5
average gate power dissipation
C
J
74
j
unction capacitance V = V400 T = 25°Cf = 1 MHz
RVJ
pF
I
TSM
t = 10 ms; (50 Hz), sine T = 45°C
VJ
max. forward surge current
T = °C
VJ
150
I²t T = 45°C
value for fusing
T = °C150
V = 0 V
R
V = 0 V
R
V = 0 V
V = 0 V
t = 8,3 ms; (60 Hz), sine
t = 10 ms; (50 Hz), sine
t = 8,3 ms; (60 Hz), sine
t = 10 ms; (50 Hz), sine
t = 8,3 ms; (60 Hz), sine
t = 10 ms; (50 Hz), sine
t = 8,3 ms; (60 Hz), sine
VJ
R
VJ
R
thJC
thermal resistance junction to case
T = °C
VJ
150
1.40
1.51
7.08
6.87
kA
kA
kA
kA
1.19
1.29
9.80
9.49
1200
300 µs
RMS forward current
T(RMS)
TAV
180° sine
average forward current
(di/dt)
cr
A/µs
150repetitive, I =T
VJ
= 150°C; f = 50 Hz
critical rate of rise of current
V
GT
gate trigger voltage V= 6 V T = °C25
(dv/dt) T=150°C
critical rate of rise of voltage
A/µs500
V/µs
t = µs;
IA;V = ⅔ V
R = ∞; method 1 (linear voltage rise)
VJ
DVJ
300 A
T
P
G
=0.3
di /dt A/µs;
G
=0.3
DDRM
cr
V = ⅔ V
D DRM
GK
1000
1.5 V
T= °C-40
VJ
I
GT
gate trigger current V= 6 V T = °C25
DVJ
100 mA
T= °C-40
VJ
1.6 V
200 mA
V
GD
gate non-trigger voltage T= °C
VJ
0.2 V
I
GD
gate non-trigger current 10 mA
V = ⅔ V
D DRM
150
latching current T= °C
VJ
450 mAI
L
25tµs
p
=10
IA;
G
= 0.3 di /dt A/µs
G
=0.3
holding current T= °C
VJ
200 mAI
H
25V= 6 V
D
R = ∞
GK
gate controlled delay tim e T= °C
VJ
2µst
gd
25
IA;
G
= 0.3 di /dt A/µs
G
=0.3
V = ½ V
D DRM
turn-off time T= °C
VJ
150 µst
q
di/dt = A/µs;10 dv/dt = V/µs;15
V =
R
100 V; I A;
T
= 100 V = ⅔ V
D DRM
tµs
p
= 200
non-repet., I = 100 A
T
150
R
thCH
thermal resistance case to heatsink K/W
Thyristor
1300
RRM/DRM
RSM/DSM
max. non-repetitive reverse/forward blocking voltage
max. re pe titive reverse/forward bl ocking volt a ge
R/D
reverse current, drain current
T
T
R/D
R/D
200
0.10
IXYS reserves the right to change limits, conditions and dimensions. 20140123aData according to IEC 60747and per semiconductor unless otherwise specified
© 2014 IXYS all rights reserved
MCO100-12io1
1)
I
RMS
is typically limited by the pin-to-chip resistance (1); or by the current capability of the chip (2). In case of (1) and a product
with multiple pins for one chip-potential, the current capability can be increased by connecting the pins as one contact.
Ratings
abcdZyyww
XXXXX
Product Marking
Logo Part No.
DateCode Assembly Code
Assembly Line
®
Package
T
op
°C
M
D
Nm1.5
mounting torque 1.1
T
VJ
°C150
virt ua l j un ctio n temp eratu re -40
Weight g30
Symbol Definition typ. max.min.Conditions
operation temperature
Unit
M
T
Nm1.5
terminal torque 1.1
VV
t = 1 second
V
t = 1 minute
isolation voltage
mm
mm
10.5 3.2
8.6 6.8
d
Spp/App
creepage distance on surface | striking distance through air
d
Spb/Apb
terminal to backside
I
RMS
RMS current 150 A
per terminal
125-40
terminal to terminal
SOT-227B
(
minibloc
)
Delivery Mode Quantity Code No.Part Number Marking on ProductOrdering
1
)
50/60 Hz, RMS; I ≤ 1 mA
ISOL
MCO100-12io1 500605Tube 10MCO100-12io1Standard
3000
ISOL
T
stg
°C150
storage temperature -40
2500
threshold voltage V0.85
mΩ
V
0 max
R
0 max
slope resistance * 2.4
Equivalent Circuits for Simulation
T =
VJ
IV
0
R
0
Thyristor
150 °C
* on die level
IXYS reserves the right to change limits, conditions and dimensions. 20140123aData according to IEC 60747and per semiconductor unless otherwise specified
© 2014 IXYS all rights reserved
MCO100-12io1
31/4
2
Outlines SOT-227B (minibloc)
IXYS reserves the right to change limits, conditions and dimensions. 20140123aData according to IEC 60747and per semiconductor unless otherwise specified
© 2014 IXYS all rights reserved
MCO100-12io1
0.01 0.1 1
400
600
800
1000
1200
0.4 0.8 1.2 1.6 2.0
0
40
80
120
160
200
10
0
10
1
10
2
10
3
10
4
0.0
0.1
0.2
0.3
0.4
ITSM
[A]
IT
[A]
VT [V]
t[ms]
ZthJC
[K/W]
23456789011
1000
10000
I2t
[A2s]
t[ms]
IT(AV)M
[A]
TC[°C]
0 255075100125150
0
20
40
60
80
100
120
140
160
180
Fig. 1 Forward characteristics Fig. 3 I2t versus time (1-10 ms)
t[s]
Fig. 6 Max. forward current
at case temperature
Fig. 2 Surge overload current
Fig. 8 Transient thermal impedance
T
VJ
=25°C
T
VJ
= 125°C
T
VJ
=45°C
50 Hz, 80% V
RRM
T
VJ
=125°C
T
VJ
= 45°C
V
R
=0 V
125°C
150°C
0 20406080100120
0
50
100
150
200
IF(AV) [A]
P(AV)
[W]
Fig. 7a Power dissipation versus direct output current
Fi
g
. 7b and ambient tem
p
erature
0 50 100 150
Tamb [°C]
dc =
1
0.5
0.4
0.33
0.17
0.08
10 100 1000
1
10
100
1000
1 10 100 1000 10000
0.1
1
10
IG[mA]
VG
[V]
tgd
[μs]
IG[mA]
typ. Limit
T
VJ
=125°C
Fig. 4 Gate trigger characteristics Fig. 5 Gate controlled delay time
dc =
1
0.5
0.4
0.33
0.17
0.08
6
4
5
2
1
3
4: P
GAV
=0.5W
5: P
GM
=5W
6: P
GM
=10W
1: I
GD
,T
VJ
=125°C
2: I
GT
,T
VJ
=25°C
3: I
GT
,T
VJ
=-40°C
IGD,T
VJ =125°C
R
thHA
0.2
0.4
0.6
0.8
1.0
2.0 R
thi
[K/W] t
i
[s]
0.025 0.011
0.030 0.002
0.050 0.027
0.085 0.500
0.160 0.180
Thyristor
IXYS reserves the right to change limits, conditions and dimensions. 20140123aData according to IEC 60747and per semiconductor unless otherwise specified
© 2014 IXYS all rights reserved
