Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer
'
s products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer
'
sproductsor
equipment.
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
52307 MS IM / 30707 MS IM 20061220-S00008 No.A0694-1/8
LV5113T
Overview
The LV5113T is a protection IC for 2-cell lithium-ion secondary batteries.
Features
• Monitoring function for each cell: Detects overcharge and over-discharge conditions and controls the
charging and discharging operation of each cell.
• High detection voltage accuracy: Over-charge detection accuracy ±25mV
Over-discharge detection accuracy ±100mV
• Hysteresis cancel function: The hysteresis of over-discharge detection voltage is canceled by sensing
the connection of a load after overcharging has been detected.
• Discharge current monitoring function: Detects over-currents, load shorting, and excessively high voltage of a
charger and regulates charging and discharging operations.
• Low current consumption: Normal operation mode typ. 6.0µA
Stand by mode max. 0.2µA
• 0V cell charging function: Charging is enabled even when the cell voltage is 0V by giving a
potential difference between the VDD pin and V- pin.
Ordering number : ENA0694A
CMOS IC
2-Cell Lithium-Ion Secondary Battery
Protection IC
LV5113T
No.A0694-2/8
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter Symbol Conditions Ratings Unit
Power supply voltage VDD -0.3 to +12 V
Input voltage
Charger minus voltage
V- V
DD-28 to VDD+0.3 V
Cout pin voltage Vcout VDD-28 to VDD+0.3 V Output voltage
Dout pin voltage Vdout VSS-0.3 to VDD+0.3 V
Allowable power dissipation Pd max Independent IC 170 mW
Operating ambient temperature Topr -30 to +80 °C
Storage temperature Tstg -40 to +125 °C
Electrical Characteristics at Ta = 25°C, unless especially specified.
Ratings
Parameter Symbol Conditions
min typ max
Unit
Operation input voltage Vcell Between VDD and VSS 1.5 10 V
0V cell charging minimum operation
voltage
Vmin Between VDD-VSS =0 and VDD-V- 1.5 V
Over-charge detection voltage Vd1 4.325 4.350 4.375 V
Over-charge reset voltage Vh1 4.100 4.150 4.200 V
Over-charge detection delay time td1 VDD-Vc=3.5V→4.5V, Vc-VSS=3.5V 0.5 1.0 1.5 s
Over-charge reset delay time tr1 VDD-Vc=4.5V→3.5V, Vc-VSS=3.5V 20.0 40.0 60.0 ms
Over-discharge detection voltage Vd2 2.20 2.30 2.40 V
Over-discharge reset hysteresis voltage Vh2 10.0 20.0 40.0 mV
Over-discharge detection delay time td2 VDD-Vc=3.5V→2.2V, Vc-VSS=3.5V 50 100 150 ms
Over-discharge reset delay time tr2 VDD-Vc=2.2V→3.5V, Vc-VSS=3.5V 0.5 1.0 1.5 ms
Over-current detection voltage Vd3 VDD-Vc=3.5V, Vc-VSS=3.5V 0.17 0.20 0.23 V
Over-current reset hysteresis voltage Vh3 VDD-Vc=3.5V, Vc-VSS=3.5V 5.0 10.0 20.0 mV
Over-current detection delay time td3 VDD-Vc=3.5V, Vc-VSS=3.5V 10.0 20.0 30.0 ms
Over-current reset delay time tr3 VDD-Vc=3.5V, Vc-VSS=3.5V 0.5 1.0 1.5 ms
Short circuit detection voltage Vd4 VDD-Vc=3.5V, Vc-VSS=3.5V 1.0 1.3 1.6 V
Short circuit detection delay time td4 VDD-Vc=3.5V, Vc-VSS=3.5V 0.4 1.0 1.6 ms
Over-charger detection voltage Vd5 Between VDD-Vc=3.5V, Vc-VSS=3.5V
(V-)-VSS
-0.60 -0.45 -0.30 V
Overcharge reset hysteresis voltage Vh5 VDD-Vc=3.5V, Vc-VSS=3.5V 25.0 50.0 100.0 mV
Standby reset voltage Vstb Between VDD-Vc=2.0V, Vc-VSS=2.0V
(V-)-VSS
VDD×0.4 VDD×0.5 VDD×0.6 V
Excessively high voltage charger
detection delay time
td5 VDD-Vc=3.5V, Vc-VSS=3.5V 0.5 1.5 3.0 ms
Excessively high voltage charger reset
delay time
tr5 VDD-Vc=3.5V, Vc-VSS=3.5V
*
0.5 1.5 3.0 ms
Reset resistance (connected to VDD) RDD 100 200 400 kΩ
Reset resistance (connected to VSS) RSS 15 30 60 kΩ
Cout Nch ON voltage VOL1 IOL=50µA, VDD-Vc=4.4V, Vc-VSS=4.4V 0.5 V
Cout Pch ON voltage VOH1 IOL=50µA, VDD-Vc=3.9V, Vc-VSS=3.9V VDD-0.5 V
Dout Nch ON voltage VOL2 IOL=50µA, VDD-Vc=2.2V, Vc-VSS=2.2V 0.5 V
Dout Pch ON voltage VOH2 IOL=50µA, VDD-Vc=3.9V, Vc-VSS=3.9V VDD-0.5 V
Vc input current Ivc VDD-Vc=3.5V, Vc-VSS=3.5V 0.0 1.0 µA
Current drain IDD V
DD-Vc=3.5V, Vc-VSS=3.5V 6.0 13.0 µA
Standby current Istb VDD-Vc=2.2V, Vc-VSS=3.5V 0.2 µA
* Upon connecting to charger upon over-discharge, the delay time after recovery from over-discharge.
LV5113T
No.A0694-3/8
Package Dimensions
unit : mm (typ)
3245B
Pin Assignment
Pin Functions
Pin No. Symbol Description
1 VDD V
DD pin
2 Cout Overcharge detection output pin
3 V- Charger minus voltage input pin
4 VSS V
SS pin
5 Sense Sense pin
6 Vc Intermediate voltage input pin
7 T Pin to shorten detection time (open under normal condition)
8 Dout Overdischarge detection output pin
Pd max -- Ta
-30 -20 0 20 40 60 80 100
68
0
50
100
150
200
170 Independent IC
Ambient temperature, Ta -- °C
Allowable power dissipation, Pd max -- mW
1
VDD 2
Cout 3
V-4
VSS
8 7 6 5
Dout T Vc Sense
Top view
SANYO : MSOP8(150mil)
3.0
1.1MAX
3.0
0.5
4.9
12
8
0.25
0.65
(0.53)
(0.85)
0.125
0.08
LV5113T
No.A0694-4/8
Block Diagram
6
+
-
+
-
+
-
+
-
4
5
+
-
3
td1,tr1
td2,tr2
td3,tr3
+
-
+
-
1
td5,tr5
td4
2
8
VSS V-
Sence VDD
Vc
Cout
Dout
7
T
Level shift
Delay
control
logic
LV5113T
No.A0694-5/8
Functional Description
Over-charge detection
If either of the cell voltage is equal to or more than the over-charge detection voltage, stop further charging by
turning “L” the Cout pin and turning off external Nch MOS FET after the over-charge detection delay time. This
delay time is set by the internal counter.
The over-charge detection comparator has the hysteresis function. Note that this hysteresis can be cancelled by
connecting the load after detection of over-charge detection.
Once over-charge detection is made, over-current detection is not made to prevent malfunction. Note that short-
circuit can be detected.
Over-charge return
If charger is connected and both cell voltages become equal to or lower than the over-charge recovery voltage or
over-charge detection voltage when load is connected, the Cout pin returns to “H” after the over-charge recovery
delay time set by the internal counter.
When load is connected and either cell or both cell voltages are equal to or more than the over-charge detection
voltage, the Cout pin does not return to “H.” When the load current is passed through the external Cout pin parasite
diode of Nch MOS FET after the over-charge recovery delay time and each cell voltage becomes equal to or below
over-charge detection voltage, the Cout returns to “H.”
However, high voltage charger is connected as mentioned below, Cout pin does not return to “H” because over-
charger detection sequence starts after over-charge recovery.
Over-discharge detection
When either cell voltage is equal to or below over-discharge voltage, stop further discharge by turning “L” the Dout
pin and turning off external Nch MOS FET after the over-charge detection delay time.
The IC becomes standby state after detecting over-discharge and its consumption current is kept at about 0A. After
detection, the V- pin will be connected to VDD pin via 200kΩ.
Over-discharge return
Return from over-discharge is made by connecting charger. If the V- pin voltage becomes equal to or lower than the
standby return voltage by connecting charger after detecting over-discharge, it returns from the standby state to start
cell voltage monitoring. If both voltages become equal to or more than the over-discharge detection voltage by
charging, the Dout pin returns to “H” after the over-discharge return delay time set by the internal counter.
Over-current detection
When high current is passed through the battery, the V potential rises by the ON resister of external MOS FET and
becomes equal to or more than the over-current detection voltage, that will be deemed over-current state. Turn “L”
the Dout pin after the over-current detection delay time and turn off the external Nch MOS FET to prevent high
current in the circuit. The delay time is set by the internal counter. After detection, the V- pin will be connected to
VSS via 30kΩ. It will not go into standby state after detecting over-current.
Short circuit detection
If greater discharge current is passed and the V- pin voltage becomes equal to or more than the short-circuit detection
voltage, it will go into short-circuit detection state after the short circuit delay time shorter than the over-current
detection delay time. When short-circuit is detected, just like the time of over-current detection, turn Dout pin “L”
and turn off external Nch MOS FET to prevent high current in the circuit. The V- pin will be connected to VSS after
detection via 30kΩ. It will not go into standby state after detecting short-circuit.
Over-current/short-detection return
After detecting over-current or short circuit, the return resistor (typ.30kΩ) between V- pin and VSS pin becomes
effective and if the resistor is opened the V- pin voltage will be pulled by the VSS pin voltage. Thereafter, the IC will
return from the over-current/short-circuit detection state when the V- pin voltage becomes equal to or below the over-
current detection voltage and the Dout pin returns to “H” after over-current return delay time set by the internal
counter.
LV5113T
No.A0694-6/8
Over-charger detection/return
If the potential difference between V- pin and VSS pin becomes equal to or below the over-charger detection voltage
by connecting a charger, no charging can be made by turning “L” the Cout pin after certain delay time and turning off
the external Nch MOS FET. If this difference returns to equal to or more than the over-charger detection voltage
during detection delay time, the over-charger detection will be stopped. If the potential difference between V- pin and
VSS pin becomes equal to or more than the over-charger detection voltage after over-charger detection, the Cout
returns to “H” after certain time. The detection/return delay time is set internally.
If Dout pin is “L” charging will be made through the external Nch FET parasite diode of Dout pin. In that case, the
potential difference between V- pin and VSS pin becomes -Vf which is equal to or less than the over-charger
detection voltage, no over-charger detection will be made during over-discharge, over-current or short-circuit
detection. Further, if over-discharged battery is connected to over-charger, no over-charger detection is made while
the Dout pin is “L.”
If the battery voltage rises to the over-discharge detection voltage through the parasite diode and the Dout pin
becomes “H”, and the potential difference between V- pin and VSS pin is equal to or below the over-charger
detection voltage, the delay operation will be started after Dout pin becoming “H.”
0V cell charge
If the cell voltage is 0V but a potential difference between VDD and V becomes equal to or greater than the 0V cell
charging lowest operation voltage, the Cout pin will output “H” and enable charging.
Test time reduction function
By turning T pin to the VDD potential, the delay times set by the counter can be cut. Normal time settings if T pin is
open. Delay time not set by the counter cannot be controlled by this pin.
Operation in case of detection overlap
Overlap state Operation in case of
detection overlap State after detection
When, during over-
charge detection,
Over-discharge
detection is made,
Over-charge detection is preferred. If over-
discharge state continues even after over-
charge detection, over-discharge detection is
resumed.
When over-charge detection is made first, V- is
released. When over-discharge is detected
after over-charge detection, the standby state is
not effectuated. Note that V- is connected to
VDD via 200kΩ.
Over-current
detection is made,
(*1) Both detections’ can be made in parallel.
Over-charge detection continues even when the
over-current state occurs. If the over-charge
state occurs first, over-current detection is
interrupted.
(*2) When over-current is detected first, V- is
connected to VSS via 30kΩ. When over-charge
detection is made first, V- is released.
When, during over-
discharge detection,
Over-charge detection
is made,
Over-discharge detection is interrupted and
over-charge detection is preferred. When over-
discharge state continues even after over-
charge detection, over-discharge detection is
resumed.
The standby state is not effectuated when over-
discharge detection is made after over-charge
detection. Note that V- is connected to VDD via
200kΩ.
Over-current
detection is made,
(*3) Both detections can be made in parallel.
Over-discharge detection continues even when
the over-current state is effectuated first. Over-
current detection is interrupted when the over-
discharge state is effectuated first,
(*4) If over-current is detected in advance, V will
be connected to VSS via 30kΩ. After detecting
over-discharge, V will be connected to VDD via
200kΩ to get into standby state. If over-
discharge is detected in advance, V will be
connected to VDD via 200kΩ to get into standby
state.
Over-charge detection
is made,
(*1) (*2) When, during over-
current detection,
Over-discharge
detection is made,
(*3) (*4)
(Note) Short-circuit detection can be made independently.
Over-charger detection does not work during over-discharge, over-current or short-circuit detection and
the delay time starts after return from these states.
LV5113T
No.A0694-7/8
Timing Chart
[Cout Output System]
[Dout Output System]
VDD
V-
Vd1
Vr1
Vd2
Vd3
Vd4
VDD
VSS
VSS
VDD
Dout td2 tr2 td3 tr3 td4 tr3
Over-discharge detection state Over-current detection state Short-circuit detection state
Charger
connection Load
connection
VDD
V-
Cout
Vd1
Vr1
Vd2
Vd3
Vd4
VDD
VSS
V-
VDD
td1 tr1 td1 tr1
Vd5
td5
Over-charger
connection
tr5
Over-charge detection state Over-charge detection state Over-charger detection state
Hysteresis cancellation
by load connection
Discharging via FETparasite Di
Over-current
occurrence
To standby
Charging via FETparasite Di
V-
VDD
Cout
Vd5
Load short-circuit
occurrence
td2
td5
tr2
Over-charger detection
upon charging over-discharged
battery is activated after return
from over-charge.
Charger
connection Over-charger
connection
Discharging via FETparasite Di
Charging recovery
depends on charger voltage
when connecting charger.
Charger
connection Charger
connection
Load
connection Load
connection
Load
connection Load
connection Load
connection Load
connection
To standby
LV5113T
PS No.A0694-8/8
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using
products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.
products described or contained herein.
SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all
semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or
malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise
to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt
safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not
limited to protective circuits and error prevention circuits for safe design, redundant design, and structural
design.
Upon using the technical information or products described herein, neither warranty nor license shall be granted
with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third
party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's
intellctual property rights which has resulted from the use of the technical information and products mentioned
above.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed
for volume production.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the
SANYO Semiconductor Co.,Ltd. product that you intend to use.
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without the prior written consent of SANYO Semiconductor Co.,Ltd.
Application Circuit Example
Components Recommended value max unit
R1, R2 100 1k Ω
R3 2k 4k Ω
R4 100 10k Ω
C1, C2, C3 0.1µ 1µ F
* These numbers don't mean to guarantee the characteristic of the IC.
* In addition to the components in the upper diagram, it is necessary to insert a capacitor with enough capacity between
VDD and VSS of the IC as near as possible to stabilize the power supply voltage to the IC.
This catalog provides information as of May, 2007. Specifications and information herein are subject
to change without notice.
VDD
Cout
V-
VSS Dout
Vc
Sense
LV5113T
+
−
R1
R2
C1
C2
R4
R3
VSS
C3
