IL710
IsoLoop is a registered trademark of NVE Corporation.
*U.S. Patent numbers 5,831,426; 6,300,617 and others.
REV. T
NVE Corporation 11409 Valley View Road, Eden Prairie, MN 55344-3617 Phone: (952) 829-9217 Fax: (952) 829-9189 www.IsoLoop.com ©NVE Corporation
High Speed/High Temperature Digital Isolators
Functional Diagram
OUT
1
V
OE
IN
1
IL710
Truth Table
VI VOE VO
L L L
H L H
L H Z
H H Z
Features
+5 V/+3.3 V CMOS / TTL Compatible
High Speed: 150 Mbps Typical (IL710S)
High Temperature: 40°C to +125°C (IL710T)
2500 VRMS Isolation (1 min.)
300 ps Typical Pulse Width Distortion (IL710S)
100 ps Typical Pulse Jitter
4 ns Typical Propagation Delay Skew
10 ns Typical Propagation Delay
30 kV/μs Typical Common Mode Transient Immunity
Low EMC Footprint
8-pin MSOP, SOIC, and PDIP Packages
UL1577 and IEC 61010-2001 Approved
Applications
Digital Fieldbus
RS-485 and RS-422
Multiplexed Data Transmission
Data Interfaces
Board-to-Board Communication
Digital Noise Reduction
Operator Interface
Ground Loop Elimination
Peripheral Interfaces
Serial Communication
Logic Level Shifting
Description
NVE’s IL700 family of high-speed digital isolators are CMOS
devices manufactured with NVE’s patented* IsoLoop® spintronic
Giant Magnetoresistive (GMR) technology. The IL710S is the
world’s fastest isolator of its type, with a 150 Mbps typical data rate.
The symmetric magnetic coupling barrier provides a typical
propagation delay of only 10 ns and a pulse width distortion as low
as 300 ps (0.3 ns), achieving the best specifications of any isolator.
Typical transient immunity of 30 kV/µs is unsurpassed. The IL710 is
ideal for isolating applications such as PROFIBUS, RS-485, and
RS-422.
The IL710 is available in 8-pin MSOP, SOIC, and PDIP packages.
Standard and S-Grade parts are specified over a temperature range of
40°C to +100°C; T-Grade parts are specified over a temperature
range of 40°C to +125°C.
IL710
2
Absolute Maximum Ratings
Parameters Symbol Min. Typ. Max. Units Test Conditions
Storage Temperature TS 55 150 °C
Ambient Operating Temperature(1)
IL710T TA 55 125
135 °C
Supply Voltage VDD1, VDD2 0.5 7 V
Input Voltage VI 0.5 VDD1+0.5 V
Input Voltage VOE 0.5 VDD2+0.5 V
Output Voltage VO 0.5 VDD2+0.5 V
Output Current Drive IO 10 mA
Lead Solder Temperature 260 °C 10 sec.
ESD 2 kV HBM
Recommended Operating Conditions
Parameters Symbol Min. Typ. Max. Units Test Conditions
Ambient Operating Temperature
IL710 and IL710S
IL710T
TA
TA
40
40
100
125
°C
°C
Supply Voltage VDD1, VDD2 3.0 5.5 V
Logic High Input Voltage VIH 2.4 VDD1 V
Logic Low Input Voltage VIL 0 0.8 V
Input Signal Rise and Fall Times tIR, tIF 1 μs
Insulation Specifications
Parameters Symbol Min. Typ. Max. Units Test Conditions
Creepage Distance
MSOP 3.01 mm
SOIC 4.04 mm
PDIP 7.04 mm
Leakage Current(5) 0.2 μA 240 VRMS, 60 Hz
Barrier Impedance(5) >1014||3 || pF
Package Characteristics
Parameters Symbol Min. Typ. Max. Units Test Conditions
Capacitance (Input–Output)(5) C
IO 1.1 pF f = 1 MHz
Thermal Resistance
MSOP θJC 168 °C/W
SOIC θJC 144 °C/W
PDIP θJC 54 °C/W
Thermocouple at center
underside of package
Package Power Dissipation PPD 150 mW f = 1 MHz, VDD = 5 V
Safety and Approvals
IEC61010-1
TUV Certificate Numbers: N1502812, N1502812-101
Classification as Reinforced Insulation
Model Package
Pollution
Degree Material
Group Max. Working
Voltage
IL710-1 MSOP II III 150 VRMS
IL710-2 PDIP II III 300 VRMS
IL710-3 SOIC II III 150 VRMS
UL 1577
Component Recognition Program File Number: E207481
Rated 2500VRMS for 1 minute
Soldering Profile
Per JEDEC J-STD-020C, MSL=2
IL710
3
IL710 Pin Connections
1 VDD1 Supply voltage
2 IN Data In
3 NC No internal connection
4 GND1 Ground return for VDD1
5 GND2 Ground return for VDD2
6 OUT Data Out
7
VOE Output enable.
Internally held low with 100 k
8 VDD2 Supply voltage
VDD1 VDD2
IN VOE
NC OUT
GND1GND2
IL710
Timing Diagram
Legend
tPLH Propagation Delay, Low to High
tPHL Propagation Delay, High to Low
tPW Minimum Pulse Width
tPLZ Propagation Delay, Low to High Impedance
tPZH Propagation Delay, High Impedance to High
tPHZ Propagation Delay, High to High Impedance
tPZL Propagation Delay, High Impedance to Low
tR Rise Time
tF Fall Time
IL710
4
3.3 Volt Electrical Specifications
Electrical specifications are Tmin to Tmax unless otherwise stated.
Parameters Symbol Min. Typ. Max. Units Test Conditions
DC Specifications
Input Quiescent Supply Current IDD1 8 10
μA
Output Quiescent Supply Current
IL710 and IL710S
IL710T
IDD2
1.7
3.3
2
4
mA
Logic Input Current II 10 10 μA
VDD0.1 VDD I
O = 20 μA, VI = VIH
Logic High Output Voltage VOH 0.8 x VDD 0.9 x VDD V IO = 4 mA, VI = VIH
0 0.1 IO = 20 μA, VI = VIL
Logic Low Output Voltage VOL 0.5 0.8 V IO = 4 mA, VI = VIL
Switching Specifications
Maximum Data Ra t e
IL710 and IL710T
IL710S
100
130
110
140
Mbps
Mbps
CL = 15 pF
CL = 15 pF
Pulse Width(7) PW 10 7.5 ns 50% Points, VO
Propagation Delay Input to Output
(High to Low) tPHL 12 18 ns CL = 15 pF
Propagation Delay Input to Output
(Low to High) tPLH 12 18 ns CL = 15 pF
Propagation Delay Enable to Output
(High to High Impedance) tPHZ 3 5 ns CL = 15 pF
Propagation Delay Enable to Output
(Low to High Impedance) tPLZ 3 5 ns CL = 15 pF
Propagation Delay Enable to Output
(High Impedance to High) tPZH 3 5 ns CL = 15 pF
Propagation Delay Enable to Output
(High Impedance to Low) tPZL 3 5 ns CL = 15 pF
Pulse Width Distortion(2)
IL710 and IL710T
IL710S
PWD
2
1
3
3
ns
CL = 15 pF
Propagation Delay Skew(3) t
PSK 4 6 ns CL = 15 pF
Output Rise Time (10%–90%) tR 2 4 ns CL = 15 pF
Output Fall Time (10%–90%) tF 2 4 ns CL = 15 pF
Common Mode Transient Immunity
(Output Logic High or Logic Low)(4) |CMH|,|CML| 20 30 kV/μs VCM = 300 V
Dynamic Power Consumption(6) 140 240 μA/MHz
IL710
5
5 Volt Electrical Specifications
Electrical specifications are Tmin to Tmax unless otherwise stated.
Parameters Symbol Min. Typ. Max. Units Test Conditions
DC Specifications
Input Quiescent Supply Current IDD1 10 15 μA
Output Quiescent Supply Current
IL710 and IL710S
IL710T
IDD2
2.5
5
3
6
mA
Logic Input Current II 10 10 μA
VDD0.1 VDD I
O = 20 μA, VI = VIH
Logic High Output Voltage VOH 0.8 x VDD 0.9 x VDD V IO = 4 mA, VI = VIH
0 0.1 IO = 20 μA, VI = VIL
Logic Low Output Voltage VOL 0.5 0.8 V IO = 4 mA, VI = VIL
Switching Specifications
Maximum Data Ra t e
IL710 and IL710T
IL710S
100
130
110
150
Mbps
Mbps
CL = 15 pF
CL = 15 pF
Pulse Width(7) PW 10 7.5 ns 50% Points, VO
Propagation Delay Input to Output
(High to Low) tPHL 10 15 ns CL = 15 pF
Propagation Delay Input to Output
(Low to High) tPLH 10 15 ns CL = 15 pF
Propagation Delay Enable to Output
(High to High Impedance) tPHZ 3 5 ns CL = 15 pF
Propagation Delay Enable to Output
(Low to High Impedance) tPLZ 3 5 ns CL = 15 pF
Propagation Delay Enable to Output
(High Impedance to High) tPZH 3 5 ns CL = 15 pF
Propagation Delay Enable to Output
(High Impedance to Low) tPZL 3 5 ns CL = 15 pF
Pulse Width Distortion(2)
IL710 and IL710T
IL710S
PWD
2
0.3
3
3
ns
CL = 15 pF
Pulse Jitter(8) t
J 100 ps CL = 15 pF
Propagation Delay Skew(3) t
PSK 4 6 ns CL = 15 pF
Output Rise Time (10%–90%) tR 1 3 ns CL = 15 pF
Output Fall Time (10%–90%) tF 1 3 ns CL = 15 pF
Common Mode Transient Immunity
(Output Logic High or Logic Low)(4) |CMH|,|CML| 20 30 kV/μs Vcm = 300 V
Dynamic Power Consumption(6) 200 340 μA/MHz
Notes (apply to both 3.3 V and 5 V specifications):
1. Absolute maximum ambient operating temperature means the device will not be damaged if operated under these conditions. It does not
guarantee performance.
2. PWD is defined as |tPHL tPLH|. %PWD is equal to PWD divided by pulse width.
3. tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH between devices at 25°C.
4. CMH is the maximum common mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum
common mode input voltage that can be sustained while maintaining VO < 0.8 V. The common mode voltage slew rates apply to both rising
and falling common mode voltage edges.
5. Device is considered a two terminal device: pins 1–4 shorted and pins 5–8 shorted.
6. Dynamic power consumption is calculated per channel and is supplied by the channel’s input side power supply.
7. Minimum pulse width is the minimum value at which specified PWD is guaranteed.
8. 65,535-bit pseudo-random binary signal (PRBS) NRZ bit pattern with no more than five consecutive 1s or 0s; 800 ps transition time.
IL710
6
80 ns
Application Information
Electrostatic Discharge Sensitivity
This product has been tested for electrostatic sensitivity to the
limits stated in the specifications. However, NVE recommends that
all integrated circuits be handled with appropriate care to avoid
damage. Damage caused by inappropriate handling or storage could
range from performance degradation to complete failure.
Electromagnetic Compatibility
IsoLoop Isolators have the lowest EMC footprint of any isolation
technology. IsoLoop Isolators’ Wheatstone bridge configuration
and differential magnetic field signaling ensure excellent EMC
performance against all relevant standards.
These isolators are fully compliant with generic EMC standards
EN50081, EN50082-1 and the umbrella line-voltage standard for
Information Technology Equipment (ITE) EN61000. NVE has
completed compliance tests in the categories below:
EN50081-1
Residential, Commercial & Light Industrial
Methods EN55022, EN55014
EN50082-2: Industrial Environment
Methods EN61000-4-2 (ESD), EN61000-4-3 (Electromagnetic
Field Immunity), EN61000-4-4 (Electrical Transient Immunity),
EN61000-4-6 (RFI Immunity), EN61000-4-8 (Power Frequency
Magnetic Field Immunity), EN61000-4-9 (Pulsed Magnetic
Field), EN61000-4-10 (Damped Oscillatory Magnetic Field)
ENV50204
Radiated Field from Digital Telephones (Immunity Test)
Immunity to external magnetic fields is even higher if the field
direction is “end-to-end” rather than to “pin-to-pin” as shown in the
diagram below:
Cross-axis Field Direction
Dynamic Power Consumption
IsoLoop Isolators achieve their low power consumption from the
way they transmit data across the isolation barrier. By detecting the
edge transitions of the input logic signal and converting these to
narrow current pulses, a magnetic field is created around the GMR
Wheatstone bridge. Depending on the direction of the magnetic
field, the bridge causes the output comparator to switch following
the input logic signal. Since the current pulses are narrow, about
2.5 ns, the power consumption is independent of mark-to-space
ratio and solely dependent on frequency. This has obvious
advantages over optocouplers, which have power consumption
heavily dependent on mark-to-space ratio.
Power Supply Decoupling
Both power supplies to these devices should be decoupled with low
ESR 47 nF ceramic capacitors. Ground planes for both GND1 and
GND2 are highly recommended for data rates above 10 Mbps.
Capacitors must be located as close as possible to the VDD pins.
Signal Status on Start-up and Shut Down
To minimize power dissipation, input signals are differentiated and
then latched on the output side of the isolation barrier to reconstruct
the signal. This could result in an ambiguous output state
depending on power up, shutdown and power loss sequencing.
Therefore, the designer should consider including an initialization
signal in the start-up circuit. Initialization consists of toggling the
input either high then low, or low then high.
Data Transmission Rates
The reliability of a transmission system is directly related to the
accuracy and quality of the transmitted digital information. For a
digital system, those parameters which determine the limits of the
data transmission are pulse width distortion and propagation delay
skew.
Propagation delay is the time taken for the signal to travel through
the device. This is usually different when sending a low-to-high
than when sending a high-to-low signal. This difference, or error, is
called pulse width distortion (PWD) and is usually in nanoseconds.
It may also be expressed as a percentage:
PWD% = Maximum Pulse Width Distortion (ns) x 100%
Signal Pulse Width (ns)
For example, with data rates of 12.5 Mbps:
PWD% = 3 ns x 100% = 3.75%
This figure is almost three times better than any available
optocoupler with the same temperature range, and two times better
than any optocoupler regardless of published temperature range.
IsoLoop isolators exceed the 10% maximum PWD recommended
by PROFIBUS, and will run to nearly 35 Mb within the 10% limit.
Propagation delay skew is the signal propagation difference
between two or more channels. This becomes significant in clocked
systems because it is undesirable for the clock pulse to arrive
before the data has settled. Short propagation delay skew is
therefore especially critical in high data rate parallel systems for
establishing and maintaining accuracy and repeatability. Worst-
case channel-to-channel skew in an IL700 Isolator is only 3 ns,
which is ten times better than any optocoupler. IL700 Isolators
have a maximum propagation delay skew of 6 ns, which is five
times better than any optocoupler.
IL710
7
Application Diagrams
Isolated PROFIBUS / RS-485
Isolation
Boundary
IL710
IL710
IL710
ISL8485
NVE offers a unique line of PROFIBUS/RS-485 transceivers, but IL710 isolators can also be used as part of multi-chip designs using non-
isolated PROFIBUS transceivers.
N
ote:
VDD1 and VISO should be decoupled with
10 nF ceramic capacitors at I L 710
supply pins.
RS-485 Truth Table
TXD RTS A B RXD
1 0 Z Z X
0 0 Z Z X
1 1 1 0 1
0 1 0 1 0
IL710
8
Isolated USB
+3.3V
NET2890
USPB
USBM
USBOE
ISO_USB+
ISO_USB-
3
4
27
R1
1.5k
Power supplied by USB
bus power this side of
isolation boundary
All power supplied by USB node’s
external supply on this side of
isolation boundary
5 x IL710
Isolation
Boundary
In this circuit, power is supplied by USB bus power on one side of the isolation barrier, and the USB node’s external supply on the other side of
the barrier. IL700 Isolators are specified with just 3 ns worst-case pulse width distortion.
IL710
9
Package Drawings, Dimensions and Specifications
8-pin MSOP
0.114 (2.90)
0.114 (2.90)
0.016 (0.40)
0.005 (0.13)
0.009 (0.23)
0.027 (0.70)
0.010 (0.25)
0.020 (0.50) 0.002 (0.05)
0.043 (1.10)
0.032 (0.80)
0.006 (0.15)
0.016 (0.40)
0.032 (0.80)
0.189 (4.80)
0.197 (5.00)
0.122 (3.10)
0.122 (3.10)
Pin spacing is a BASIC
dimension; tolerances
do not accumulate
NOTE:
8-pin SOIC Package
0.013 (0.33)
0.020 (0.50)
0.189 (4.8)
0.197 (5.0)
0.150 (3.8)
0.157 (4.0)
Dimensions in inches (mm)
3
2
1
0.228 (5.8)
0.244 (6.2)
0.008 (0.19)
0.010 (0.25)
0.010 (0.25)
0.020 (0.50)
x45º
0º
8º
0.016 (0.40)
0.050 (1.27)
0.040 (1.0)
0.060 (1.5)
0.054 (1.37)
0.069 (1.75)
0.004 (0.10)
0.010 (0.25)
Pin spacing is a BASIC
dimension; tolerances
do not accumulate
NOTE:
8-pin PDIP
0.36 (9.0)
0.40 (10.2)
Pin spacing is a BASIC
dimension; tolerances 
do not accumulate
NOTE:
0.24 (6.1)
0.26 (6.6)
0.29 (6.4)
0.31 (7.9)
0.30 (7.6)
0.37 (9.4)
0.008 (0.2)
0.015 (0.4)
0.030 (0.76)
0.045 (1.14) 0.015 (0.38)
0.023 (0.58) 0.045 (1.14)
0.065 (1.65)
0.09 (2.3)
0.11 (2.8)
0.015 (0.38)
0.035 (0.89)
0.12 (3.05)
0.15 (3.81)
IL710
10
Ordering Information and Valid Part Numbers
IL 710 T - 3 E TR13
Bulk Packaging
Blank = Tube
TR7 = 7" Tape and Reel
TR13 = 13" Tape and Reel
Package
Blank = 80/20 Tin/Lead Plating
E = RoHS Compliant
Package T ype
-1 = MSOP
-2 = PDIP
-3 = 0.15" 8-pin SOIC
Grade
Blank = Standard
T = High Temperature
S = High Speed
Base Part Number
710 = Single Channel
Product Family
IL = Isolators
Valid Part Numbers
IL710-1E
IL710S-1E
IL710T-1E
IL710-2
IL710T-2
IL710-2E
IL710T-2E
IL710-3
IL710S-3
IL710T-3
IL710-3E
IL710S-3E
IL710T-3E
All MSOP and SOIC
parts are available on
tape and reel.
RoHS
COMPLIANT
IL710
11
ISB-DS-001-IL710-T
November 2009 Changes
Added typical jitter specificatio n at 5V.
ISB-DS-001-IL710-S
Changes
Added EMC details.
ISB-DS-001-IL710-R Changes
IEC 61010 approval for MSOP version.
ISB-DS-001-IL710-Q
Changes
Added magnetic immunity to 3.3 and 5 volt electrical specifications.
Added diagram showing cross-axis direction.
Added magnetic compatibility to the applications information section.
ISB-DS-001-IL710-P Changes
Note on all package drawings that pin-spacing tolerances are non-accumulating; change
MSOP pin-spacing dimensions and tolerance accordingly.
ISB-DS-001-IL710-O
Changes
Corrected PWD spec. on Isolated USB application diagram (p. 8).
Changed lower limit of length on PDIP package drawing and
tightened pin-spacing tolerance on MSOP package drawing (p. 9).
ISB-DS-001-IL710-N
Changes
Changed IL710T output quiescent supply current specifications.
ISB-DS-001-IL710-M
Changes
Changed ordering information to reflect that devices are now fully RoHS compliant with
no exemptions.
ISB-DS-001-IL710-L
Changes
Eliminated soldering profile chart
ISB-DS-001-IL710-K
Changes
Edited Profibus application
ISB-DS-001-IL710-J
Changes
MSOP package, S- and T-Grades added
Order information updated
ISB-DS-001-IL710-I Changes
Added MSOP specifications
Updated UL and IEC numbers
IL710
12
About NVE
An ISO 9001 Certified Company
NVE Corporation manufactures innovative products based on unique spintronic Giant Magnetoresistive (GMR) technology.
Products include Magnetic Field Sensors, Magnetic Field Gradient Sensors (Gradiometers), Digital Magnetic Field Sensors,
Digital Signal Isolators, and Isolated Bus Transceivers.
NVE pioneered spintronics and in 1994 introduced the world’s first products using GMR material, a line of ultra-precise magnetic
sensors for position, magnetic media, gear speed and current sensing.
NVE Corporation
11409 Valley View Road
Eden Prairie, MN 55344-3617 USA
Telephone: (952) 829-9217
Fax: (952) 829-9189
Internet: www.nve.com
e-mail: isoinfo@nve.com
The information provided by NVE Corporation is believed to be accurate. However, no responsibility is assumed by NVE
Corporation for its use, nor for any infringement of patents, nor rights or licenses granted to third parties, which may result from
its use. No license is granted by implication, or otherwise, under any patent or patent rights of NVE Corporation. NVE
Corporation does not authorize, nor warrant, any NVE Corporation product for use in life support devices or systems or other
critical applications, without the express written approval of the President of NVE Corporation.
Specifications are subject to change without notice.
ISB-DS-001-IL710-T
November 2009