ISL90460 (R) Single Volatile 32-Tap XDCPTM Data Sheet June 6, 2005 FN8225.2 Digitally Controlled Potentiometer (XDCP) Features The Intersil ISL90460 is a digitally controlled potentiometer (XDCP). Configured as a variable resistor, the device consists of a resistor array, wiper switches, a control section, and volatile memory. The wiper position is controlled by a 2pin Up/Down interface. * Volatile Solid-State Potentiometer The potentiometer is implemented by a resistor array composed of 31 resistive elements and a wiper switching network. Between each element and at either end are tap points accessible to the wiper terminal. The position of the wiper element is controlled by the CS and U/D inputs. * 32 Wiper Tap Points The device can be used in a wide variety of applications including: * Available RTOTAL Values = 10k, 50k, 100k * LCD contrast control * Parameter and bias adjustments * Packages - 5 lead SC-70, SOT-23 * Industrial and automotive control * Pb-Free Plus Anneal Available (RoHS Compliant) * Transducer adjustment of pressure, temperature, position, chemical, and optical sensors Pinout * 2-pin UP/DN Interface * DCP Terminal Voltage, 2.7V to 5.5V * Tempco 35ppm/C Typical * Low Power CMOS - Active current 25A max. - Supply current 0.3A * Temp Range -40C to +85C ISL90460 (5-PIN SOT-23, SC-70) TOP VIEW * Laser Diode driver biasing * Gain control and offset adjustment VDD Ordering Information RTOTAL PACKAGE TEMP RANGE (C) ISL90460TIE527 100K SC-70 -40 to +85 ISL90460TIE527Z (See Note) 100K SC-70 (Pb-free) -40 to +85 ISL90460UIE527 50K SC-70 -40 to +85 ISL90460UIE527Z (See Note) 50K SC-70 (Pb-free) -40 to +85 ISL90460WIE527 10K SC-70 -40 to +85 ISL90460WIE527Z (See Note) 10K SC-70 (Pb-free) -40 to +85 PART NUMBER ISL90460TIH527 100K SOT-23 -40 to +85 ISL90460TIH527Z (See Note) 100K SOT-23 (Pb-free) -40 to +85 ISL90460UIH527 50K SOT-23 -40 to +85 ISL90460UIH527Z (See Note) 50K SOT-23 (Pb-free) -40 to +85 ISL90460WIH527 10K SOT-23 -40 to +85 ISL90460WIH527Z (See Note) 10K SOT-23 (Pb-free) -40 to +85 RH GND U/D CS Add "-TK" suffix for tape and reel. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL90460 Block Diagram VCC UP/DOWN RH (U/D) CONTROL AND MEMORY DEVICE SELECT (CS) GND (GROUND) GENERAL Pin Descriptions SOT-23/SC-70 5-PIN SYMBOL 1 VDD Supply voltage 2 GND Ground 3 U/D Up - Down 4 CS Chip select 5 RH High terminal/Wiper terminal DESCRIPTION 2 FN8225.2 June 6, 2005 ISL90460 Absolute Maximum Ratings Recommended Operating Conditions Storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65C to +150C Voltage on CS, U/D and VCC with respect to GND . . . . . -1V to +7V Lead temperature (soldering 10 seconds) . . . . . . . . . . . . . . . . 300C IW (10 seconds) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6mA Power rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1mW Temperature Range (Industrial) . . . . . . . . . . . . . . . . . . -40C to 85C Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V CAUTION: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only; functional operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Potentiometer Specifications Over recommended operating conditions unless otherwise stated SYMBOL RTOT VR MIN TYP (Note 4) MAX UNIT W version 8 10 12 k U version 40 50 60 k T version 80 100 120 k VCC V PARAMETER End to end resistance CONDITIONS RH, RL terminal voltages 0 Noise Ref: 1kHz RW Wiper Resistance IW Wiper Current dBV 600 0.6 Resolution 32 Absolute linearity (Note 1) RH(n)(actual)-RH(n)(expected) Relative linearity (Note 2) RH(n+1)-[RH(n)+MI] RTOTAL temperature coefficient CH/CL/CW -120 Potentiometer capacitances See circuit #3 mA Taps 1 MI (Note 3) 0.5 MI (Note 3) 35 ppm/C 10/10/25 pF NOTES: 1. Absolute linearity is utilized to determine actual wiper voltage versus expected voltage = (RH(n)(actual)-RH(n)(expected)) = 1 Ml Maximum. n = 1 .. 29 only. 2. Relative linearity is a measure of the error in step size between taps = RH(n+1)--[RH(n) + Ml] = 0.5 Ml, n = 1 .. 29 only. 3. 1 Ml = Minimum Increment = RTOT/31. 4. Typical values are for TA = 25C and nominal supply voltage. DC Electrical Specifications SYMBOL Over recommended operating conditions unless otherwise specified. PARAMETER TEST CONDITIONS MIN TYP (Note 4) MAX UNIT 25 A 1 A ICC VCC active current (Increment) CS = 0V, U/D = fclock = 1MHz and VCC = 3V ISB Standby supply current CS = VCC, U/D = VSS or VCC = 3V ILI CS input leakage current VIN = VSS to VCC 1 A ILI U/D input leakage current VIN = VSS to VCC 1 A VIH CS, U/D input HIGH voltage VIL CS, U/D input LOW voltage CIN CS, U/D input capacitance 3 0.3 VCC x 0.7 V VCC x 0.3 VCC = 3V, VIN = VSS, TA = 25C, f = 1MHz 10 V pF FN8225.2 June 6, 2005 ISL90460 Timing Specifications Over recommended operating conditions unless otherwise specified) (Figures 1 and 2) SYMBOL PARAMETER MIN TYP (Note 4) MAX UNIT tCU U/D to CS setup 25 ns tCI CS to U/D setup 50 ns tIC CS to U/D hold 25 ns tlL U/D LOW period 300 ns tlH U/D HIGH period 300 ns fTOGGLE Up/Down toggle rate 1 MHz tSETTLE Output settling time 1 s CS tCU tIC tIL U/D tSETTLE tIH tCI RH FIGURE 1. SERIAL INTERFACE TIMING DIAGRAM, INCREMENT CS tCU tIC tIH U/D tCI tIL tSETTLE RH FIGURE 2. SERIAL INTERFACE TIMING DIAGRAM, DECREMENT 4 FN8225.2 June 6, 2005 ISL90460 Pin Descriptions Principles of Operation RH There are two sections of the ISL90460: the input control, counter and decode section; and the resistor array. The input control section operates just like an up/down counter. The output of this counter is decoded to turn on a single electronic switch connecting a point on the resistor array to the wiper output. The resistor array is comprised of 31 individual resistors connected in series. At either end of the array and between each resistor is an electronic switch that transfers the connection at that point to the wiper. The wiper is connected to the RH terminal, forming a variable resistor from RH to GND. The ISL90460 contains a digital potentiometer connected as a rheostat or variable resistor. The wiper and one terminal of the digital potentiomerter is tied to the RH pin, and the other terminal of the potentiometer is tied to the ground pin (GND). The resistance from the RH pin to ground will vary with the potentiometer setting; at the highest setting, the resistance will be the maximum (Rtot), at the lowest setting it will be a minimum. Up/Down (U/D) The U/D input controls the direction of the wiper movement and whether the counter is incremented or decremented. Chip Select (CS) The device is selected when the CS input is LOW. The current counter value is stored in volatile memory when CS is returned HIGH. When CS is high, the device is placed in low power standby mode. 5 The wiper, when at either fixed terminal, acts like its mechanical equivalent and does not move beyond the last position. That is, the counter does not wrap around when clocked to either extreme. If the wiper is moved several positions, multiple taps are connected to the wiper for tIW (U/D to VW change). The 2-terminal resistance value for the device can temporarily change by a significant amount if the wiper is moved several positions. FN8225.2 June 6, 2005 ISL90460 5-Lead, SOT23, Package Code G5 0.007 (0.20) B 0.0006 (0.15) B 0.108 (2.75) BSC 0.054 (1.38) BSC 0.065 (1.65) 0.061 (1.55) CL 4X 0.35 H A-B D 0.35 C A-B D 2X N/2 TIPS 2 1 0.075 (1.90) BSC 12 REF. TYP. 0.118 (3.00) 0.110 (2.80) 0.033 (0.85) 0.035 (0.90) 0.038 (0.95) BSC Parting Line Seating Plane 0.10 R MIN. 0.10 R MIN. 0.20 in 0.0008 (0.02) 0.0040 (0.10) SEATING PLANE 0.043 (1.10) MAX .019 (0.50) .012 (0.30) 0-8C 0.575 REF. NOTES: 1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 2. PACKAGE DIMENSIONS EXCLUDE MOLDING FLASH 3. DIMENSIONING AND TOLERANCES PER ASME, Y14.5-1994 4. THIS PART IS COMPLIANT WITH JEDEC SPECIFICATION MO-193. 5. THIS PART IS FULL COMPLIANCE TO EIAJ SPECIFICATION SC-74 6 FN8225.2 June 6, 2005 ISL90460 Small Outline Transistor Plastic Packages (SC70-5) SC70-5 D VIEW C e1 5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE INCHES 5 4 E CL 1 2 CL 3 e E1 b CL 0.20 (0.008) M C C CL A A2 A1 SYMBOL MIN MAX MIN MAX NOTES A 0.031 0.043 0.80 1.10 - A1 0.000 0.004 0.00 0.10 - A2 0.031 0.039 0.80 1.00 - b 0.006 0.012 0.15 0.30 b1 0.006 0.010 0.15 0.25 c 0.003 0.009 0.08 0.22 6 c1 0.003 0.009 0.08 0.20 6 D 0.071 0.087 1.80 2.20 3 E 0.071 0.094 1.80 2.40 - E1 0.045 0.053 1.15 1.35 3 SEATING PLANE e -C- e1 L 0.10 (0.004) C WITH b PLATING b1 0.0256 Ref 0.018 - 1.30 Ref 0.26 - 0.46 L1 0.017 Ref. 0.420 Ref. L2 0.006 BSC 0.15 BSC c1 0.65 Ref 0.0512 Ref 0.010 0 8 0 5 N c MILLIMETERS 4 - 8 - 5 5 R 0.004 - 0.10 - R1 0.004 0.010 0.15 0.25 NOTES: BASE METAL 1. Dimensioning and tolerances per ASME Y14.5M-1994. 2. Package conforms to EIAJ SC70 and JEDEC MO-203AA. 3. Dimensions D and E1 are exclusive of mold flash, protrusions, or gate burrs. 4X 1 4. Footlength L measured at reference to gauge plane. R1 5. "N" is the number of terminal positions. R GAUGE PLANE SEATING PLANE L C L1 6. These Dimensions apply to the flat section of the lead between 0.08mm and 0.15mm from the lead tip. 7. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only. L2 4X 1 VIEW C All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 7 FN8225.2 June 6, 2005