F10113 F10513 QUAD EXCLUSIVE OR WITH ENABLE Fi0K VOLTAGE COMPENSATED ECL DESCRIPTION The F10113 and F10513 are Quad Exclusive OR Gates, with an Enable common to ali four gates. When the Enable (E) input is HIGH, all outputs are forced LOW. A 4-bit active LOW comparator can be formed by tying the four outputs together. When each pair of inputs agrees, the output will go LOW. A disagreement in any pair will cause the output to go HIGH. Input pull-down resistors included in the circuit make it unnecessary to tie down unused inputs. Open emitter outputs permit direct connection to busses. @ VOLTAGE COMPENSATED ... NOISE MARGIN INSENSITIVE TO POWER SUPPLY VARIA- TIONS AND GRADIENTS: RELAXED POWER SUPPLY REQUIREMENTS @ INTERNAL 50 k (NOMINAL) PULL-DOWN RESISTORS... UNUSED INPUTS MAY BE LOGIC SYMBOL B 4p (14) 7 4 (14) 10 +) 1442) (15) 11 aya an pl = qa) 9 4 E Vec1 = Pin 1 15) Vocz = Pin 16 '4! Vee = Pin 8 (12) LEFT OPEN (.) = Flatpak @ OPEN EMITTER-FOLLOWER OUTPUTS DRIVE TERMINATED LINES @ SINGLE Vee POWER SUPPLY... -4.7 V TO -6.2 V @ FULLY COMPATIBLE WITH OTHER 10K SERIES ECL DC CHARACTERISTICS: Vee = 5.2 V, Vcc = GND LIMITS SYMBOL CHARACTERISTIC B TYP A UNITS Ta CONDITIONS YH Input Current HIGH uA 25C Vin = VIHA Pin 9 545 Pins 5, 6, 11, 12 220 Pins 4, 7, 10, 13 265 lee Power Supply Current 42 -33 mA 25C Inputs Open 7-25 FAIRCHILD ECL F10113 F10513 SWITCHING CHARACTERISTICS: Vee = -5.2 V. Ta = 25C LIMITS SYMBOL CHARACTERISTIC UNITS CONDITIONS B TYP tPLH, tPHL Propagation Delay, 1.1 2.5 3.7 ns Inputs to Outputs tPHL, tPLH Propagation Delay, 11 3.0 4.0 ns E to Outputs tTLH Output Transition Time 15 2.0 3.5 ns See Figure 1 LOW to HIGH, HIGH to LOW (20% to 80%) (80% to 20%) SWITCHING TEST CIRCUIT AND WAVEFORMS L Cw SCOPE wr] CHAN. A yer Rr ly = = PULSE ia put GENERATOR GW ne SCOPE i; = OF T tG CHAN. 8 4 form Rr VEE I Jig set-up with no circu:t under test Voor = Voc2 = +2.0V Vee = 3.2 V a INPUT ir Im Le] fens (OTHER INPUT LOW) TT oon eee eer OUTPUTS ten fe >| tel |< tTLH: Kk >| free ete sre {OTHER INPUT HIGH) -20y- -| | =o ton p +1104 +0.31V Li and Le = equal length 50 0 impedance lines FAT = 50 1 termination of scope C. = Jig and stray capacitance < 5.0 pF Decoupling 0.1 uF from gnd to Vee and Voc Figure 1 7-26