6.0 Introduction to Intelligent

Power Modules (IPM)

Mitsubishi Intelligent Power Mod-

ules (IPMs) are advanced hybrid

power devices that combine high

speed, low loss IGBTs with opti-

mized gate drive and protection cir-

cuitry. Highly effective over-current

grated over temperature and under

voltage lock out protection. Com-

pact, automatically assembled In-

telligent Power Modules are de-

signed to reduce system size, cost,

and time to market. Mitsubishi

Electric introduced the first full line

of Intelligent Power Modules in No-

vember, 1991. Continuous im-

provements in power chip, packag-

gent power module family shown in

Table 6.1 represents the industries

most complete line of IPMs. Since

their original introduction in 1993

the series has been expanded to

include 36 types with ratings rang-

ing from 10A 600V to 800A 1200V.

The power semiconductors used in

these modules are based on the

field proven H-Series IGBT and di-

generation IPM has been optimized

for minimum switching losses in or-

der to meet industry demands for

acoustically noiseless inverters

with carrier frequencies up to

20kHz. The built in gate drive and

protection has been carefully de-

signed to minimize the components

required for the user supplied inter-

face circuit.

packaging technology developed

for the U-Series IGBT module (de-

scribed in Section 4.1.5) combined

with an advanced super soft free-

wheel diode and optimized gate

drive and protection circuits the V-

Series IPM family achieves im-

proved performance at reduced

cost. The detailed descriptions of

IPM operation and interface re-

the place of the separate short cir-

cuit and over current functions de-

scribed in Sections 6.4.4 and 6.4.5.

The unified protection was made

Third Generation Low Profile Series - 600V

PM10CSJ060 10 Six IGBTs

PM15CSJ060 15 Six IGBTs

PM20CSJ060 20 Six IGBTs

PM30CSJ060 30 Six IGBTs

PM50RSK060 50 Six IGBTs + Brake ckt.

PM25RSK120 25 Six IGBTs + Brake ckt.

Third Generation High Power Series - 600V

PM75RSA060 75 Six IGBTs + Brake ckt.

PM100CSA060 100 Six IGBTs

PM100RSA060 100 Six IGBTs + Brake ckt.

PM150CSA060 150 Six IGBTs

PM150RSA060 150 Six IGBTs + Brake ckt.

PM200CSA060 200 Six IGBTs

PM200RSA060 200 Six IGBTs + Brake ckt.

PM200DSA060 200 Two IGBTs: Half Bridge

Third Generation High Power Series - 1200V

PM25RSB120 25 Six IGBTs + Brake ckt.

PM50RSA120 50 Six IGBTs + Brake ckt.

PM75CSA120 75 Six IGBTs

PM75DSA120 75 Two IGBTs: Half Bridge

PM100CSA120 100 Six IGBTs

PM300DSA120 300 Two IGBTs: Half Bridge

PM400HSA120 400 Two IGBTs: Half Bridge

PM600HSA120 600 One IGBT

PM800HSA120 800 One IGBT

V-Series High Power - 600V

PM75RVA060 75 Six IGBTs + Brake ckt.

PM100CVA060 100 Six IGBTs

PM150CVA060 150 Six IGBTs

PM200CVA060 200 Six IGBTs

PM300CVA060 300 Six IGBTs

V-Series High Power - 1200V

MITSUBISHI SEMICONDUCTORS POWER MODULES MOS

USING INTELLIGENT POWER MODULES

possible by an advanced RTC

(Real Time Control) current clamp-

ing circuit that eliminates the need

for the over current protection func-

tion. In V-Series IPMs a unified

short circuit protection with a delay

to avoid unwanted operation re-

ules utilize many of the same field

proven module packaging tech-

nologies used in Mitsubishi IGBT

modules. Cost effective implemen-

tation of the built in gate drive and

protection circuits over a wide

range of current ratings was

achieved using two different pack-

aging techniques. Low power de-

vices use a multilayer epoxy isola-

chips and gate control circuit com-

ponents are soldered directly to the

substrate eliminating the need for a

separate printed circuit board and

ceramic isolation materials. Mod-

ules constructed using this tech-

nique are easily identified by their

extremely low profile packages.

This package design is ideally

suited for consumer and industrial

applications where low cost and

compact size are important.

Figure 6.2 shows a cross section

of this type of IPM package. Figure

6.1.2 Ceramic Isolation Con-

Higher power IPMs are constructed

direct bond copper process in

which copper patterns are bonded

Figure 6.4 Ceramic Isolation Construction

6.1.3 V-Series IPM Construction

V-Series IPMs are similar to the ce-

ramic isolated types described

in Section 6.1.2 except that an in-

sert molded case similar to the

U-Series IGBT is used. Like the

costs as well as providing improve-

ment in system performance and

reliability over conventional IGBTs.

Design and development effort is

simplified and successful drive co-

ordination is assured by the inte-

gration of the drive and protection

6.2 IPM Ratings and Characteris-

IPM datasheets are divided into

three sections:

• Maximum Ratings

6.2.1 Maximum Ratings

±ICP Collector-Current (peak) Maximum peak collector and FWDi current @ Tj ≤ 150°C

PCCollector Dissipation Maximum power dissipation per IGBT switch at Tj = 25°C

TjJunction Temperature Range of IGBT junction temperature during operation

Brake Part

Control Part

VDSupply Voltage Maximum control supply voltage

VFO Fault Output Supply Voltage Maximum voltage between fault output (FO) and ground (C) pins

Symbol Parameter Definition

Rth(c-f) Contact Thermal Maximum value of thermal resistance between case and fin (heatsink) per IGBT/FWDi pair

tc(on) Turn-On Crossover Time (See Figure 6.10)

toff T urn-Of f T ime

ICES Collector-Emitter Cutoff Collector-Emitter current in off-state at VCE = VCES under specified conditions

The following test circuits are used

to evaluate the IPM characteristics.

To ensure specified junction

VCIN(on) Input ON-Voltage A voltage applied between input (I) and ground (C) pins less than this value will turn on the IPM

fPWM PWM Input Frequency Range of PWM frequency for VVVF inverter operations

tdead Arm Shoot Through Time delay required between high and low side input off/on signals to prevent an

OC Over-Current Trip Level Collector that will activate the over-current protection

SC Short-Circuit Trip Level Collector current that will activate the short-circuit protection

OT Over-Temperature Trip Level Baseplate temperature that will activate the over-temperature protection

Symbol Parameter Definition

VCC Main Supply Voltage Recommended DC bus voltage range

VDControl Supply Voltage Recommended control supply voltage range

VCIN(on) Input ON-Voltage Recommended input voltage range to turn on the IPM

fPWM PWM Input Frequency Recommended range of PWM carrier frequency using the recommended application circuit

2. Half-Bridge Test Circuit and

Figure 6.10 shows the stan-

dard half-bridge test circuit and

switching waveforms. Switch-

ing times and FWDi recovery

OFF level for each input signal

should be applied. The control

supply should also be applied

to the non-operating arm of the

module under test and inputs

of these arms should be kept

to their OFF state.

B. When performing OC and SC

tests the applied voltage, VCC,

must be less than VCC(prot)

INTEGRATED 

Figure 6.10 Half-Bridge Test Circuit and Switching Time Definitions

6.3 Area of Safe Operation for

Intelligent Power Modules

The IPMs built-in gate drive and

protection circuits protect it from

many of the operating modes that

would violate the Safe Operation

gerous combinations of voltage

and current that are caused by im-

proper gate drive. In addition, the

maximum operating current is lim-

ited by the over current protection

circuit. Given these constraints the

switching SOA can be defined us-

ing the waveform shown in Figure

6.12. This waveform shows that the

IPM will operate safely as long as

maintained below the VCES specifi-

the control power supply voltage is

between 13.5V and 16.5V. In this

waveform IOC is the maximum cur-

rent that the IPM will allow without

causing an Over Current (OC) fault

across C-E terminals of each IPM

switch are maintained less than the

125°C, and the control supply volt-

age is between 13.5V and 16.5V.

The waveform shown depicts the

controlled slow shutdown that is

used by the IPM in order to help

minimize transient voltages.

The condition VCE ≤ VCES has to

off if VD drops to a level

that could cause desaturation of

the IGBT.

6.4. IPM Self Protection

6.4.1 Self Protection Features

IPM (Intelligent Power Modules)

have sophisticated built-in protec-

tion circuits that prevent the power

a negative supply to off bias the

IGBT. The IPM control input is de-

signed to interface with

optocoupled transistors with a mini-

mum of external components. The

operation and timing of each pro-

tection feature is described in Sec-

tions 6.4.2 through 6.4.5.

6.4.2 Control Supply

Under-Voltage Lock-Out

lock-out protection circuit. In this

diagram an active low input signal

is applied to the input pin of the

IPM by the system controller. The

effects of control supply power up,

power down and failure on the

power device gate drive and fault

output are shown.

1. Application of the main bus

voltage at a rate greater than

will be turned off and a low side

fault signal will be generated. High

side switches are unaffected and

can still be turned on and off by the

system controller. Similarly, in dual

type modules only the low side de-

vice is disabled. The fault output

will remain as long as the over-

temperature condition exists. When

the temperature falls below the

INTELLIGENT POWER MODULE

6.6 Controlling the Intelligent

IPM (Intelligent Power Modules)

are easy to operate. The integrated

drive and protection circuits require

only an isolated power supply and

an isolation voltage rating of at

least two times the IPM’s VCES rat-

ing (i.e. Viso = 2400V for 1200V

module). The current that must be

supplied by the control power sup-

ply is the sum of the quiescent cur-

rent needed to power the internal

control circuits and the current re-

quired to drive the IGBT gate.

Figure 6.30

Figure 6.31

Power Loss

Simulation of

PM100CVA120 (Typ.)

Simulation of

PM200DVA120 (Typ.)

0 20 40 60 10080 180160120 140

third generation Intelligent Power

Modules. Table 6.6 summarizes

control supply requirements for

V-Series IPMs. These tables give

control circuit currents for the qui-

escent (not switching) state and for

20kHz switching. This data is pro-

To get the total control power sup-

ply current required, the quiescent

current must be added back:

44mA is the maximum control cir-

cuit current required for a

PM300DSA120 operating at 7kHz.

Table 6.5 Control Power Requirements for Third Generation IPMs

(VD = 15V, Duty = 50%) ma

N Side P Side (Each Supply)

600V Series

to filter common noise on the con-

trol power supply and provide the

high pulse currents required by the

IPMs internal gate drive circuits.

Isolated control power supplies can

be created using a variety of tech-

niques. Control power can be de-

rived from the main input line using

either a switching power supply

with multiple outputs or a line fre-

lated supply can help to simplify

the interface circuit layout. A distrib-

uted DC-to-DC converter in which

a single oscillator is used to drive

several small isolation transformers

the required isolated power sup-

plies, Mitsubishi has developed two

DC-to-DC converter modules to

work with the IPMs. The M57120L

is a high input voltage step down

converter. When supplied with 113

to 400VDC the M57120L will pro-

duce a regulated 20VDC output.

The 20VDC can then be connected

to the M57140-01 to produce four

6.35 shows an isolated interface

circuit for a seven pack IPM using

M57140-01. Figure 6.36 shows a

complete high input voltage iso-

lated power supply circuit for a dual

type intelligent power module.

Using bootstrap techniques is not

recommended because the voltage

ripple on VD may cause a false trip

of the undervoltage protection in

face circuits. Isolating interfaces al-

low high and low side control sig-

nals to be referenced to a common

logic level. The isolation is usually

provided by optocouplers. How-

ever, fiber optics, pulse transform-

ers, or level shifting circuits could

be used. The most important con-

sideration in interface circuit design

is layout. Shielding and careful

Type Name Typ. Max Typ. Max. Typ. Max. Typ. Max.

PM75RVA060 44 60 72 94 13 18 21 27

PM50RVA120 44 60 73 95 13 18 21 27

PM75CVA120 40 55 70 92 13 18 24 31

PM100CVA120 40 55 80 104 13 18 26 34

PM150CVA120 72 100 128 166 24 34 42 55

PM200DVA120 37 48 52 68 37 48 52 68

PM300DVA120 37 48 52 68 37 48 52 68

SEVEN PACK IPM

330µF

Figure 6.35 Isolated Interface Circuit for Seven-Pack IPMs

supply and isolating circuit wiring is

above and below each other.

Any layout that increases the

primary to secondary capaci-

tance of the isolating interface

can cause noise problems.

V. Use shielding. Printed circuit

the high impedance IPM input

and with a high enough value

that the high speed

optotransistor can still pull the

IPM safely below the recom-

mended maximum VCIN(on).

Figure 6.36 Isolated Interface Circuit for Dual Intelligent Power Modules

R

C (-)

1

C (-)

Figure 6.37 Interface Circuit Layout Example for Dual IPMs

be applied. The related signal

cuits. Unused fault outputs

ample interface circuits for the four

value of the control input pull up re-

mum common mode noise immu-

Like most low speed optos the

Figure 6.38 Interface Circuit Layout for a V-Series IPMs

Figure 6.39 Interface Circuit for Seven-Pack IPMs

Figure 6.40 Interface Circuit for Six-Pack IPMs

Figure 6.41 Interface Circuit for Dual IPMs

PM100DSA120 100 47µF 1.5µF

PM150DSA120 150 47µF 2.0µF

PM200DVA120

PM300DVA120

*Depending on maximum DC link voltage and

needed. (see Section 3.3)