SA58635UK - NXP Semiconductors

1. General description

The SA58635 is a stereo, class-G headphone driver with I2C-bus volume control. The

I2C-bus control allows maximum flexibility with digital volume control, independent

channel enable and mute control.

The output of the SA58635 is referenced around true ground zero. It is designed to

operate at the low supply current of 1.5 mA making it battery friendly. A unique power

management technique provides class-G power efficiency by using a buck converter to

step down the battery supp ly from a typical lithium ion battery (4.8 V to 2.3 V). Efficiency is

further increased by allowing the output amplifier/driver to operate at multiple volt age rails

based on the output/input swing.

The SA58635 delivers 2 ×25 mW minimum into 16 Ω and 32 Ω loads. The SA58635

provides thermal shutdown and self limiting current protection.

The SA58635 is a high fidelity HP driver amplifier with a S/N of 100 dB minimum. An

excellent PSRR of m ore th an 100 dB, differential input circuit topology allows for

maximum noise immunity in the noisy mobile phone environment.

The SA58635 is available in a 16-bump WLCSP (Wafer Level Chip-Size Package) making

it ideal choice for cellular handsets and portable media players.

2. Features

Power supply range: 2.3 V to 5.5 V

High efficiency employing class-G dynamic power management

2×25 mW into 16 Ω or 32 Ω at THD+N = 1 %

Very low THD+N at 0.02 % at VO of 0.7Vo(RMS) and RL of 47 Ω

Integrated charge pump to eliminate DC blocking capacitors, reduce cost and PCB

space while improving low frequency audio fidelity

Excellent PSRR: > 100 dB

S/N performance of 100 dB minimum

Low supply current: 1.5 mA typical

Low shutdown current: 5 μA maximum

I2C-bus interface for −59 dB to ±4 dB volume control, independent channel enable,

mute and software shutdown

Self limiting current with thermal protection and ground loop noise suppression

Pop-and-click suppression

Available in 1.7 mm ×1.7 mm 16-bump WLCSP

SA58635

2 × 25 mW class-G stereo headphone driver with I2C-bus

volume control

Rev. 01 — 26 March 2010 Product data sheet

Product data sheet Rev. 01 — 26 March 2010 2 of 30

NXP Semiconductors SA58635

2 × 25 mW class-G stereo headphone driver

3. Applications

Wireless and cellular handsets

Portab le media players

Portable DVD player

Notebook PC

High fidelity applications

4. Ordering information

5. Block diagram

Table 1. Ordering information

Type number Package

Name Description Version

SA58635UK WLCSP16 wafer level chip-size package; 16 balls; 1.7 ×1.7 ×0.56 mm SA58635UK

Fig 1. Block diagram of SA58635

002aad931

INLP

CLASS-G CONTROL

INLN

I2C-BUS

INTERFACE

CPPCPN

OUTL

SDA

SCL

AGND

SA58635

BUCK

CONVERTER

AVDD

SW HPVDD

THERMAL/SHORT-CIRCUIT

PROTECTION

OUTR

CHARGE

PUMP

HPVSS

SGND

VOLUME

CONTROL

INRP

INRN

Product data sheet Rev. 01 — 26 March 2010 3 of 30

NXP Semiconductors SA58635

2 × 25 mW class-G stereo headphone driver

6. Pinning information

6.1 Pinning

6.2 Pin description

Fig 2. Pin configuration for WLCSP16 Fig 3. Ball mapping for WLCSP16

002aaf27

SA58635UK

Transparent top view

2413

ball A1

index area

SW AVDD OUTL

12 3

AGND CPP HPVDD

CPN HPVSS SGNDC

002aad93

Transparent top view

INLN

INLP

INRP

SDA SCL OUTRD INRN

Table 2. Pin description

Symbol Pin Description

SW A1 buck converter switching mode

AVDD A2 analog supply; same as battery

OUTL A3 headphone left channel output

INLN A4 left channel negative differential input

AGND B1 analog supply ground

CPP B2 charge pump positive capacitor

HPVDD B3 buck converter output voltage

INLP B4 left channel positive differential input

CPN C1 charge pump negative capacitor

HPVSS C2 charge pump negative output voltage

SGND C3 ground sense; connect to headphone jack ground

INRP C4 right chann el positive differential input

SDA D1 I2C-bus serial data

SCL D2 I2C-bus serial clock

OUTR D3 headphone right channel output

INRN D4 right channel neg ative differential input

Product data sheet Rev. 01 — 26 March 2010 4 of 30

NXP Semiconductors SA58635

2 × 25 mW class-G stereo headphone driver

7. Functional description

Refer to Figure 1 “Block diagram of SA58635”.

7.1 Device address

Following a START condition, the bus master mus t ou tpu t th e ad dr es s of th e slave it is

accessing.

The SA58635 responds to two slave addresses: 1100 000xb for standard accesses and

the General Call writes (0000 0000b) for software reset. The last bit of the address byte

defines the operation to be performed. When set to logic 1 a read is selected, while a

logic 0 selects a write operation.

When a reset of the I2C-bus needs to be performed by the master, the master will write to

the General Call address followed by a write of the reset command (0000 0110b). When a

General Call reset command is sent by the master, the SA58635 will respond with an

acknowledge and execute a reset to the digital logic. This will return the register set and

the volume controls to the Power-On Reset (POR) values.

7.2 Control register

Following the successful acknowledgement of the slave address, the bus master will send

a byte to the SA58635, which will be stored in the Control register.

The lowest 3 bits are used as a pointer to determine which register will be accessed

(D[2:0]). The remaining bits are not used and are ignored.

7.3 Register definitions

Table 3. Register summary

number

(hex)

Name Type Function

00 - - Reserved; this address is empty and will be NACK ed.

01 MODE1 read/write Contains the left and right channel amplifier enable bits,

thermal status and the software shutdown bit.

02 VOLCTL read/write Volume setting and mute left and right bits.

03 HIZ read/write High-impedance controls for left and right channel.

04 ID read only Vendor Identification and chip version number.

05 - - Reserved; this address is empty and will be NACK ed.

06 TEST1 read/write This register is for manufacturing test.

07 - read/write Re s erved; this register is empty and will be NACKed.

Product data sheet Rev. 01 — 26 March 2010 5 of 30

NXP Semiconductors SA58635

2 × 25 mW class-G stereo headphone driver

7.3.1 MODE1 register, MODE1

7.3.2 Volume control register, VOLCTL

7.3.3 High-impedance register, HIZ

Table 4. MODE1 - Mode register 1 (address 01h) bit description

Legend: * default value.

Bit Symbol Access Value Description

7 HP_EN_L R/W 0* Left channel inactive. A zero will turn off the left

channel.

1 Left channel active.

6 HP_EN_R R/W 0* Right channel inactive. A zero will turn off the right

channel.

1 Right channel active.

5 - read only 0* Reserved; always reads back as a 0.

4 - read only 0* Reserved; always reads back as a 0.

3 - read only 0* Reserved; always reads back as a 0.

2 - read only 0* Reserved; always reads back as a 0.

1 THERMAL read only 0* Device is operating normally.

1 Device is in thermal shutdown.

0 SWS R/W 0* Device is enabled.

1 Software shutdown; charge pump is disabled.

Table 5. VOLCTL - Volume control regi ster (address 02h) bit description

Legend: * default value.

Bit Symbol Access Value Description

7 MUTEL R/W 0 A zero indicates that the left channel is not muted.

1* Left channel is muted.

6 MUTER R/W 0 A zero indicates that the right channel is not

muted.

1* Right channel is muted.

5 to 1 VOL[4:0] R/W 0* These bits indicate the volume on the outputs per

the gain table shown in Table 9.

0 - read only 0* This bit is reserved and will always return a zero.

Table 6. HIZ - High-impedance register (address 03h) bit description

Legend: * default value.

Bit Symbol Access Value Description

7 to 2 - read only 0* Unused; always returns 0.

1 HIZL R/W 0* Device outputs are not in high-impedance.

1 Device outputs are in high-impedance.

0 HIZR R/W 0* Device outputs are not in high-impedance.

1 Device outputs are in high-impedance.

Product data sheet Rev. 01 — 26 March 2010 6 of 30

NXP Semiconductors SA58635

2 × 25 mW class-G stereo headphone driver

7.3.4 Chip identification register, ID

7.3.5 Test register 1, TEST1

Table 7. ID - Chip identification register (address 04h) bit description

Legend: * default value.

Bit Symbol Access Value Description

7 to 6 SUPPLIER read only 11b* This is the supplier identification for this device,

indicating that this device is manufactured by

NXP Semiconductors.

5 to 4 - read only 00b* Unused; always returns 0.

3 to 0 VER[3:0] read only 0000b These bits indicate the version number for this

device. Initial silicon will be set to 0h.

Table 8. TEST1 - Test register 1 (address 06h) bit d escription

Legend: * default value.

Bit Symbol Access Value Description

7 to 0 - R/W 00h* Software should refrain from writing to this register .

Software should write only 0’s to this register.

Values other than 0 may cause the part to not

function as expected.

Product data sheet Rev. 01 — 26 March 2010 7 of 30

NXP Semiconductors SA58635

2 × 25 mW class-G stereo headphone driver

7.4 Volume control

Volume levels are set in the VOLCTL register (register 02h) as described in Section 7.3.2.

As the volume is changed including muting and un-muting, the SA58635, will step to the

new value at an incremental (or decremental) rate of approximately one millisecond per

step. A full sweep from 00h to 1Fh will take roughly 32 milliseconds. The VOLCTL register

values represent a gain on the output channels as indicated in Table 9.

Table 9. Volume and gain control

Volume control word Gain ±0.5 (dB)

0000 000x −59

0000 001x −55

0000 010x −51

0000 011x −47

0000 100x −43

0000 101x −39

0000 110x −35

0000 111x −31

0001 000x −27

0001 001x −25

0001 010x −23

0001 011x −21

0001 100x −19

0001 101x −17

0001 110x −15

0001 111x −13

0010 000x −11

0010 001x −10

0010 010x −9

0010 011x −8

0010 100x −7

0010 101x −6

0010 110x −5

0010 111x −4

0011 000x −3

0011 001x −2

0011 010x −1

0011 011x 0

0011100x +1

0011101x +2

0011 110x +3

0011 111x +4

1xxx xxxx Mute Left active

x1xx xxxx Mute Right active

Product data sheet Rev. 01 — 26 March 2010 8 of 30

NXP Semiconductors SA58635

2 × 25 mW class-G stereo headphone driver

7.5 Power-on reset

When power is applied to AVDD, an internal po wer- on reset ho lds the SA58635 in a reset

condition until AVDD has reached VPOR. At this point, the reset condition is released and

the SA58635 registers and I2C-bus state machine are initialized to their default states

(all zeroes) causing all the channels to be deselected. Thereaf ter, AVDD must be lowered

below 0.2 V to reset the device.

8. Characteristics of the I2C-bus

The I2C-bus is for 2-way, 2-line communication between different ICs or modules. The two

lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be

connected to a positive supply via a pull-up resistor when connected to the output stages

of a device. Dat a transfer may be initiated only when the bus is not busy.

8.1 Bit transfer

One data b it is transferred durin g each clock pulse . The data on th e SDA line must remain

stable during the HIGH period of the clock pulse as changes in the data line at this time

will be interpreted as control signals (see Figure 4).

8.1.1 START and STOP conditions

Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW

transition of the data line wh ile the clock is HIGH is defined as the START condition (S). A

LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP

condition (P) (see Figure 5).

Fig 4. Bit transfer

mba60

data line

stable;

data valid

change

of data

allowed

SDA

SCL

Fig 5. Definition of START and STOP conditions

mba60

SDA

SCL

STOP condition

START condition

Product data sheet Rev. 01 — 26 March 2010 9 of 30

NXP Semiconductors SA58635

2 × 25 mW class-G stereo headphone driver

8.2 System configuration

A device generating a message is a ‘transmitter’; a device receiving is the ‘receiver’. The

device that controls the message is the ‘master’ and the devices which are controlled by

the master are the ‘slaves’ (see Figure 6).

8.3 Acknowledge

The number of data bytes transferred between the START and th e STOP conditions from

transmitter to receiver is not limited. Each byte of eight bits is followed by one

acknowledge bit. The acknowledge bi t is a HIGH level put on the bus by the transmitter,

whereas the master generates an extra acknowledge related clock pulse.

A slave receiver which is addresse d must gener ate an acknowledg e af ter the reception of

each byte. Also a master must generate an acknowledge after the reception of each byte

that has been clocke d ou t of th e sla v e tr ansmitter. The device that acknowledges has to

pull down the SDA line during the acknowledge clo ck pulse, so that the SDA line is stable

LOW during the HIGH period of the acknowled ge related clock pulse; set-up time and h old

time must be taken into account.

A master receiver must signal an end of data to the transmitter by not generating an

acknowledge on the last byte that has been clocke d out of the slave. In this event, the

transmitter must leave the data line HIGH to enable the master to generate a STOP

condition.

Fig 6. Syste m co nfi gura t io n

002aaa966

MASTER

TRANSMITTER/

RECEIVER

SLAVE

RECEIVER

SLAVE

TRANSMITTER/

RECEIVER

MASTER

TRANSMITTER

MASTER

TRANSMITTER/

RECEIVER

SDA

SCL

I2C-BUS

MULTIPLEXER

SLAVE

Fig 7. Acknowledgement on the I2C-bus

002aaa98

START

condition

9821

clock pulse for

acknowledgement

not acknowledge

acknowledge

data output

by transmitter

data output

by receiver

SCL from master

Product data sheet Rev. 01 — 26 March 2010 10 of 30

NXP Semiconductors SA58635

2 × 25 mW class-G stereo headphone driver

9. Bus transactions

(1) See Table 3 for register definition.

Fig 8. Write to a specific register

A5 A4 A3 A2 A1 A0 0 AS A6

slave address

START condition R/W

acknowledge

from slave

002aad61

data for register D[5:0](1)

X D5 D4 D3 D2 D1 D0X

control register

Auto-Increment flag

acknowledge

from slave

acknowledge

from slave

STOP

condition

Fig 9. Software reset

0 0 0 0 0 0 0 AS 0

general call

START condition R/W

acknowledge

from slave

002aae11

0 0 0 0 1 1 00

software reset

acknowledge

from slave

STOP

condition

Product data sheet Rev. 01 — 26 March 2010 11 of 30

NXP Semiconductors SA58635

2 × 25 mW class-G stereo headphone driver

10. Limiting values

[1] VDD is the supply voltage on pin AVDD.

[2] Breakdown current of output protection diodes.

[3] ESD shock needs to be conducted to the connector pins (see Figure 10).

All functions of a device/system perform as designed during and after exposure to a disturbance.

Remark: External ESD suppressor ASIP protects the amplifier outputs. Suppressor is between amplifier and connector;

15 Ωserial resistance + 5 nF capacitor and Zener diodes (14 V breakdown voltage) connected to the ground. In addition, there is a

ferrite bead in series between suppressor and connector (see Figure 10).

Remark: Air discharge test can be ignored if contact discharge test range is increased to corresponding same voltages as air discharge

(reason: contact discharge is more stable and repeatable test than air discharge).

Table 10. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).[1]

Symbol Parameter Conditions Min Max Unit

VDD supply voltage Active mode −0.3 +6.0 V

Shutdown mode −0.3 +6.0 V

VIinput voltage INRN, INRP, INLN, INLP −0.3 2.1 V

VIO input/output voltage SCL, SDA VAGND −0.5 VDD V

IBR breakdown current continuous [2] -200mA

P power dissipation WLCSP16; derating factor 10 mW/K

Tamb =25°C - 1000 mW

Tamb =70°C-550mW

Tamb =85°C-400mW

Tamb ambient temperature operating in free air −40 +85 °C

Tjjunction temperature operating −40 +85 °C

Tstg storage temperature −65 +150 °C

VESD electrostatic discharge

voltage human body model ±4000 - V

machine model ±300 - V

charged-device model ±750 - V

device use level:

IEC61000-4-2 level 4, contact [3] ±30 - kV

IEC61000-4-2 level 4, air discharge [3] ±30 - kV

Fig 10. ESD suppressor ASIP

ESD

ASIP

002aae11

SA58635

OUTR

OUTL

SGND

AGND

FB shield

A1 A2

C2C1

IP5311CX5/LF

Product data sheet Rev. 01 — 26 March 2010 12 of 30

NXP Semiconductors SA58635

2 × 25 mW class-G stereo headphone driver

11. Static characteristics

[1] VDD is the supply voltage on pin AVDD.

Table 11. Static characteristics

VDD = 3.6 V; RL=15

+32

; two channels in phase; Tamb =25

C, unless otherwise specified.[1]

Symbol Parameter Conditions Min Typ Max Unit

VDD supply voltage continuous 2.3 - 5.5 V

IDD supply current both channels enabled;

no audio signal -1.5-mA

IDD(sd) shutdown mode supply current I2C-bus in operation - 1 5 μA

Vi(cm) common-mode input voltage differential −1.3 - +1.3 V

VPOR power-on reset voltage - 2.1 - V

|VO(offset)|output offset voltage absolute value;

both channels enabled -0.53mV

PSRR power supply rejection ratio Gv = 0 dB 100 - - dB

Ziinput impedance differential 20 - - kΩ

Zooutput impedance high-impedance mode

<40 kHz 10 - - kΩ

6MHz 500 - - Ω

36 MHz 75 - - Ω

I2C-bus pins (SCL, SDA)

IOL LOW- l evel output cur ren t SDA output; VOL =0.4V;

VDD =3.6V 3--mA

ILI input leakage current SCL, SDA −1-+1μA

Ciinput capacitance SCL, SDA - - 10 pF

VIH HIGH-level input voltage SCL, SDA 1.2 - - V

VIL LOW-level input voltage SCL, SDA - - 0.6 V

Fig 11. Supply current versus supply voltage

002aaf009

VDD (V)

2.5 5.54.53.5

IDD

(mA)

Product data sheet Rev. 01 — 26 March 2010 13 of 30

NXP Semiconductors SA58635

2 × 25 mW class-G stereo headphone driver

12. Dynamic characteristics

[1] VDD is the supply voltage on pin AVDD.

Table 12. Dy namic characteristics

VDD = 3.6 V; RL=15

+32

; two channels in phase; Tamb =25

C; unless otherwise specified.[1]

Symbol Parameter Conditions Min Typ Max Unit

Pooutput power stereo; f = 1 kHz; THD+N = 1 % 2 ×25 - - mW

IDD supply current output 2 ×100 μW at 3 dB crest factor - 2.5 3.5 mA

output 2 ×500 μW at 3 dB crest factor - 4.5 5.5 mA

output 2 ×1 mW at 3 dB crest factor - 6.5 7.5 mA

Vo(RMS) RMS output voltage amplifier

RL=16Ω; THD+N = 1 %; L + R in phase 0.63 - - V

RL=32Ω; THD+N = 1 %; L + R in phase 0.89 - - V

THD+N total harmonic

distortion-plus-noise f=1kHz; V

O= 700 mV (RMS) - - 0.02 %

SVRR supply voltage ripple

rejection Gv= 4 dB; f = 217 Hz 75 - - dB

αct(ch) channel crosstalk Po= 15 mW ; f = 1 kHz 90 - - dB

line out > 10 kΩ80 - - dB

Vn(o)(RMS) RMS output noise voltage Gv = 4 dB; A-weight - 7 - μV

td(sd-startup) delay time from shutdown

to start-up --15ms

S/N signal-to-noise ratio VO= 1 V (RMS); f = 1 kHz 100 - - dB

Toff switch-off temperature threshold - 180 - °C

hysteresis - 35 - °C

(1) THD+N = 10 %

(2) THD+N = 1 % (1) THD+N + 10 %

(2) THD+N + 1 %

a. RL = 16 Ω; in phase b. RL=32Ω; in phase

Fig 12. Output powe r per channel versus sup ply voltage

VDD (V)

2.5 5.54.53.5

002aaf025

(mW)

(1)

(2)

VDD (V)

2.5 5.54.53.5

002aaf026

(mW)

(1)

(2)

Product data sheet Rev. 01 — 26 March 2010 14 of 30

NXP Semiconductors SA58635

2 × 25 mW class-G stereo headphone driver

a. THD+N = 1 %; in phase b. THD+N = 1 %; out of phase

(1) VDD = 2.5 V

(2) VDD = 3.6 V

(3) VDD = 5 V

Fig 13. Output powe r per channel versus lo ad resistance

002aaf027

RL (Ω)

10 103

102

100

(mW)

(3)

(1)

(2)

(3)

002aaf028

RL (Ω)

10 103

102

100

(mW)

(1)

(2)

a. f = 1 kHz; RL=16Ωb. f = 1 kHz; RL=32Ω

Fig 14. Supply current versus total output power

002aaf029

Po(tot) (mW)

10−3102

1010−2110−1

102

IDD

(mA)

VDD = 5.0 V

3.6 V

2.5 V

002aaf030

Po(tot) (mW)

10−3102

1010−2110−1

102

IDD

(mA)

VDD = 5.0 V

3.6 V

2.5 V

Product data sheet Rev. 01 — 26 March 2010 15 of 30

NXP Semiconductors SA58635

2 × 25 mW class-G stereo headphone driver

(1) RL=16Ω

(2) RL=32Ω

f = 1 kHz; THD+N = 1 %

(1) RL=16Ω

(2) RL=32Ω

(3) RL= 600 Ω

(4) RL1000 Ω

Fig 15. Tota l power dissipation versus

total output power Fig 16. RMS output voltage versus supply voltage

RL=16Ω; Po=15mW R

L=16Ω

Fig 17. Crosstalk versus frequency Fig 18. Output amplitude versu s frequency

002aaf031

o(tot)

(mW)

−2

1010

−1

tot

(mW)

(1)

(2)

002aaf032

VDD (V)

2.5 5.54.53.5

1.0

1.2

0.8

1.4

1.6

Vo(RMS)

(V)

0.6

(1)

(2)

(3)

(4)

002aaf033

f (Hz)

10 105

104

102103

−60

−40

−80

−20

αct

(dB)

−100

f (kHz)

02015510

002aaf034

−90

−60

−120

−30

−150

output amplitude (dBV)

Product data sheet Rev. 01 — 26 March 2010 16 of 30

NXP Semiconductors SA58635

2 × 25 mW class-G stereo headphone driver

a. f = 1 kHz; RL=16Ωb. f = 1 kHz; RL=32Ω

(1) In phase.

(2) Out of phase.

c. f = 1 kHz; RL=32Ω; VDD = 3.6 V

Fig 19. Total harmonic distortion-plus-noise versus output power

002aaf011

Po (W)

10−410−1

10−2

10−3

10−1

102

THD+N

(%)

10−2

VDD = 5.0 V

3.6 V

2.5 V

002aaf012

Po (W)

10−410−1

10−2

10−3

10−1

10−2

102

THD+N

(%)

10−3

VDD = 5.0 V

3.6 V

2.5 V

002aaf010

Po (W)

10−410−1

10−2

10−3

10−1

102

THD+N

(%)

10−2

(1) (2)

Product data sheet Rev. 01 — 26 March 2010 17 of 30

NXP Semiconductors SA58635

2 × 25 mW class-G stereo headphone driver

a. RL = 16 Ωb. RL=32Ω

(1) Po = 1 mW / channel

(2) Po = 4 mW / channel

(3) Po = 10 mW / channel

Fig 20. Total harmonic distortion-plus-noise versus frequency (VDD =2.5V)

002aaf013

f (Hz)

10 10

−1

−2

THD+N

(%)

−3

(1)

(2)

(3)

002aaf014

f (Hz)

10 10

−1

−2

THD+N

(%)

−3

(1)

(3)

(2)

a. RL = 16 Ωb. RL=32Ω

(1) Po = 1 mW / channel

(2) Po = 10 mW / channel

(3) Po = 15 mW / channel

Fig 21. Total harmonic distortion-plus-noise versus frequency (VDD =3.6V)

002aaf015

f (Hz)

10 10

−1

−2

THD+N

(%)

−3

(1)

(3)

(2)

002aaf016

f (Hz)

10 10

−1

−2

THD+N

(%)

−3

(1)

(3)

(2)

Product data sheet Rev. 01 — 26 March 2010 18 of 30

NXP Semiconductors SA58635

2 × 25 mW class-G stereo headphone driver

(1) Po = 1 mW / channel

(2) Po = 10 mW / channel

(3) Po = 15 mW / channel

(1) Po = 1 mW / channel

(2) Po = 10 mW / channel

(3) Po = 20 mW / channel

a. RL = 16 Ωb. RL=32Ω

Fig 22. Total harmonic distortion-plus-noise versus frequency (VDD =5V)

002aaf017

f (Hz)

10 10

−1

−2

THD+N

(%)

−3

(1) (3)

(2)

002aaf018

f (Hz)

10 10

−1

−2

THD+N

(%)

−3

(1)

(3)

(2)

Product data sheet Rev. 01 — 26 March 2010 19 of 30

NXP Semiconductors SA58635

2 × 25 mW class-G stereo headphone driver

RL=32Ω; f = 1 kHz; Vi(p-p) = 200 mV.

Based on single channel 1 demo board only.

Fig 23. Start-up waveform

RL=32Ω; f = 1 kHz; Vi(p-p) = 200 mV; Gv=4dB.

Based on single channel 1 demo board only.

Fig 24. Shutdown waveform

time (ms)

002aaf035

voltage

(V)

vertical scale = 100 mV/div

horizontal scale = 2 ms/div

SDA

time (ms)

002aaf036

voltage

(V)

vertical scale = 100 mV/div

horizontal scale = 2 ms/div

SDA

Product data sheet Rev. 01 — 26 March 2010 20 of 30

NXP Semiconductors SA58635

2 × 25 mW class-G stereo headphone driver

[1] tVD;ACK = time for Acknowledgement signal from SCL LOW to SDA (out) LOW.

[2] tVD;DAT = minimum time for SDA data out to be valid following SCL LOW.

[3] A master device must internally provide a hold time of at least 300 ns for the SDA signal (refer to the VIL of the SCL signal) in order to

bridge the undefined region of SCL’s falling edge.

[4] The maximum tf for the SDA and SCL bus lines is specified at 300 ns. The maximum fall time (tf) for the SDA output stage is specified at

250 ns. This allows series protection resistors to be connected between the SDA and the SCL pins and the SDA/SCL bus lines without

exceeding the maximum specified tf.

[5] Cb= total capacitance of one bus line in pF.

[6] Input filters on the SDA and SCL inputs suppress noise spikes less than 50 ns.

Table 13. Dynamic characteristics for I2C-bus

Symbol Parameter Conditions Standard-mode

I2C-bus Fast-mode

I2C-bus Unit

Min Max Min Max

fSCL SCL clock frequency 0 100 0 400 kHz

tBUF bus free time between a STOP and START

condition 4.7 - 1.3 - μs

tHD;STA hold time (repeated) START condition 4.0 - 0.6 - μs

tSU;STA set-up time for a repeated START condition 4.7 - 0.6 - μs

tSU;STO set-up time for STOP condition 4.0 - 0.6 - μs

tHD;DAT data hold time 0 - 0 - ns

tVD;ACK data valid acknowledge time [1] 0.3 3.45 0.1 0.9 μs

tVD;DAT data valid time [2] 0.3 3.45 0.1 0.9 μs

tSU;DAT data set-up time 250 - 100 - ns

tLOW LOW period of the SCL clock 4.7 - 1.3 - μs

tHIGH HIGH period of the SCL clock 4.0 - 0.6 - μs

tffall time of both SDA and SCL signals [3][4] - 300 20 + 0.1Cb[5] 300 ns

trrise time of both SDA and SCL signals - 1000 20 + 0.1Cb[5] 300 ns

tSP pulse width of spikes that must be suppressed

by the input filter [6] -50 - 50ns

Product data sheet Rev. 01 — 26 March 2010 21 of 30

NXP Semiconductors SA58635

2 × 25 mW class-G stereo headphone driver

13. Application information

13.1 Power supply decoupling considerations

The SA58635 is a stereo class-G headphone driver amplifier that requires proper power

supply decoupling to ensure the rated performance for THD+N and power efficiency. To

decouple high frequency transients, power supply spikes and digital noise on th e po we r

bus line, a low Equivalent Series Resistance (ESR) capacitor, of typically 1 μF is placed

as close as possible to the AVDD terminals of the device. It is important to place the

decoupling capacitor at the po we r pin s of the device because any resistance or

inductance in the PCB trace between the device and the capacitor can cause a loss in

efficiency. 10 μF or greater capacitors are usually not required due to high PSRR of the

SA58635.

13.2 Input capacitor selection

The SA58635 does not require input coupling capacitors when used with a differential

audio source that is biased from −1.3 V to +1.3 V. In other words, the input signal must be

biased within the common-mode input voltage r ange. If high-pass filtering is required or if

it is driven using a single-ended source, input coupling capacitors are required.

The 3 dB cut-off frequency is created by the input coupling capacitors and the input

resist ance of the SA58635. Ci is the value of the input coupling capacitors. The input

resistance (Ri) of the SA58635 is a function of amplifier gain; it will vary from

approximately 11.06 kΩ (minimum) to 28.47 kΩ (maximum) (see Table 14).

Fig 25. Typical application

002aae120

INLP

INLN

CPP CPN SDASCL

AGND

SA58635

AVDDSW HPVDD

HPVSS

INRP

INRN

3.3 μH10 μF

2.3 V to 5.5 V

AUDIO

SOURCE

1 μF

2.2 μF

I2C-bus

to headphone jack

OUTL

OUTR

SGND

shield

ESD

ASIP

A1 A2

IP5311CX5/LF

Product data sheet Rev. 01 — 26 March 2010 22 of 30

NXP Semiconductors SA58635

2 × 25 mW class-G stereo headphone driver

The 3 dB cut-off frequency is calculated by Equation 1:

(1)

Since the values of the inp ut couplin g ca pacitor and the input resistor affects the low

frequency performance of the audio amplifier, it is important to consider in the system

design.

Table 14. Inp ut resistance as a function of amplifier gain

Steps Ri (kΩ)Gain (dB)

0 28.468 −58.986

1 28.450 −55.185

2 28.421 −51.083

3 28.375 −47.117

4 28.298 −42.942

5 28.177 −38.819

6 27.995 −34.884

7 27.697 −30.758

8 27.302 −27.155

9 26.982 −24.997

10 26.587 −22.858

11 26.163 −20.981

12 25.550 −18.751

13 24.910 −16.826

14 24.183 −14.967

15 23.264 −12.953

16 22.173 −10.893

17 21.560 −9.846

18 20.947 −8.861

19 20.334 −7.925

20 19.607 −6.868

21 18.880 −5.857

22 18.267 −5.034

23 17.420 −3.930

24 16.572 −2.857

25 15.725 −1.804

26 14.998 −0.913

27 14.207 0.052

28 13.480 0.939

29 12.754 1.831

30 11.906 2.884

31 11.058 3.958

f3dB–1

2πRi

×Ci

-----------------------------

Product data sheet Rev. 01 — 26 March 2010 23 of 30

NXP Semiconductors SA58635

2 × 25 mW class-G stereo headphone driver

For a required 3 dB cut-off frequency, Equation 2 is used to determine Ci:

(2)

For Ci=1μF, the 3 dB cut-off frequency will vary with gain settings. For gain setting of

4 dB, the SA58635 input resistance, Ri is 11.06 kΩ (refer to Table 14). Substit utin g Ri and

Ci in Equation 1 yields f−3dB =14.4Hz.

13.3 PCB layout considerations

Component location is very important for performance of the SA58635. Place all external

components very close to the device. Placing decoupling capacitors directly at the power

supply pins increases efficiency because the resistance and inductance in the trace

between the device power supply pins and the decoupling cap acitor causes a loss in

power efficiency.

The trace width and routing are also very import ant for power output and noise

considerations.

For the input pins (INLP, INLN, INRP, INRN), the traces must be symmetrical and run

side-by-side to maximize common-mode cancellation.

13.4 Thermal information

The SA58635 16-bump WLCSP package ground bumps are soldered directly to the PCB

heat spreader. The heat spreader is the PCB ground plane or special heat sinking layer

designed into the PCB. T he thickness and area of the heat spreade r may be maximized to

optimize heat transfer and achieve lower package thermal resistance.

Ci1

2πRi

×f3dB–

------------------------------------

Product data sheet Rev. 01 — 26 March 2010 24 of 30

NXP Semiconductors SA58635

2 × 25 mW class-G stereo headphone driver

14. Package outline

Fig 26. Package outline SA58635UK (WLCSP16)

References

Outline

version

European

projection Issue date

IEC JEDEC JEITA

SA58635UK

sa58635uk_po

10-01-18

10-01-19

Unit

max

nom

min

0.615

0.560

0.505

0.23

0.20

0.17

0.29

0.26

0.23

1.725

1.695

1.665

1.725

1.695

1.665

0.4 1.2 0.02 0.03

Dimensions

LCSP16: wafer level chip-size package; 16 balls; 1.7 x 1.7 x 0.56 mm SA58635U

A1A2

0.385

0.360

0.335

bDEee

1.2

e2vw

0.01

0 0.5 1 mm

scale

ball A1

index area

detail X

AC B

∅ v

C∅ w

ball A1

index area

1432

Product data sheet Rev. 01 — 26 March 2010 25 of 30

NXP Semiconductors SA58635

2 × 25 mW class-G stereo headphone driver

15. Soldering of WLCSP packages

15.1 Introduction to soldering WLCSP packages

This text provides a very brief insight into a complex technology. A more in-depth account

of soldering WLCSP (Wafer Level Chip-Size Packages) can be found in application note

AN10439 “W afer Level Chip Scale Package” and in application note AN10365 “Surface

mount reflow soldering description”.

Wave soldering is not suitable for this package.

All NXP WLCSP packages are lead-free.

15.2 Board mounting

Board mounting of a WLCSP requires several steps:

1. Solder paste printing on the PCB

2. Component placement with a pick and place machine

3. The reflow soldering itself

15.3 Reflow soldering

Key characteristics in reflow soldering are :

•Lead-free ve rsus SnPb soldering; note th at a lead-free reflow process usua lly leads to

higher minimum peak temperatures (see Figure 27) than a PbSn process, thus

reducing the process window

•Solder paste printing issues, such as smearing, release, and adjusting th e process

window for a mix of large and small components on one board

•Reflow temperature profile; this profile includes preheat, reflow (in which the board is

heated to the peak temperature), and cooling down. It is imperative that the peak

temperature is high enoug h for the solder to make reliable solder joint s (a solder paste

characterist ic) while be ing low en oug h th at th e packages an d/or boards are no t

damaged. The pea k temperature of the package depends on package thickness and

volume and is classified in accordance with Table 15.

Moisture sensitivity precautions, as indicated on the packing, must be respected at all

times.

Studies have shown that small packages reach higher temperatures during reflow

soldering, see Figure 27.

Table 15. Lead-free process (from J-STD-020C)

Package thickness (mm) Package reflow temperature (°C)

Volume (mm3)

< 350 350 to 2000 > 2000

< 1.6 260 260 260

1.6 to 2.5 26 0 250 245

> 2.5 250 245 245

Product data sheet Rev. 01 — 26 March 2010 26 of 30

NXP Semiconductors SA58635

2 × 25 mW class-G stereo headphone driver

For further information on temperature profiles, refer to application note AN10365

“Surface mount reflow soldering description”.

15.3.1 Stand off

The stand off between the substrate and the chip is determined by:

•The amount of printed solder on the substrate

•The size of the solder land on the substrate

•The bump height on the chip

The higher the stand off, the better the stresses are released due to TEC (Thermal

Expansion Coefficient) differences between substrate and chip.

15.3.2 Quality of solder joint

A flip-chip joint is considered to be a good joint when the entire solder land has been

wetted by the solder from the bump. The surface of the joint should be smooth and the

shape symmetrical. The soldered joints on a chip should be uniform. Voids in the bumps

after reflow can occur during the reflow process in bumps with high ratio of bump diameter

to bump height, i.e. low bumps with large diameter. No failures have been found to be

related to these voids. Solder joint inspection after reflow can be done with X-ray to

monitor defects such as bridging, open circuits and voids.

15.3.3 Rework

In general, rework is not recommended. By rework we mean th e process of removing the

chip from the substrate and replacing it with a new chip. If a chip is removed from the

substrate, most solder balls of the chip will be damaged. In that case it is recommended

not to re-use the chip again.

MSL: Moisture Sensitivity Level

Fig 27. Temperature profiles for large and small components

001aac84

temperature

time

minimum peak temperature

= minimum soldering temperature

maximum peak temperature

= MSL limit, damage level

peak

temperature

Product data sheet Rev. 01 — 26 March 2010 27 of 30

NXP Semiconductors SA58635

2 × 25 mW class-G stereo headphone driver

Device removal can be done when the substrate is heated until it is certain that all solder

joints are molten. The chip can then be carefully removed from the substrate without

damaging the tracks and solder lands on the substrate. Removing the device must be

done using plastic tweezers, because metal tweezers can damage the silicon. The

surface of the substrate should be carefully cleaned and all solder and flux residues

and/or underfill removed. When a new chip is placed on the substrate, use the flux

process instead of solder on the sold er lands. Apply flux on the bumps at the chip side as

well as on the solder pads on the substrate. Place and align the new chip while viewing

with a microscope. To reflow the solder, use the solder profile shown in application note

AN10365 “Surface mount reflow soldering description”.

15.3.4 Cleaning

Cleaning can be done after reflow soldering.

16. Abbreviations

17. Revision history

Table 16. Abbreviations

Acronym Description

ASIP Application Specific Instruction-set Processor

DVD Digital Versatile Disk

ESD ElectroStatic Discharge

ESR Equivalent Series Resistance

FB FeedBack

HP HeadPhone

I2C-bus Inter-integ rated Circuit bus

PC Personal Computer

PCB Printed-Circuit Board

Table 17. Revision history

Document ID Release date Data sheet status Change notice Supersedes

SA58635_1 20100326 Product data sheet - -

Product data sheet Rev. 01 — 26 March 2010 28 of 30

NXP Semiconductors SA58635

2 × 25 mW class-G stereo headphone driver

18. Legal information

18.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term ‘short data sheet’ is explained in section “Definitions”.

[3] The product status of de vice(s) descr ibed in th is document m ay have cha nged since thi s document w as publish ed and may di ffe r in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

18.2 Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liab ility for the consequences of

use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and tit le. A short data sh eet is intended

for quick reference only and shou ld not b e relied u pon to cont ain det ailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semicond uctors sales

office. In case of any inconsistency or conflict with the shor t data sheet, the

full data sheet shall pre va il.

Product specificat ion — The information and data provided in a Product

data sheet shall define the specification of the product as agreed be tween

NXP Semiconductors and its customer, unless NXP Semiconductors and

customer have explicitly agreed otherwise in writing. In no event however,

shall an agreement be valid in which the NXP Semiconductors product is

deemed to off er functions and qualities beyond those described in the

Product data sheet.

18.3 Disclaimers

Limited warr a nty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any

representations or warrant ies, expressed or implied, as to the accuracy or

completeness of such information and shall have no liability for the

consequences of use of such information.

In no event shall NXP Semiconductors be liable for any indirect, incidental,

punitive, special or consequ ential damages (including - wit hout limitation - lost

profits, lost savings, business interruption, costs related to the removal or

replacement of any products or rework charges) whether or not such

damages are based on tort (including negligence), warranty, breach of

contract or any other legal theory.

Notwithstanding any damages that customer might incur for any reason

whatsoever, NXP Semiconductors’ aggreg ate and cumulative l iability towards

customer for the products described herein shall be limited in accordance

with the Terms and conditions of commercial sale of NXP Semiconductors.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all informa tion supplied prior

to the publication hereof .

Suitability for use — NXP Semiconductors products are not designed,

authorized or warranted to be suitable for use in medical, military, aircraft,

space or life support equipment, nor in applications where failur e or

malfunction of an NXP Semiconductors product can reaso nably be expected

to result in perso nal injury, death or severe property or envi ronmental

damage. NXP Semiconductors accepts no liab ility for inclusion and/or use of

NXP Semiconductors products in such equipment or applications and

therefore such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

specified use without further testing or modification.

NXP Semiconductors does not accept any liability related to any default,

damage, costs or problem which is based on a weakness or default in the

customer application /use or t he application/use of customer’s third party

customer(s) (hereinafter both referred to as “Application”). It is customer’s

sole responsibility to check whether the NXP Semiconductors product is

suitable and fit for the Appl ica tion plann ed. Customer has to do all necessary

testing for the Application in order to avoid a default of the Application and t he

product. NXP Semiconductors does not accept any liability in this respect.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will ca use permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

Terms and conditions of commercial sale — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individua l agreement. In case an individual

agreement is concluded only the ter m s and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

No offer to sell or license — Nothing i n this document may be interpreted or

construed as an of fer t o sell product s that is open for accept ance or the gr ant,

conveyance or implication of any license under any copyrights, patents or

other industrial or inte llectual property rights.

Export control — This document as well as the item(s) described herein

may be subject to export control regulatio ns. Export might require a prior

authorization from national authorities.

Non-automotive qualified products — Unless this data sheet expressly

states that t his specific NXP Semiconductors product is automotive qualified,

the product is not suit ab le for aut omotive u se. It is neit her qua lifi ed n or test ed

in accordance with automotive testing or application requirements. NXP

Semiconductors accepts no liability for inclu sio n and/or use of

non-automotive qualifie d products in automotive equipment or applications.

In the event that customer uses the product for design-in and use in

automotive applications to automotive specifications and st andards, customer

(a) shall use the product without NXP Semiconductors’ warranty of the

Document status[1][2] Product status[3] Definition

Objective [short] data sheet Development This document contains data from the objective specification for product development.

Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.

Product [short] data sheet Production This document contain s the product specification.

Product data sheet Rev. 01 — 26 March 2010 29 of 30

NXP Semiconductors SA58635

2 × 25 mW class-G stereo headphone driver

product for such au tomotive applicat ions, use and specifications, and (b)

whenever customer uses the product for automotive applications beyond

NXP Semiconductors’ specifications such use shall be solely at customer’s

own risk, and (c) customer fully indemnifies NXP Semiconductors for any

liability, damages or failed product claims resulting from customer design and

use of the product for automotive appl ications beyond NXP Semiconductors’

standard warrant y and NXP Semiconductors’ product specifications.

18.4 Trademarks

Notice: All referenced b rands, produc t names, service names and trademarks

are the property of their respective ow ners.

I2C-bus — logo is a trademark of NXP B.V.

19. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

NXP Semiconductors SA58635

2 × 25 mW class-G stereo headphone driver

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 26 March 2010

Document identifier: S A586 35_1

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

20. Contents

1 General description. . . . . . . . . . . . . . . . . . . . . . 1

2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

4 Ordering information. . . . . . . . . . . . . . . . . . . . . 2

5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2

6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 3

6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3

7 Functional description . . . . . . . . . . . . . . . . . . . 4

7.1 Device address. . . . . . . . . . . . . . . . . . . . . . . . . 4

7.2 Control register. . . . . . . . . . . . . . . . . . . . . . . . . 4

7.3 Register definitions. . . . . . . . . . . . . . . . . . . . . . 4

7.3.1 MODE1 regist er, MODE1. . . . . . . . . . . . . . . . . 5

7.3.2 Volume control register, VOLCTL. . . . . . . . . . . 5

7.3.3 High-impedance register, HIZ. . . . . . . . . . . . . . 5

7.3.4 Chip identification register, ID. . . . . . . . . . . . . . 6

7.3.5 Test register 1, TEST1 . . . . . . . . . . . . . . . . . . . 6

7.4 Volume control . . . . . . . . . . . . . . . . . . . . . . . . . 7

7.5 Power-on reset. . . . . . . . . . . . . . . . . . . . . . . . . 8

8 Characteristics of the I2C-bus . . . . . . . . . . . . . 8

8.1 Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

8.1.1 START and STOP conditions . . . . . . . . . . . . . . 8

8.2 System configuration . . . . . . . . . . . . . . . . . . . . 9

8.3 Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . 9

9 Bus transactions . . . . . . . . . . . . . . . . . . . . . . . 10

10 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 11

11 Static characteristics. . . . . . . . . . . . . . . . . . . . 12

12 Dynamic characteristics . . . . . . . . . . . . . . . . . 13

13 Application information. . . . . . . . . . . . . . . . . . 21

13.1 Power supply decoupling considerations . . . . 21

13.2 Input capacitor selection. . . . . . . . . . . . . . . . . 21

13.3 PCB layout considerations . . . . . . . . . . . . . . . 23

13.4 Thermal information . . . . . . . . . . . . . . . . . . . . 23

14 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 24

15 Soldering of WLCSP packages. . . . . . . . . . . . 25

15.1 Introduction to soldering WLCSP packages. . 25

15.2 Board mounting . . . . . . . . . . . . . . . . . . . . . . . 25

15.3 Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . 25

15.3.1 Stand off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

15.3.2 Quality of solder joint . . . . . . . . . . . . . . . . . . . 26

15.3.3 Rework . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

15.3.4 Cleaning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

16 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 27

17 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 27

18 Legal information . . . . . . . . . . . . . . . . . . . . . . 28

18.1 Data sheet status. . . . . . . . . . . . . . . . . . . . . . 28

18.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

18.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 28

18.4 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 29

19 Contact information . . . . . . . . . . . . . . . . . . . . 29

20 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30