Sample & Buy Product Folder Technical Documents Support & Community Tools & Software LM5009A SNVS608H - JUNE 2009 - REVISED SEPTEMBER 2016 LM5009A 100-V, 150-mA Constant ON-Time Buck Switching Regulator 1 Features 3 Description * * * * * * * The LM5009A is a functional variant of the LM5009 COT buck switching regulator. The functional differences of the LM5009A are: The minimum input operating voltage is 6 V, the ON-time equation is slightly different, and the requirement for a minimum load current is removed. 1 * * * * * * * Operating Input Voltage Range: 6 V to 95 V Integrated 100-V, N-Channel Buck Switch Internal Start-Up Regulator No Loop Compensation Required Ultra-Fast Transient Response ON Time Varies Inversely With Input Voltage Operating Frequency Remains Constant With Varying Line Voltage and Load Current Adjustable Output Voltage From 2.5 V Highly Efficient Operation Precision Internal Reference Low Bias Current Intelligent Current Limit Thermal Shutdown 8-Pin VSSOP and 8-Pin WSON (4 mm x 4 mm) Packages 2 Applications * * * Non-Isolated Telecommunication Buck Regulator Secondary High-Voltage Post Regulator 42-V Automotive Systems The LM5009A step-down switching regulator features all of the functions required to implement a low cost, efficient, buck bias regulator. This high voltage regulator contains an 100-V N-channel buck switch. The device is easy to implement and is provided in the 8-pin VSSOP and the thermally enhanced 8-pin WSON packages. The regulator is based on a control scheme using an ON time inversely proportional to VIN. This feature allows the operating frequency to remain relatively constant. The control scheme requires no loop compensation. An intelligent current limit is implemented with forced OFF time, which is inversely proportional to VOUT. This scheme ensures short-circuit control while providing minimum foldback. Other features include: thermal shutdown, undervoltage lockout (VCC), gate drive undervoltage lockout, max duty cycle limiter, and a precharge switch. Device Information(1) PART NUMBER PACKAGE LM5009A BODY SIZE (NOM) VSSOP (8) 4.00 mm x 4.00 mm WSON (8) 4.00 mm x 4.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Typical Application, Basic Step-Down Regulator 6V - 95V Input VIN VCC VIN C1 C3 LM5009A RT BST GND C4 RT/SD L1 VOUT SW RCL SHUTDOWN D1 RFB2 RCL RTN R3 C2 FB RFB1 GND Copyright (c) 2016, Texas Instruments Incorporated 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LM5009A SNVS608H - JUNE 2009 - REVISED SEPTEMBER 2016 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 6.7 4 4 4 4 5 6 7 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Switching Characteristics .......................................... Typical Characteristics .............................................. Detailed Description .............................................. 8 7.1 Overview ................................................................... 8 7.2 Functional Block Diagram ......................................... 8 7.3 Feature Description................................................... 8 7.4 Device Functional Modes........................................ 12 8 Application and Implementation ........................ 13 8.1 Application Information............................................ 13 8.2 Typical Application .................................................. 13 9 Power Supply Recommendations...................... 18 10 Layout................................................................... 18 10.1 Layout Guidelines ................................................. 18 10.2 Layout Example .................................................... 18 11 Device and Documentation Support ................. 19 11.1 11.2 11.3 11.4 11.5 11.6 Documentation Support ........................................ Receiving Notification of Documentation Updates Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 19 19 19 19 19 19 12 Mechanical, Packaging, and Orderable Information ........................................................... 19 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision G (February 2013) to Revision H Page * Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .................................................................................................. 1 * Changed values in the Thermal Information table from 200 to 157.7 (DGK) and from 40 to 42.8 (NGU)............................. 4 Changes from Revision F (February 2013) to Revision G * 2 Page Changed layout of National Semiconductor Data Sheet to TI format .................................................................................... 1 Submit Documentation Feedback Copyright (c) 2009-2016, Texas Instruments Incorporated Product Folder Links: LM5009A LM5009A www.ti.com SNVS608H - JUNE 2009 - REVISED SEPTEMBER 2016 5 Pin Configuration and Functions DGK Package 8-Pin VSSOP Top View NGU Package 8-Pin WSON Top View SW 1 8 VIN BST 2 7 VCC RCL 3 6 RT/SD RTN 4 5 FB SW 1 BST 2 8 VIN 7 VCC EP RCL 3 6 RT/SD RTN 4 5 FB Not to scale Not to scale Pin Functions PIN NAME NO. I/O DESCRIPTION SW 1 O Switching node: power switching node. Connect to the output inductor, recirculating diode, and bootstrap capacitor. BST 2 I Boost pin (bootstrap capacitor input): an external capacitor is required between the BST and the SW pins. A 0.01-F ceramic capacitor is recommended. An internal diode charges the capacitor from VCC during each OFF time. RCL 3 I Current limit OFF-time set pin: a resistor between this pin and RTN sets the OFF time when current limit is detected. The OFF time is preset to 35 s if FB = 0 V. RTN 4 -- FB 5 I Feedback input from regulated output: this pin is connected to the inverting input of the internal regulation comparator. The regulation threshold is 2.5 V. RT/SD 6 I On time set pin: a resistor between this pin and VIN sets the switch on time as a function of VIN. The minimum recommended on time is 400 ns at the maximum input voltage. This pin is used for remote shutdown. VCC 7 O Output from the internal high voltage series pass regulator: this regulated voltage provides gate drive power for the internal Buck switch. An internal diode is provided between this pin and the BST pin. A local 0.47-F decoupling capacitor is required. The series pass regulator is current limited to 9 mA. VIN 8 I Input voltage: input operating range of 6 V to 95 V. EP -- -- Ground pin: ground for the entire circuit. Exposed pad: the exposed pad has no electrical contact. Connect to system ground plane for reduced thermal resistance. Submit Documentation Feedback Copyright (c) 2009-2016, Texas Instruments Incorporated Product Folder Links: LM5009A 3 LM5009A SNVS608H - JUNE 2009 - REVISED SEPTEMBER 2016 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT VIN to GND -0.3 100 V BST to GND -0.3 114 V SW to GND (steady state) -1 V BST to VCC 100 V BST to SW 14 V VCC to GND 14 V All other inputs to GND -0.3 7 V Storage temperature, Tstg -55 150 C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 6.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) 2000 Charged-device model (CDM), per JEDEC specification JESD22-C101 (2) 750 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) VIN Input voltage TJ Operating junction temperature MIN MAX 6 95 UNIT V -40 125 C 6.4 Thermal Information LM5009A THERMAL METRIC (1) DGK (VSSOP) NGU (WSON) UNIT 8 PINS 8 PINS RJA Junction-to-ambient thermal resistance 157.7 42.8 C/W RJC(top) Junction-to-case (top) thermal resistance 50.2 41.5 C/W RJB Junction-to-board thermal resistance 77.9 20.1 C/W JT Junction-to-top characterization parameter 4.5 0.4 C/W JB Junction-to-board characterization parameter 76.5 20.2 C/W RJC(bot) Junction-to-case (bottom) thermal resistance -- 4.5 C/W (1) 4 For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Submit Documentation Feedback Copyright (c) 2009-2016, Texas Instruments Incorporated Product Folder Links: LM5009A LM5009A www.ti.com SNVS608H - JUNE 2009 - REVISED SEPTEMBER 2016 6.5 Electrical Characteristics Typical values correspond to TJ = 25 C. Minimum and maximum limits apply over TJ = -40C to 125C for LM5009A. Unless otherwise stated, VIN = 48 V (1) PARAMETER TEST CONDITIONS MIN TYP MAX 7 7.4 UNIT VCC SUPPLY VCC Reg VCC regulator output (2) VIN = 48 V VIN - VCC 6 V < VIN < 8.5 V VCC bypass threshold VIN increasing 6.6 100 V mV 8.5 V 300 mV VIN = 6 V 100 VIN = 10 V 8.8 VIN = 48 V 0.8 VCC current limit VIN = 48 V 9.2 mA VCC UVLO VCC increasing 5.3 V 190 mV VCC bypass hysteresis VCC output impedance VCC UVLO hysteresis VCC UVLO filter delay 3 s Iin operating current FB = 3 V, VIN = 48 V 550 750 A Iin shutdown current RT/SD = 0 V 110 176 A 0.3 0.36 CURRENT LIMIT Current limit threshold 0.24 Current limit response time Iswitch overdrive = 0.1 A, time to switch off TOFF-1 OFF-time generator FB = 0 V, RCL = 100 K TOFF-2 OFF-time generator FB = 2.3 V, RCL = 100 K A 350 ns 35 s 2.56 s ON TIME GENERATOR TON-1 ON-time generator VIN = 10 V, RON = 200 K 2.15 2.77 3.5 s TON-2 ON-time generator VIN = 95 V, RON = 200 K 200 RT/SD Remote shutdown threshold Rising 0.4 300 420 ns 0.7 1.05 RT/SD(HYS) Remote shutdown hysteresis V 35 mV 300 ns MINIMUM OFF TIME Minimum off timer FB = 0 V REGULATION AND OV COMPARATORS FB reference threshold Internal reference, trip point for switch ON FB overvoltage threshold Trip point for switch OFF FB bias current 2.445 2.5 2.55 V 2.875 V 100 nA 165 C 25 C THERMAL SHUTDOWN TSD Thermal shutdown temperature Thermal shutdown hysteresis (1) (2) All minimum and maximum limits are specified by correlating the electrical characteristics to process and temperature variations and applying statistical process control. The junction temperature (TJ in C) is calculated from the ambient temperature (TA in C) and power dissipation (PD in Watts) as follows: TJ = TA + (PD * RJA ) where RJA (in C/W) is the package thermal impedance provided in the Thermal Information section. The VCC output is intended as a self bias for the internal gate drive power and control circuits. Device thermal limitations limit external loading. Submit Documentation Feedback Copyright (c) 2009-2016, Texas Instruments Incorporated Product Folder Links: LM5009A 5 LM5009A SNVS608H - JUNE 2009 - REVISED SEPTEMBER 2016 www.ti.com 6.6 Switching Characteristics Typical values correspond to TJ = 25 C. Minimum and maximum limits apply over TJ = -40C to 125C for LM5009A. Unless otherwise stated, VIN = 48 V PARAMETER TEST CONDITIONS Buck switch RDS(ON) (1) Itest = 200 mA Gate drive UVLO Vbst - Vsw rising 2.8 Gate drive UVLO hysteresis Precharge switch voltage 6 TYP MAX 2.2 4.6 3.8 4.8 490 At 1 mA Precharge switch ON time (1) MIN UNIT V mV 0.8 V 150 ns For devices procured in the 8-pin WSON package, the Rds(on) limits are specified by design characterization data only. Submit Documentation Feedback Copyright (c) 2009-2016, Texas Instruments Incorporated Product Folder Links: LM5009A LM5009A www.ti.com SNVS608H - JUNE 2009 - REVISED SEPTEMBER 2016 6.7 Typical Characteristics Figure 1. Efficiency vs Load Current and VIN (Circuit of Figure 10) Figure 2. VCC vs VIN CURRENT LIMIT OFF TIME (Ps) 35 30 25 20 15 RCL = 500k 300k 10 100k 5 50k 0 0 0.5 1.0 1.5 2.0 2.5 VFB (V) Figure 3. ON Time vs Input Voltage and RT Figure 4. Current Limit OFF Time vs VFB and RCL Figure 5. Maximum Frequency vs VOUT and VIN Figure 6. ICC Current vs Applied VCC Voltage Submit Documentation Feedback Copyright (c) 2009-2016, Texas Instruments Incorporated Product Folder Links: LM5009A 7 LM5009A SNVS608H - JUNE 2009 - REVISED SEPTEMBER 2016 www.ti.com 7 Detailed Description 7.1 Overview The LM5009A device is a step-down switching regulator featuring all of the functions required to implement a low-cost, efficient, buck bias power converter. This high-voltage regulator contains a 100-V, N-channel buck switch, is easy to implement, and is provided in the 8-pin VSSOP and the thermally-enhanced, 8-pin WSON packages. The regulator is based on a control scheme using an ON time inversely proportional to VIN. The control scheme requires no loop compensation. Current limit is implemented with forced OFF time, which is inversely proportional to VOUT. This scheme ensures short circuit control while providing minimum foldback. The LM5009A is applied in numerous applications to efficiently regulate down higher voltages. This regulator is well suited for 48-V Telecom and the new 42-V Automotive power bus ranges. 7.2 Functional Block Diagram LM5009A 7 V BIAS REGULATOR 6 V to 95 V Input VIN C5 C1 VCC UVLO V IN SENSE Q2 GND BYPASS SWITCH THERMAL SHUTDOWN VCC C3 RT ON TIMER START 0.7 V RT FINISH RT / SD BST SHUTDOWN OVER-VOLTAGE COMPARATOR START 300 GD UVLO ns MIN Vin SD 2. 875 V FINISH RTN SW SHIFT SSET Q PRE CHARGE - FB FINISH R CL START CURRENT LIMIT OFF TIMER V OUT D1 RCLR Q REGULATION COMPARATOR R CL L1 LEVEL 2.5A FB RCL C4 DRIVER OFF TIMER 0.3A BUCK SWITCH CURRENT SENSE R FB 2 R FB 1 R3 C2 Copyright (c) 2016, Texas Instruments Incorporated 7.3 Feature Description 7.3.1 Control Circuit Overview The LM5009A is a buck DC-DC regulator that uses a control scheme in which the ON time varies inversely with line voltage (VIN). Control is based on a comparator and the ON-time one-shot, with the output voltage feedback (FB) compared to an internal reference (2.5 V). If the FB level is below the reference the buck switch is turned on for a fixed time determined by the line voltage and a programming resistor (RT). Following the ON period the switch remains off for at least the minimum off-timer period of 300 ns. If FB is still below the reference at that time, the switch turns on again for another ON-time period. This continues until regulation is achieved. 8 Submit Documentation Feedback Copyright (c) 2009-2016, Texas Instruments Incorporated Product Folder Links: LM5009A LM5009A www.ti.com SNVS608H - JUNE 2009 - REVISED SEPTEMBER 2016 Feature Description (continued) The LM5009A operates in discontinuous conduction mode at light load currents, and continuous conduction mode at heavy load current. In discontinuous conduction mode, current through the output inductor starts at zero and ramps up to a peak during the ON time, then ramps back to zero before the end of the OFF time. The next ON-time period starts when the voltage at FB falls below the internal reference; until then, the inductor current remains zero. In this mode, the operating frequency is lower than in continuous conduction mode, and varies with load current. Therefore, at light loads the conversion efficiency is maintained, because the switching losses reduce with the reduction in load and frequency. The discontinuous operating frequency is calculated with Equation 1. F= VOUT2 x L x 1.04 x 1020 RL x (RT)2 where * RL = the load resistance (1) In continuous conduction mode, current flows continuously through the inductor and never ramps down to zero. In this mode the operating frequency is greater than the discontinuous mode frequency and remains relatively constant with load and line variations. The approximate continuous mode operating frequency is calculated with Equation 2. F= VOUT 1.385 x 10-10 x RT (2) The output voltage (VOUT) is programmed by two external resistors as shown in Functional Block Diagram. The regulation point is calculated with Equation 3. VOUT = 2.5 x (RFB1 + RFB2) / RFB1 (3) The LM5009A regulates the output voltage based on ripple voltage at the feedback input, requiring a minimum amount of ESR for the output capacitor C2. A minimum of 25 mV to 50 mV of ripple voltage at the feedback pin (FB) is required for the LM5009A. In cases where the capacitor ESR is too small, additional series resistance may be required (R3 in Functional Block Diagram). For applications where lower output voltage ripple is required, the output is taken directly from a low-ESR output capacitor, as shown in Figure 7. However, R3 slightly degrades the load regulation. L1 SW RFB2 LM5009A R3 FB VOUT2 RFB1 C2 Copyright (c) 2016, Texas Instruments Incorporated Figure 7. Low Ripple Output Configuration Submit Documentation Feedback Copyright (c) 2009-2016, Texas Instruments Incorporated Product Folder Links: LM5009A 9 LM5009A SNVS608H - JUNE 2009 - REVISED SEPTEMBER 2016 www.ti.com Feature Description (continued) 7.3.2 Start-Up Regulator (VCC) The high-voltage bias regulator is integrated within the LM5009A. The input pin (VIN) is connected directly to line voltages between 6 V and 95 V, with transient capability to 100 V. Referring to Functional Block Diagram and Figure 2, when VIN is between 6 V and the bypass threshold (nominally 8.5 V), the bypass switch (Q2) is on, and VCC tracks VIN within 100 mV to 150 mV. The bypass switch on-resistance is approximately 100 , with inherent current limiting at approximately 100 mA. When VIN is above the bypass threshold Q2 is turned off, and VCC is regulated at 7 V. The VCC regulator output current is limited at approximately 9.2 mA. When the LM5009A is shutdown using the RT/SD pin, the VCC bypass switch is shut off regardless of the voltage at VIN. When VIN exceeds the bypass threshold, the time required for Q2 to shut off is approximately 2 s to 3 s. The capacitor at VCC (C3) must be a minimum of 0.47 F to prevent the voltage at VCC from rising above the absolute maximum rating in response to a step input applied at VIN. C3 must be placed as close as possible to the VCC and RTN pins. In applications with a relatively high input voltage, power dissipation in the bias regulator is a concern. An auxiliary voltage of between 7.5 V and 14 V is diode connected to the VCC pin to shut off the VCC regulator, thereby reducing internal power dissipation. The current required into the VCC pin is shown in Figure 6. Internally a diode connects VCC to VIN requiring that the auxiliary voltage be less than VIN. The turnon sequence is shown in Figure 8. During the initial delay (t1) VCC ramps up at a rate determined by the current limit and C3 while internal circuitry stabilizes. When VCC reaches UVLO (typically 5.3 V) the buck switch is enabled. The inductor current increases to the current limit threshold (ILIM) and during t2 VOUT increases as the output capacitor charges up. When VOUT reaches the intended voltage, the average inductor current decreases (t3) to the nominal load current (IO). VIN t1 7V UVLO V CC Vin SW Pin 0V ILIM Inductor Current IO t2 t3 VOUT Figure 8. Start-Up Sequence 10 Submit Documentation Feedback Copyright (c) 2009-2016, Texas Instruments Incorporated Product Folder Links: LM5009A LM5009A www.ti.com SNVS608H - JUNE 2009 - REVISED SEPTEMBER 2016 Feature Description (continued) 7.3.3 Regulation Comparator The feedback voltage at FB is compared to an internal 2.5-V reference. In normal operation (the output voltage is regulated), an ON-time period is initiated when the voltage at FB falls below 2.5 V. The buck switch stays on for the ON time, causing the FB voltage to rise above 2.5 V. After the ON-time period, the buck switch stays off until the FB voltage again falls below 2.5 V. During start-up, the FB voltage is below 2.5 V at the end of each ON time, resulting in the minimum OFF-time of 300 ns. Bias current at the FB pin is nominally 100 nA. 7.3.4 Overvoltage Comparator The feedback voltage at FB is compared to an internal 2.875-V reference. If the voltage at FB rises above 2.875 V, the ON-time pulse is immediately terminated. This condition can occur if the input voltage or the output load change suddenly. The buck switch does not turn on again until the voltage at FB falls below 2.5 V. 7.3.5 ON-Time Generator and Shutdown The ON time for the LM5009A is determined by the RT resistor, and is inversely proportional to the input voltage (VIN). This results in a nearly constant frequency as VIN is varied over the VIN range. The ON-time equation for the LM5009A is calculated with Equation 4. TON = 1.385 x 10-10 x RT / VIN (4) RT must be selected for a minimum ON time (at maximum VIN) greater than 400 ns, for proper current limit operation. This requirement limits the maximum frequency for each application, depending on VIN and VOUT. 7.3.6 Current Limit The LM5009A contains an intelligent current limit OFF timer. If the current in the Buck switch exceeds 0.3 A, the present cycle is immediately terminated, and a non-resetable OFF timer is initiated. The length of OFF time is controlled by an external resistor (RCL) and the FB voltage (see Figure 4). When FB = 0 V, a maximum OFF time is required, and the time is preset to 35 s. This condition occurs when the output is shorted, and during the initial part of start-up. This amount of time ensures safe short circuit operation up to the maximum input voltage of 95 V. In cases of overload where the FB voltage is above 0 V (not a short circuit), the current limit OFF time is less than 35 s. Reducing the OFF time during less severe overloads reduces the amount of foldback, recovery time, and the start-up time. The OFF time is calculated with Equation 5. 10 TOFF = 0.285 + -5 VFB -6 (6.35 x 10 x RCL) (5) The current limit sensing circuit is blanked for the first 50 ns to 70 ns of each ON time, so it is not falsely tripped by the current surge which occurs at turnon. The current surge is required by the recirculating diode (D1) for the turnoff recovery. 7.3.7 N-Channel Buck Switch and Driver The LM5009A integrates an N-channel Buck switch and associated floating high-voltage gate driver. The gate driver circuit works in conjunction with an external bootstrap capacitor and an internal high voltage diode. A 0.01-F ceramic capacitor (C4) connected between the BST pin and SW pin provides the voltage to the driver during the ON time. During each OFF time, the SW pin is at approximately 0 V, and the bootstrap capacitor charges from VCC through the internal diode. The minimum OFF timer, set to 300 ns, ensures a minimum time each cycle to recharge the bootstrap capacitor. Submit Documentation Feedback Copyright (c) 2009-2016, Texas Instruments Incorporated Product Folder Links: LM5009A 11 LM5009A SNVS608H - JUNE 2009 - REVISED SEPTEMBER 2016 www.ti.com Feature Description (continued) The internal precharge switch at the SW pin is turned on for approximately 150 ns during the minimum OFF-time period, ensuring sufficient voltage exists across the bootstrap capacitor for the ON time. This feature helps prevent operating problems which can occur during very light-load conditions, involving a long OFF time, during which the voltage across the bootstrap capacitor could otherwise reduce below the gate drive UVLO threshold. The precharge switch also helps prevent start-up problems which can occur if the output voltage is precharged prior to turnon. After current limit detection, the precharge switch is turned on for the entire duration of the forced OFF time. 7.3.8 Thermal Protection The LM5009A must be operated so the junction temperature does not exceed 125C during normal operation. An internal thermal shutdown circuit is provided to shutdown the LM5009A in the event of a higher than normal junction temperature. When activated, typically at 165C, the controller is forced into a low power reset state by disabling the buck switch. This feature prevents catastrophic failures from accidental device overheating. When the junction temperature reduces below 140C, normal operation is resumed (typical hysteresis = 25C). 7.4 Device Functional Modes The LM5009A is remotely disabled by taking the RT/SD pin to ground, as shown in Figure 9. The voltage at the RT/SD pin is between 1.5 V and 3 V, depending on VIN and the value of the RT resistor. Input Voltage VIN LM5009A RT RT/SD STOP RUN Copyright (c) 2016, Texas Instruments Incorporated Figure 9. Shutdown Implementation 12 Submit Documentation Feedback Copyright (c) 2009-2016, Texas Instruments Incorporated Product Folder Links: LM5009A LM5009A www.ti.com SNVS608H - JUNE 2009 - REVISED SEPTEMBER 2016 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI's customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information The LM5009A is a nonsynchronous buck regulator designed to operate over a wide input voltage range and output current. Spreadsheet-based quick-start calculation tools and the on-line WEBENCH(R) software can be used to create a buck design along with the bill of materials, estimated efficiency, and the complete solution cost. 8.2 Typical Application The final circuit is shown in Figure 10. The circuit was tested, and the resulting performance is shown in Figure 11 and Figure 12. 12V - 90V Input VCC VIN 8 C1 1.0 PF 7 C3 0.47 PF C5 0.1 PF BST RT 2 309k RT/SD C4 0.01 PF LM5009A 6 L1 220 PH 10.0V SW VOUT 1 SHUTDOWN D1 RCL RFB2 3.01k R3 3.3 RFB1 1.0k C2 22 PF 3 RCL 316k FB RTN 5 4 GND Copyright (c) 2016, Texas Instruments Incorporated Figure 10. LM5009A Example Circuit 8.2.1 Design Requirements A guide for determining the component values is illustrated with a design example. See Functional Block Diagram and the Bill of Materials listed in Table 2. Table 1. Design Parameters PARAMETER VALUE Input voltage range 12 V to 90 V Output voltage 10 V Load current range 100 mA to 150 mA Submit Documentation Feedback Copyright (c) 2009-2016, Texas Instruments Incorporated Product Folder Links: LM5009A 13 LM5009A SNVS608H - JUNE 2009 - REVISED SEPTEMBER 2016 www.ti.com 8.2.2 Detailed Design Procedure Table 2. Bill of Materials ITEM DESCRIPTION PART NUMBER VALUE C1 Ceramic capacitor TDK C4532X7R2A105M 1 F, 100 V C2 Ceramic capacitor TDK C4532X7R1E226M 22 F, 25 V C3 Ceramic capacitor Kemet C1206C474K5RAC 0.47 F, 50 V C4 Ceramic capacitor Kemet C1206C103K5RAC 0.01 F, 50 V C5 Ceramic capacitor TDK C3216X7R2A104M 0.1 F, 100 V D1 Schottky power diode Diodes Inc. DFLS1100 100 V, 1 A L1 Power inductor COILTRONICS DR125-221-R or TDK SLF10145T-221MR65 220 H RFB2 Resistor Vishay CRCW12063011F 3.01 k RFB1 Resistor Vishay CRCW12061001F 1 k R3 Resistor Vishay CRCW12063R30F 3.3 RT Resistor Vishay CRCW12063093F 309 k RCL Resistor Vishay CRCW12063163F 316 k U1 Switching regulator Texas Instruments LM5009A -- 8.2.2.1 RFB1 and RFB2 VOUT = VFB x (RFB1 + RFB2) / RFB1 (6) Because VFB = 2.5 V, the ratio of RFB2 to RFB1 calculates as 3:1. Standard values of 3.01 k and 1 k are chosen. Other values could be used as long as the 3:1 ratio is maintained. 8.2.2.2 Fs and RT The recommended operating frequency range for the LM5009A is 50 kHz to 1.1 MHz. Unless the application requires a specific frequency, the choice of frequency is generally a compromise, because it affects the size of L1 and C2, and the switching losses. The maximum allowed frequency, based on a minimum ON time of 400 ns, is calculated with Equation 7. FMAX = VOUT / (VINMAX x 400 ns) (7) For this exercise, FMAX = 277 kHz. From Equation 2, RT calculates to 260 k. A standard value, 309-k resistor is used to allow for tolerances in Equation 2, resulting in a frequency of 234 kHz. 8.2.2.3 L1 The main parameter affected by the inductor is the output current ripple amplitude. The choice of inductor value therefore depends on both the minimum and maximum load currents, keeping in mind that the maximum ripple current occurs at maximum VIN. 8.2.2.3.1 Minimum Load Current To maintain continuous conduction at minimum IO (100 mA), the ripple amplitude (IOR) must be less than 200 mA peak-to-peak so the lower peak of the waveform does not reach zero. L1 is calculated using Equation 8. L1 = VOUT x (VIN - VOUT) IOR x Fs x VIN (8) At VIN = 90 V, L1(min) calculates to 190 H. The next larger standard value (220 H) is chosen and with this value IOR calculates to 173 mA peak-to-peak at VIN = 90 V, and 32 mA peak-to-peak at VIN = 12 V. 14 Submit Documentation Feedback Copyright (c) 2009-2016, Texas Instruments Incorporated Product Folder Links: LM5009A LM5009A www.ti.com SNVS608H - JUNE 2009 - REVISED SEPTEMBER 2016 8.2.2.3.2 Maximum Load Current At a load current of 150 mA, the peak of the ripple waveform must not reach the minimum value of the LM5009A's current limit threshold (240 mA). Therefore, the ripple amplitude must be less than 180 mA peak-topeak, which is already satisfied in the above calculation. With L1 = 220 H, at maximum VIN and IO, the peak of the ripple is 236 mA. While L1 must carry this peak current without saturating or exceeding the temperature rating, it also must be capable of carrying the maximum value of the LM5009A's current limit threshold (360 mA) without saturating, because the current limit is reached during startup. The DC resistance of the inductor must be as low as possible to minimize the power loss. 8.2.2.4 C3 The capacitor on the VCC output provides not only noise filtering and stability, but the primary purpose is to prevent false triggering of the VCC UVLO at the buck switch on and off transitions. C3 must be no smaller than 0.47 F. 8.2.2.5 C2 and R3 When selecting the output filter capacitor C2, the items to consider are ripple voltage due to the ESR, ripple voltage due to the capacitance, and the nature of the load. 8.2.2.6 ESR and R3 A low ESR for C2 is generally desirable so as to minimize power losses and heating within the capacitor. However, the regulator requires a minimum amount of ripple voltage at the feedback input for proper loop operation. For the LM5009A, the minimum ripple required at pin 5 is 25 mV peak-to-peak, requiring a minimum ripple at VOUT of 100 mV. Because the minimum ripple current (at minimum VIN) is 32 mA peak-to-peak, the minimum ESR required at VOUT is 100 mV / 32 mA = 3.12 . Because quality capacitors for SMPS applications have an ESR considerably less than this, R3 is inserted as shown in Functional Block Diagram. R3's value, along with C2's ESR, must result in at least 25 mV peak-to-peak ripple at pin 5. Generally, R3 is 0.5 to 4 . 8.2.2.7 C2 C2 must generally be no smaller than 3.3 F. Typically, the value is 10 F to 20 F with the optimum value determined by the load. If the load current is fairly constant, a small value suffices for C2. If the load current includes significant transients, a larger value is necessary. For each application, experimentation is required to determine the optimum values for R3 and C2. 8.2.2.8 RCL When current limit is detected, the minimum OFF-time set by this resistor must be greater than the maximum normal OFF time, which occurs at maximum input voltage. Using Equation 4, the minimum ON time is 476 ns, yielding an OFF time of 3.8 s (at 234 kHz). Due to the 25% tolerance on the ON time, the OFF-time tolerance is also 25%, yielding a maximum OFF time of 4.75 s. Allowing for the response time of the current limit detection circuit (350 ns) increases the maximum OFF time to 5.1 s. This is increased an additional 25% to 6.4 s to allow for the tolerances of Equation 5. Using Equation 5, RCL calculates to 310 k at VFB = 2.5 V. A standard value 316-k resistor is used. 8.2.2.9 D1 The important parameters are reverse recovery time and forward voltage. The reverse recovery time determines how long the reverse current surge lasts each time the buck switch is turned on. The forward voltage drop is significant in the event the output is short-circuited as it is only this diode's voltage which forces the inductor current to reduce during the forced OFF time. For this reason, a higher voltage is better, although that affects efficiency. A good choice is a Schottky power diode, such as the DFLS1100. The reverse voltage rating of D1 must be at least as great as the maximum VIN, and the current rating must be greater than the maximum current limit threshold (360 mA). Submit Documentation Feedback Copyright (c) 2009-2016, Texas Instruments Incorporated Product Folder Links: LM5009A 15 LM5009A SNVS608H - JUNE 2009 - REVISED SEPTEMBER 2016 www.ti.com 8.2.2.10 C1 C1 supplies most of the switch current during the ON time, and limit the voltage ripple at VIN, on the assumption that the voltage source feeding VIN has an output impedance greater than zero. At maximum load current, when the buck switch turns on, the current into pin 8 suddenly increases to the lower peak of the output current waveform, ramp up to the peak value, then drop to zero at turnoff. The average input current during this ON time is the load current (150 mA). For a worst-case calculation, C1 must supply this average load current during the maximum ON time. To keep the input voltage ripple to less than 2 V (for this exercise), C1 is calculated with Equation 9. C1 = I x tON 'V = 0.15A x 3.57 Ps = 0.268 PF 2.0V (9) Quality ceramic capacitors in this value have a low ESR, which adds only a few millivolts to the ripple. It is the capacitance which is dominant in this case. To allow for the capacitor's tolerance, temperature effects, and voltage effects, a 1-F, 100-V X7R capacitor is used. 8.2.2.11 C4 The recommended value for C4 is 0.01 F, as this is appropriate in the majority of applications. A high-quality ceramic capacitor, with low ESR is recommended as C4 supplies the surge current to charge the buck switch gate at turnon. A low ESR also ensures a quick recharge during each OFF time. At minimum VIN, when the ON time is at maximum, it is possible during start-up that C4 does not fully re-charge during each 300 ns OFF time. The circuit is not able to complete the start-up, and achieve output regulation. This can occur when the frequency is intended to be low (for example, RT = 500 K). In this case, C4 must be increased so it can maintain sufficient voltage across the buck switch driver during each ON time. 8.2.2.12 C5 This capacitor helps avoid supply voltage transients and ringing due to long lead inductance at VIN. TI recommends placing a low-ESR, 0.1-F ceramic chip capacitor close to the LM5009A. 8.2.2.13 Ripple Configuration The LM5009A uses a constant-ON-time (COT) control scheme where the ON time is terminated by a one-shot and the OFF time is terminated by the feedback voltage (VFB) falling below the reference voltage. Therefore, for stable operation, the feedback voltage must decrease monotonically in phase with the inductor current during the OFF time. Furthermore, this change in feedback voltage (VFB) during OFF time must be large enough to dominate any noise present at the feedback node. Table 3 presents three different methods for generating appropriate voltage ripple at the feedback node. Type 1 and type 2 ripple circuits couple the ripple from the output of the converter to the feedback node (FB). The output voltage ripple has two components: 1. Capacitive ripple caused by the inductor current ripple charging or discharging the output capacitor. 2. Resistive ripple caused by the inductor current ripple flowing through the ESR of the output capacitor and R3. The capacitive ripple is out of phase with the inductor current. As a result, the capacitive ripple does not decrease monotonically during the OFF time. The resistive ripple is in phase with the inductor current and decreases monotonically during the OFF time. The resistive ripple must exceed the capacitive ripple at output (VOUT) for stable operation. If this condition is not satisfied, then unstable switching behavior is observed in COT converters with multiple ON-time bursts in close succession followed by a long OFF time. The type 3 ripple method uses a ripple injection circuit with RA, CA, and the switch node (SW) voltage to generate a triangular ramp. This triangular ramp is then ac-coupled into the feedback node (FB) using the capacitor CB. This circuit is suited for applications where low output voltage ripple is imperative because this circuit does not use the output voltage ripple. 16 Submit Documentation Feedback Copyright (c) 2009-2016, Texas Instruments Incorporated Product Folder Links: LM5009A LM5009A www.ti.com SNVS608H - JUNE 2009 - REVISED SEPTEMBER 2016 Table 3. Ripple Configuration TYPE 1 TYPE 2 TYPE 3 Lowest cost Reduced ripple Minimum ripple VOUT VOUT L1 VOUT L1 L1 R FB2 Cff R FB2 R3 To FB C OUT COUT R FB2 GND R FB1 GND 25 mV u VO VREF u 'IL1, min CA CB To FB R FB1 R3 t RA R3 C OUT To FB R FB1 GND Cff t 5 FSW u (RFB2 IIRFB1 ) R A CA d (10) R t 25 mV 3 'IL1, min (VIN, min VO ) u TON(@ VIN, min ) 25mV (12) (11) See AN-1481 Controlling Output Ripple and Achieving ESR Independence in Constant On-Time (COT) Regulator Designs (SNVA166) for more details on each ripple generation method. 8.2.3 Application Curves Figure 11. Efficiency vs Load Current and VIN Figure 12. Efficiency vs VIN Submit Documentation Feedback Copyright (c) 2009-2016, Texas Instruments Incorporated Product Folder Links: LM5009A 17 LM5009A SNVS608H - JUNE 2009 - REVISED SEPTEMBER 2016 www.ti.com 9 Power Supply Recommendations The LM5009A is designed to operate with an input power supply capable of supplying a voltage range from 6 V to 95 V. The input power supply must be well regulated and capable of supplying sufficient current to the regulator during peak load operation. Also, like in all applications, the power-supply source impedance must be small compared to the module input impedance to maintain the stability of the converter. 10 Layout 10.1 Layout Guidelines The LM5009A regulation and overvoltage comparators are very fast, and as such respond to short duration noise pulses. Therefore, layout considerations are critical for optimum performance. The components at pins 1, 2, 3, 5, and 6 must be as physically close as possible to the IC, thereby minimizing noise pickup in the PC tracks. The current loop formed by D1, L1, and C2 must be as small as possible. The ground connection from D1 to C1 must be as short and direct as possible. If the internal dissipation of the LM5009A produces excessive junction temperatures during normal operation, good use of the PCB ground plane can help to dissipate heat. The exposed pad on the bottom of the 8-pin WSON package is soldered to a ground plane on the PCB, and that plane must extend out from beneath the IC to help dissipate the heat. Additionally, the use of wide PCB traces, where possible, can also help conduct heat away from the IC. Judicious positioning of the PCB within the end product, along with use of any available air flow (forced or natural convection) can help reduce the junction temperatures. 10.2 Layout Example VOUT CA COUT LIND D1 GND Cbyp RA CIN SW SW LM5009A VIN VLINE CBST VCC BST Exp Thermal Pad RON RCL RON RTN FB CVCC RFB2 GND CB RFB1 Via to Ground Plane Copyright (c) 2016, Texas Instruments Incorporated Figure 13. LM5009A Buck Layout Example With the WSON Package 18 Submit Documentation Feedback Copyright (c) 2009-2016, Texas Instruments Incorporated Product Folder Links: LM5009A LM5009A www.ti.com SNVS608H - JUNE 2009 - REVISED SEPTEMBER 2016 11 Device and Documentation Support 11.1 Documentation Support 11.1.1 Related Documentation For related documentation see the following: AN-1481 Controlling Output Ripple and Achieving ESR Independence in Constant On-Time (COT) Regulator Designs (SNVA166) 11.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 11.3 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2ETM Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 11.4 Trademarks E2E is a trademark of Texas Instruments. WEBENCH is a registered trademark of Texas Instruments. All other trademarks are the property of their respective owners. 11.5 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 11.6 Glossary SLYZ022 -- TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Documentation Feedback Copyright (c) 2009-2016, Texas Instruments Incorporated Product Folder Links: LM5009A 19 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (C) Device Marking (3) (4/5) (6) LM5009AMM/NOPB ACTIVE VSSOP DGK 8 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 SLLA LM5009AMMX/NOPB ACTIVE VSSOP DGK 8 3500 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 SLLA LM5009ASD/NOPB ACTIVE WSON NGU 8 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 5009ASD LM5009ASDX/NOPB ACTIVE WSON NGU 8 4500 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 5009ASD (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 20-Jul-2019 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing LM5009AMM/NOPB VSSOP LM5009AMMX/NOPB LM5009ASD/NOPB LM5009ASDX/NOPB SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 WSON NGU 8 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 WSON NGU 8 4500 330.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 20-Jul-2019 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM5009AMM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LM5009AMMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0 LM5009ASD/NOPB WSON NGU 8 1000 210.0 185.0 35.0 LM5009ASDX/NOPB WSON NGU 8 4500 367.0 367.0 35.0 Pack Materials-Page 2 MECHANICAL DATA NGU0008B SDC08B (Rev A) www.ti.com IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES "AS IS" AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. 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