LP3892 LP3892 1.5A Fast-Response Ultra Low Dropout Linear Regulators Literature Number: SNVS236C LP3892 1.5A Fast-Response Ultra Low Dropout Linear Regulators General Description Features The LP3892 is a high current, fast response regulator which can maintain output voltage regulation with minimum input to output voltage drop. Fabricated on a CMOS process, the device operates from two input voltages: Vbias provides voltage to drive the gate of the N-MOS power transistor, while Vin is the input voltage which supplies power to the load. The use of an external bias rail allows the part to operate from ultra low Vin voltages. Unlike bipolar regulators, the CMOS architectutre consumes extremely low quiescent current at any output load current. The use of an N-MOS power transistor results in wide bandwidth, yet minimum external capacitance is required to maintain loop stability. The fast transient response of these devices makes them suitable for use in powering DSP, Microcontroller Core voltages and Switch Mode Power Supply post regulators. The parts are available in TO-220, TO-263 and PSOP-8 packages. Dropout Voltage:140mV (typ) @ 1.5A load current. Ground Pin Current: 3 mA (typ) at full load. Shutdown Current: 60 nA (typ) when S/D pin is low. Precision Output Voltage: 1.5% room temperature accuracy. n n n n n n n n Ultra low dropout voltage (140 mV @ 1.5A typ) Low ground pin current Load regulation of 0.04%/A 60 nA typical quiescent current in shutdown 1.5% output accuracy (25C) TO-220, TO-263 and PSOP-8 packages Over temperature/over current protection -40C to +125C junction temperature range Applications n n n n n n n DSP Power Supplies Server Core and I/O Supplies PC Add-in-Cards Local Regulators in Set-Top Boxes Microcontroller Power Supplies High Efficiency Power Supplies SMPS Post-Regulators Typical Application Circuit 20069601 At least 10 F of input and output capacitance is required for stability. *Tantalum capacitors are recommended. Aluminum electrolytic capacitors may be used for restricted temperature range. See application hints. (c) 2006 National Semiconductor Corporation DS200696 www.national.com LP3892 1.5A Fast-Response Ultra Low Dropout Linear Regulators June 2006 LP3892 Connection Diagrams 20069602 20069603 TO-220, Top View TO-263, Top View 20069653 PSOP-8, Top View Ordering Information Order Number Package Type Package Drawing LP3892ES-1.2 TO263-5 TS5B Supplied As Rail LP3892ESX-1.2 TO263-5 TS5B Tape and Reel LP3892ET-1.2 TO220-5 T05D Rail LP3892ES-1.5 TO263-5 TS5B Rail LP3892ESX-1.5 TO263-5 TS5B Tape and Reel LP3892ET-1.5 TO220-5 T05D Rail LP3892ES-1.8 TO263-5 TS5B Rail LP3892ESX-1.8 TO263-5 TS5B Tape and Reel LP3892ET-1.8 TO220-5 T05D Rail LP3892EMR-1.2 PSOP-8 MRA08B Rail LP3892EMRX-1.2 PSOP-8 MRA08B 2500 Units on Tape and Reel LP3892EMR-1.5 PSOP-8 MRA08B Rail LP3892EMRX-1.5 PSOP-8 MRA08B 2500 Units on Tape and Reel LP3892EMR-1.8 PSOP-8 MRA08B Rail LP3892EMRX-1.8 PSOP-8 MRA08B 2500 Units on Tape and Reel Block Diagram 20069624 www.national.com 2 Shutdown Input Voltage (Survival) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Output Voltage (Survival) Storage Temperature Range IOUT (Survival) Internally Limited -0.3V to +6V Junction Temperature -40C to +150C -65C to +150C Lead Temp. (Soldering, 5 seconds) 260C ESD Rating Human Body Model (Note 3) Machine Model (Note 10) Power Dissipation (Note 2) -0.3V to +7V Operating Ratings VIN 2 kV 200V (VOUT + VDO) to 5.5V Shutdown 0 to +6V IOUT Internally Limited 1.5A VIN Supply Voltage (Survival) -0.3V to +6V Junction Temperature VBIAS Supply Voltage (Survival) -0.3V to +7V VBIAS -40C to +125C 4.5V to 6V Electrical Characteristics Limits in standard typeface are for TJ = 25C, and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: VIN = VO(NOM) + 1V, VBIAS = 4.5V, IL = 10 mA, CIN = COUT = 10F, VS/D = VBIAS. Symbol VO Parameter Output Voltage Tolerance Conditions 10 mA IL 1.5A VO(NOM) + 1V VIN 5.5V 4.5V VBIAS 6V MIN (Note 5) Typical (Note 4) MAX (Note 5) Units 1.234 1.198 1.216 1.186 1.246 1.478 1.522 1.5 V 1.545 1.455 1.827 1.773 1.8 1.854 1.746 VO/VIN Output Voltage Line Regulation (Note 7) VO/IL Output Voltage Load Regulation 10 mA IL 1.5A (Note 8) VDO Dropout Voltage (Note 9) IQ(VIN) Quiescent Current Drawn from VIN Supply VO(NOM) + 1V VIN 5.5V Quiescent Current Drawn from VBIAS Supply Short-Circuit Current 0.04 0.06 %/A 140 320 500 IL = 1.5A (PSOP only) 155 340 550 3 7 8 mA 0.03 1 30 A 1 2 3 mA 0.03 1 30 A 10 mA IL 1.5A S/D 0.3V 10 mA IL 1.5A V ISC %/V IL = 1.5A (TO220 and TO263 only) V IQ(VBIAS) 0.01 S/D 0.3V VOUT = 0V 4.3 mV A Shutdown Input VSDT Output Turn-off Threshold Output = ON 1.3 0.7 Output = OFF 0.7 Td (OFF) Turn-OFF Delay RLOAD X COUT << Td (OFF) 20 Td (ON) Turn-ON Delay RLOAD X COUT << Td (ON) 15 IS/D S/D Input Current V S/D =1.3V 1 0.3V -1 V S/D 3 0.3 V s A www.national.com LP3892 Absolute Maximum Ratings (Note 1) LP3892 Electrical Characteristics Limits in standard typeface are for TJ = 25C, and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: VIN = VO(NOM) + 1V, VBIAS = 4.5V, IL = 10 mA, CIN = COUT = 10F, VS/D = VBIAS. (Continued) Symbol Parameter Conditions MIN (Note 5) Typical (Note 4) MAX (Note 5) Units AC Parameters PSRR (VIN) Ripple Rejection for VIN Input Voltage VIN = VOUT +1V, f = 120 Hz PSRR (VBIAS) Ripple Rejection for VBIAS Voltage VBIAS = VOUT + 3V, f = 120 Hz VIN = VOUT + 1V, f = 1 kHz en 80 65 70 VBIAS = VOUT + 3V, f = 1 kHz 65 Output Noise Density f = 120 Hz 1 Output Noise Voltage BW = 10 Hz - 100 kHz, VOUT = 1.8V BW = 300 Hz - 300 kHz, VOUT = 1.8V dB V/root-Hz 150 90 V (rms) Note 1: Absolute maximum ratings indicate limits beyond which damage to the component may occur. Operating ratings indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications, see Electrical Characteristics. Specifications do not apply when operating the device outside of its rated operating conditions. Note 2: At elevated temperatures, device power dissipation must be derated based on package thermal resistance and heatsink thermal values. J-A for TO-220 devices is 65C/W if no heatsink is used. If the TO-220 device is attached to a heatsink, a J-S value of 4C/W can be assumed. J-A for TO-263 devices is approximately 40C/W if soldered down to a copper plane which is at least 1.5 square inches in area. J-A value for typical PSOP-8 PC board mounting is 166C/W. If power dissipation causes the junction temperature to exceed specified limits, the device will go into thermal shutdown. Note 3: The human body model is a 100 pF capacitor discharged through a 1.5k resistor into each pin. Note 4: Typical numbers represent the most likely parametric norm for 25C operation. Note 5: Limits are guaranteed through testing, statistical correlation, or design. Note 6: If used in a dual-supply system where the regulator load is returned to a negative supply, the output pin must be diode clamped to ground. Note 7: Output voltage line regulation is defined as the change in output voltage from nominal value resulting from a change in input voltage. Note 8: Output voltage load regulation is defined as the change in output voltage from nominal value as the load current increases from no load to full load. Note 9: Dropout voltage is defined as the minimum input to output differential required to maintain the output with 2% of nominal value. The PSOP-8 package devices have a slightly higher dropout voltage due to increased band wire resistance. Note 10: The machine model is a 220 pF capacitor discharged directly into each pin. The machine model ESD rating of pin 5 is 100V. www.national.com 4 Unless otherwise specified: TJ = 25C, COUT = 10 F, Cin = IGND vs VSD VOUT vs Temperature 20069606 20069605 DC Load Regulation Line Regulation vs VIN 20069607 20069608 Line Regulation vs VBIAS IBIAS vs IL 20069609 20069610 5 www.national.com LP3892 Typical Performance Characteristics 10 F, S/D pin is tied to VBIAS, VIN = 2.2V, VOUT = 1.8V. LP3892 Typical Performance Characteristics Unless otherwise specified: TJ = 25C, COUT = 10 F, Cin = 10 F, S/D pin is tied to VBIAS, VIN = 2.2V, VOUT = 1.8V. (Continued) IGND vs VSD Noise Measurement 20069612 20069614 VOUTStartup Waveform VOUTStartup Waveform 20069615 20069616 Line Regulation vs VBIAS Line Regulation vs VBIAS 20069618 www.national.com 20069619 6 VIN PSRR VIN PSRR 20069620 20069623 VBIAS PSRR 20069622 7 www.national.com LP3892 Typical Performance Characteristics Unless otherwise specified: TJ = 25C, COUT = 10 F, Cin = 10 F, S/D pin is tied to VBIAS, VIN = 2.2V, VOUT = 1.8V. (Continued) LP3892 BIAS CAPACITOR Application Hints The 0.1F capacitor on the bias line can be any good quality capacitor (ceramic is recommended). EXTERNAL CAPACITORS To assure regulator stability, input and output capacitors are required as shown in the Typical Application Circuit. BIAS VOLTAGE The bias voltage is an external voltage rail required to get gate drive for the N-FET pass transistor. Bias voltage must be in the range of 4.5 - 6V to assure proper operation of the part. OUTPUT CAPACITOR At least 10F of output capacitance is required for stability (the amount of capacitance can be increased without limit). The output capacitor must be located less than 1 cm from the output pin of the IC and returned to a clean analog ground. The ESR (equivalent series resistance) of the output capacitor must be within the "stable" range as shown in the graph below over the full operating temperature range for stable operation. UNDER VOLTAGE LOCKOUT The bias voltage is monitored by a circuit which prevents the regulator output from turning on if the bias voltage is below approximately 4V. SHUTDOWN OPERATION Pulling down the shutdown (S/D) pin will turn-off the regulator. Pin S/D must be actively terminated through a pull-up resistor (10 k to 100 k) for a proper operation. If this pin is driven from a source that actively pulls high and low (such as a CMOS rail to rail comparator), the pull-up resistor is not required. This pin must be tied to Vin if not used. POWER DISSIPATION/HEATSINKING A heatsink may be required depending on the maximum power dissipation and maximum ambient temperature of the application. Under all possible conditions, the junction temperature must be within the range specified under operating conditions. The total power dissipation of the device is given by: PD = (VIN-VOUT)IOUT+ (VIN)IGND where IGND is the operating ground current of the device. The maximum allowable temperature rise (TRmax) depends on the maximum ambient temperature (TAmax) of the application, and the maximum allowable junction temperature (TJmax): TRmax = TJmax- TAmax 20069631 Minimum ESR vs Output Load Current Tantalum capacitors are recommended for the output as their ESR is ideally suited to the part's requirements and the ESR is very stable over temperature. Aluminum electrolytics are not recommended because their ESR increases very rapidly at temperatures below 10C. Aluminum caps can only be used in applications where lower temperature operation is not required. The maximum allowable value for junction to ambient Thermal Resistance, JA, can be calculated using the formula: JA = TRmax / PD These parts are available in TO-220 and TO-263 packages. The thermal resistance depends on amount of copper area or heat sink, and on air flow. If the maximum allowable value of JA calculated above is 60 C/W for TO-220 package and 60 C/W for TO-263 package no heatsink is needed since the package can dissipate enough heat to satisfy these requirements. If the value for allowable JA falls below these limits, a heat sink is required. A second problem with Al caps is that many have ESR's which are only specified at low frequencies. The typical loop bandwidth of a linear regulator is a few hundred kHz to several MHz. If an Al cap is used for the output cap, it must be one whose ESR is specified at a frequency of 100 kHz or more. Because the ESR of ceramic capacitors is only a few milli Ohms, they are not suitable for use as output capacitors on LP389X devices. The regulator output can tolerate ceramic capacitance totaling up to 15% of the amount of Tantalum capacitance connected from the output to ground. HEATSINKING TO-220 PACKAGE The thermal resistance of a TO220 package can be reduced by attaching it to a heat sink or a copper plane on a PC board. If a copper plane is to be used, the values of JA will be same as shown in next section for TO263 package. The heatsink to be used in the application should have a heatsink to ambient thermal resistance, HA JA - CH - JC. In this equation, CH is the thermal resistance from the case to the surface of the heat sink and JC is the thermal resistance from the junction to the surface of the case. JC is about 3C/W for a TO220 package. The value for CH depends on method of attachment, insulator, etc. CH varies between 1.5C/W to 2.5C/W. If the exact value is unknown, 2C/W can be assumed. INPUT CAPACITOR The input capacitor must be at least 10 F, but can be increased without limit. It's purpose is to provide a low source impedance for the regulator input. Ceramic capacitors work best for this, but Tantalums are also very good. There is no ESR limitation on the input capacitor (the lower, the better). Aluminum electrolytics can be used, but their ESR increase very quickly at cold temperatures. They are not recommended for any application where temperatures go below about 10C. www.national.com 8 (Continued) HEATSINKING PSOP PACKAGE HEATSINKING TO-263 PACKAGE Heatsinking for the PSOP-8 package is accomplished by allowing heat to flow through the ground slug on the bottom of the package into the copper on the PC board. The heat slug must be soldered down to a copper plane to get good heat transfer. It can also be connected through vias to internal copper planes. Since the heat slug is at ground potential, traces must not be routed under it which are not at ground potential. Under all possible conditions, the junction temperature must be within the range specified under operating conditions. Figure 3 shows a curve for the JA of the PSOP package for different copper area sizes using a typical PCB with one ounce copper in still air. The TO-263 package uses the copper plane on the PCB as a heatsink. The tab of these packages are soldered to the copper plane for heat sinking. The graph below shows a curve for the JA of TO-263 package for different copper area sizes, using a typical PCB with 1 ounce copper and no solder mask over the copper area for heat sinking. 20069625 FIGURE 1. JA vs Copper (1 Ounce) Area for TO-263 package As shown in the graph below, increasing the copper area beyond 1 square inch produces very little improvement. The minimum value for JA for the TO-263 package mounted to a PCB is 32C/W. 20069654 Figure 3 shows the maximum allowable power dissipation for TO-263 packages for different ambient temperatures, assuming JA is 35C/W and the maximum junction temperature is 125C. FIGURE 3. JA vs. Copper (1 ounce) Area for PSOP Package 20069626 FIGURE 2. Maximum power dissipation vs ambient temperature for TO-263 package 9 www.national.com LP3892 Application Hints LP3892 Physical Dimensions inches (millimeters) unless otherwise noted TO220 5-lead, Molded, Stagger Bend Package (TO220-5) NS Package Number T05D TO263 5-Lead, Molded, Surface Mount Package (TO263-5) NS Package Number TS5B www.national.com 10 inches (millimeters) unless otherwise noted (Continued) PSOP 8-Lead, Molded, PSOP-2 NS Package Number MRA08B National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. For the most current product information visit us at www.national.com. LIFE SUPPORT POLICY NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. 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