©2003 Fairchild Semiconductor Corporation
FSBM10SM60A
Rev. E, August 2003
FSBM10SM60A
SPMTM (Smart Power Module)
General Description
FSBM10SM60A is an advanced smart power module
(SPM) that Fairchild has newly developed and designed to
provide very compact and high performance ac motor
drives mainly targeting medium speed low-power inverter-
driven application like air conditioners. It combines
optimized circuit protection and drive matched to low-loss
IGBTs. Highly effective short-circuit current detection/
protection is realized through the use of advanced current
sensing IGBT chips that allow continuous monitoring of the
IGBTs current. System reliability is further enhanced by the
integrated under-voltage lock-out protection. The high
speed built-in HVIC provides opto-coupler-less IGBT gate
driving capability that further reduce the overall size of the
inverter system design. In addition the incorporated HVIC
facilitates the use of single-supply drive topology enabling
the FSBM10SM60A to be driven by only one drive supply
voltage without negative bias. Inverter current sensing
application can be achieved due to the divided nagative dc
terminals.
Features
• UL Certified No. E209204
• 600V-10A 3-phase IGBT inverter bridge including control
ICs for gate driving and protection
• Divided negative dc-link terminals for inverter current
sensing applications
• Single-grounded power supply due to built-in HVIC
• Typical switching frequency of 5kHz
• Inverter power rating of 0.5kW / 100~253 Vac
• Isolation rating of 2500Vrms/min.
• Very low leakage current due to using ceramic substrate
• Adjustable current protection level by varying series
resistor value with sense-IGBTs
Applications
• AC 100V ~ 253V 3-phase inverter drive for small power
(0.5kW) ac motor drives
• Home appliances applications requiring medium
switching frequency operation like air conditioners drive
system
• Application ratings:
- Power : 0.5 kW / 100~253 Vac
- Switching frequency : Typical 5kHz (PWM Control)
- 100% load current : 3.3A (Irms)
- 150% load current : 5.0A (Irms) for 1 minute
External View
Fig. 1.
Top View Bottom View
60mm
31mm
©2003 Fairchild Semiconductor Corporation
FSBM10SM60A
Rev. E, August 2003
Integrated Power Functions
• 600V-10A IGBT inverter for 3-phase DC/AC power conversion (Please refer to Fig. 3)
Integrated Drive, Protection and System Control Functions
• For inverter high-side IGBTs: Gate drive circuit, High voltage isolated high-speed level shifting
Control circuit under-voltage (UV) protection
Note) Available bootstrap circuit example is given in Figs. 13 and 14.
• For inverter low-side IGBTs: Gate drive circuit, Short-Circuit (SC) protection
Control supply circuit under-voltage (UV) protection
• Fault signaling: Corresponding to a SC fault (Low-side IGBTs) or a UV fault (Low-side control supply circuit)
• Input interface: 5V CMOS/LSTTL compatible, Schmitt trigger input
Pin Configuration
Fig. 2.
Top View
(1) VCC(L)
(2) com(L)
(3) IN(UL)
(4) IN(VL)
(5) IN(WL)
(6) com(L)
(7) FO
(8) CFOD
(9) CSC
(10) RSC
(11) IN(UH)
(12) VCC(UH)
(13) VB(U)
(14) VS(U)
(15) IN(VH)
(16) com(H)
(17) VCC(VH)
(18) VB(V)
(19) VS(V)
(20) IN(WH)
(21) VCC(WH)
(22) VB(W)
(23) VS(W)
(24) NC
(25) NC
(26) NU
(27) NV
(28) NW
(29) U
(30) V
(31) W
(32) P
Case Temperature (TC)
Detecting Point
Ceramic Substrate
(1) VCC(L)
(2) com(L)
(3) IN(UL)
(4) IN(VL)
(5) IN(WL)
(6) com(L)
(7) FO
(8) CFOD
(9) CSC
(10) RSC
(11) IN(UH)
(12) VCC(UH)
(13) VB(U)
(14) VS(U)
(15) IN(VH)
(16) com(H)
(17) VCC(VH)
(18) VB(V)
(19) VS(V)
(20) IN(WH)
(21) VCC(WH)
(22) VB(W)
(23) VS(W)
(24) NC
(25) NC
(26) NU
(27) NV
(28) NW
(29) U
(30) V
(31) W
(32) P
(1) VCC(L)
(2) com(L)
(3) IN(UL)
(4) IN(VL)
(5) IN(WL)
(6) com(L)
(7) FO
(8) CFOD
(9) CSC
(10) RSC
(11) IN(UH)
(12) VCC(UH)
(13) VB(U)
(14) VS(U)
(15) IN(VH)
(16) com(H)
(17) VCC(VH)
(18) VB(V)
(19) VS(V)
(20) IN(WH)
(21) VCC(WH)
(22) VB(W)
(23) VS(W)
(24) NC
(25) NC
(26) NU
(27) NV
(28) NW
(29) U
(30) V
(31) W
(32) P
Case Temperature (TC)
Detecting Point
Ceramic Substrate
©2003 Fairchild Semiconductor Corporation
FSBM10SM60A
Rev. E, August 2003
Pin Descriptions
Pin Number Pin Name Pin Description
1V
CC(L) Low-side Common Bias Voltage for IC and IGBTs Driving
2COM
(L) Low-side Common Supply Ground
3IN
(UL) Signal Input for Low-side U Phase
4IN
(VL) Signal Input for Low-side V Phase
5IN
(WL) Signal Input for Low-side W Phase
6COM
(L) Low-side Common Supply Ground
7V
FO Fault Output
8C
FOD Capacitor for Fault Output Duration Time Selection
9C
SC Capacitor (Low-pass Filter) for Short-Circuit Current Detection Input
10 RSC Resistor for Short-Circuit Current Detection
11 IN(UH) Signal Input for High-side U Phase
12 VCC(UH) High-side Bias Voltage for U Phase IC
13 VB(U) High-side Bias Voltage for U Phase IGBT Driving
14 VS(U) High-side Bias Voltage Ground for U Phase IGBT Driving
15 IN(VH) Signal Input for High-side V Phase
16 COM(H) High-side Common Supply Ground
17 VCC(VH) High-side Bias Voltage for V Phase IC
18 VB(V) High-side Bias Voltage for V Phase IGBT Driving
19 VS(V) High-side Bias Voltage Ground for V Phase IGBT Driving
20 IN(WH) Signal Input for High-side W Phase
21 VCC(WH) High-side Bias Voltage for W Phase IC
22 VB(W) High-side Bias Voltage for W Phase IGBT Driving
23 VS(W) High-side Bias Voltage Ground for W Phase IGBT Driving
24 NC No Connection
25 NC No Connection
26 NUNegative DC–Link Input for U Phase
27 NVNegative DC–Link Input for V Phase
28 NWNegative DC–Link Input for W Phase
29 U Output for U Phase
30 V Output for V Phase
31 W Output for W Phase
32 P Positive DC–Link Input
©2003 Fairchild Semiconductor Corporation
FSBM10SM60A
Rev. E, August 2003
Internal Equivalent Circuit and Input/Output Pins
Note:
1) Inverter low-side is composed of three sense-IGBTs including freewheeling diodes for each IGBT and one control IC which has gate driving, current sensing and
protection functions.
2) Inverter power side is composed of four inverter dc-link input pins and three inverter output pins.
3) Inverter high-side is composed of three normal-IGBTs including freewheeling diodes and three drive ICs for each IGBT.
Fig. 3.
Bottom View
COM(L)
VCC
IN(UL)
IN(VL)
IN(W L)
VFO
C(FOD)
C(SC)
OUT(UL)
OUT(VL)
OUT(WL)
(26) NU
(27) NV
(28) NW
(29) U
(30) V
(31) W
(32) P
(23) VS(W )
(22) VB(W )
(19) VS(V)
(18) VB(V)
(9) CSC
(8) CFOD
(7) VFO
(5) IN(W L)
(4) IN(VL)
(3) IN(UL)
(2) COM(L)
(1) VCC(L)
(10) RSC
(25) NC
(24) NC
(6) COM(L)
VCC
VB
OUT
COM
VS
IN
VB
VS
OUT
IN
COM
VCC
VCC
VB
OUT
COM
VS
IN
(21) VCC(WH)
(20) IN(W H)
(17) VCC(VH)
(15) IN(VH)
(16) COM(H)
(14) VS(U)
(13) VB(U)
(12) VCC(UH)
(11) IN(UH)
©2003 Fairchild Semiconductor Corporation
FSBM10SM60A
Rev. E, August 2003
Absolute Maximum Ratings (TJ = 25°C, Unless Otherwise Specified)
Inverter Part
Note:
1. It would be recommended that the average junction temperature should be limited to TJ ≤ 125°C (@TC ≤ 100°C) in order to guarantee safe operation.
Control Part
Total System
Item Symbol Condition Rating Unit
Supply Voltage VPN Applied between P- NU, NV
, NW450 V
Supply Voltage (Surge) VPN(Surge) Applied between P- NU, NV
, NW500 V
Collector-Emitter Voltage VCES 600 V
Each IGBT Collector Current ± ICTC = 25°C 10 A
Each IGBT Collector Current ± ICTC = 100°C 9 A
Each IGBT Collector Current (Peak) ± ICP TC = 25°C,
Instantaneous Value (Pulse)
20 A
Collector Dissipation PCTC = 25°C per One Chip 43 W
Operating Junction Temperature TJ(Note 1) -20 ~ 125 °C
Item Symbol Condition Rating Unit
Control Supply Voltage VCC Applied between VCC(UH), VCC(VH), VCC(WH) - COM(H),
VCC(L) - COM(L)
20 V
High-side Control Bias Voltage VBS Applied between VB(U) - VS(U), VB(V) - VS(V), VB(W) -
VS(W)
20 V
Input Signal Voltage VIN Applied between IN(UH), IN(VH), IN(WH) - COM(H)
IN(UL), IN(VL), IN(WL) - COM(L)
-0.3 ~ VCC+0.3 V
Fault Output Supply Voltage VFO Applied between VFO - COM(L) -0.3 ~ VCC+0.3 V
Fault Output Current IFO Sink Current at VFO Pin 5 mA
Current Sensing Input Voltage VSC Applied between CSC - COM(L) -0.3 ~ VCC+0.3 V
Item Symbol Condition Rating Unit
Self Protection Supply Voltage Limit
(Short-Circuit Protection Capability)
VPN(PROT) VCC = VBS = 13.5 ~ 16.5V
TJ = 25°C, Non-repetitive, less than 6µs
400 V
Module Case Operation Temperature TCNote Fig.2 -20 ~ 100 °C
Storage Temperature TSTG -20 ~ 125 °C
Isolation Voltage VISO 60Hz, Sinusoidal, AC 1 minute, Connection
Pins to Heat-sink Plate
2500 Vrms
©2003 Fairchild Semiconductor Corporation
FSBM10SM60A
Rev. E, August 2003
Absolute Maximum Ratings
Thermal Resistance
Note:
2. For the measurement point of case temperature(TC), please refer to Fig. 2.
3. The thickness of thermal grease should not be more than 100um.
Electrical Characteristics (TJ = 25°C, Unless Otherwise Specified)
Inverter Part
Note:
4. tON and tOFF include the propagation delay time of the internal drive IC. tC(ON) and tC(OFF) are the switching time of IGBT itself under the given gate driving condition
internally. For the detailed information, please see Fig. 4.
Item Symbol Condition Min. Typ. Max. Unit
Junction to Case Thermal
Resistance
Rth(j-c)Q Each IGBT under Inverter Operating Condition
--2.9°C/W
Rth(j-c)F Each FWDi under Inverter Operating Condition - - 3.6 °C/W
Contact Thermal
Resistance
Rth(c-h) Ceramic Substrate (per 1 Module)
Thermal Grease Applied (Note 3)
- - 0.06 °C/W
Item Symbol Condition Min. Typ. Max. Unit
Collector - Emitter
Saturation Voltage
VCE(SAT) VCC = VBS = 15V
VIN = 0V
IC = 10A, TJ = 25°C - - 2.3 V
FWDi Forward Voltage VFM VIN = 5V IC = 10A, TJ = 25°C - - 2.3 V
Switching Times tON VPN = 300V, VCC = VBS = 15V
IC = 10A, TJ = 25°C
VIN = 5V ↔ 0V, Inductive Load
(High, Low-side)
(Note 4)
-0.29- us
tC(ON) -0.13- us
tOFF -0.79- us
tC(OFF) -0.37- us
trr -0.13- us
Collector - Emitter
Leakage Current
ICES VCE = VCES, TJ = 25°C - - 250 µA
©2003 Fairchild Semiconductor Corporation
FSBM10SM60A
Rev. E, August 2003
Fig. 4. Switching Time Definition
Fig. 5. Experimental Results of Switching Waveforms
Test Condition: Vdc=300V, Vcc=15V, L=500uH (Inductive Load), TJ=25°
°°
°C
trr
IC
VCE
VIN
tON tC(ON)
VIN (O N )
100% IC
(a) Turn-on (b) Turn-off
ICVCE
VIN
tOFF tC(OFF)
VIN(OFF)
VCE : 100V/div.
IC: 5A/div.
time : 0.1us/div.
(a) turn-on
VCE : 100V/div.
IC: 5A/div.
time : 0.1us/div.
(b) turn-off
(a) Turn-on (b) Turn-off
©2003 Fairchild Semiconductor Corporation
FSBM10SM60A
Rev. E, August 2003
Electrical Characteristics (TJ = 25°C, Unless Otherwise Specified)
Control Part
Note:
5. Short-circuit current protection is functioning only at the low-sides. It would be recommended that the value of the external sensing resistor (RSC) should be
selected around 56 Ω in order to make the SC trip-level of about 15A at the shunt resistors (RSU,RSV,RSW) of 0Ω . For the detailed information about the
relationship between the external sensing resistor (RSC) and the shunt resistors (RSU,RSV,RSW), please see Fig. 6.
6. The fault-out pulse width tFOD depends on the capacitance value of CFOD according to the following approximate equation : CFOD = 18.3 x 10-6 x tFOD[F]
Recommended Operating Conditions
Item Symbol Condition Min. Typ. Max. Unit
Quiescent VCC Supply Cur-
rent
IQCCL VCC = 15V
IN(UL, VL, WL) = 5V
VCC(L) - COM(L) --26mA
IQCCH VCC = 15V
IN(UH, VH, WH) = 5V
VCC(UH), VCC(VH), VCC(WH) -
COM(H)
- - 130 uA
Quiescent VBS Supply Cur-
rent
IQBS VBS = 15V
IN(UH, VH, WH) = 5V
VB(U) - VS(U), VB(V) -VS(V),
VB(W) - VS(W)
- - 420 uA
Fault Output Voltage VFOH VSC = 0V, VFO Circuit: 4.7kΩ to 5V Pull-up 4.5 - - V
VFOL VSC = 1V, VFO Circuit: 4.7kΩ to 5V Pull-up - - 1.1 V
Short-Circuit Trip Level VSC(ref) VCC = 15V (Note 5) 0.45 0.51 0.56 V
Sensing Voltage
of IGBT Current
VSEN RSC = 56 Ω, RSU = RSV = RSW = 0 Ω and IC = 15A
(Note Fig. 6)
0.45 0.51 0.56 V
Supply Circuit Under-
Voltage Protection
UVCCD Detection Level 11.5 12 12.5 V
UVCCR Reset Level 12 12.5 13 V
UVBSD Detection Level 7.3 9.0 10.8 V
UVBSR Reset Level 8.6 10.3 12 V
Fault Output Pulse Width tFOD CFOD = 33nF (Note 6) 1.4 1.8 2.0 ms
ON Threshold Voltage VIN(ON) High-Side Applied between IN(UH), IN(VH),
IN(WH) - COM(H)
--0.8V
OFF Threshold Voltage VIN(OFF) 3.0 - - V
ON Threshold Voltage VIN(ON) Low-Side Applied between IN(UL), IN(VL),
IN(WL) - COM(L)
--0.8V
OFF Threshold Voltage VIN(OFF) 3.0 - - V
Item Symbol Condition Values Unit
Min. Typ. Max.
Supply Voltage VPN Applied between P - NU, NV, NW- 300 400 V
Control Supply Voltage VCC Applied between VCC(UH) - VCC(VH) - VCC(WH) -
COM(H), VCC(L) - COM(L)
13.5 15 16.5 V
High-side Bias Voltage VBS Applied between VB(U) - VS(U), VB(V) - VS(V),
VB(W) - VS(W)
13.5 15 16.5 V
Blanking Time for Preventing
Arm-short
tdead For Each Input Signal 3 - - us
PWM Input Signal fPWM TC ≤ 100°C, TJ ≤ 125°C - 5 - kHz
Input ON Threshold Voltage VIN(ON) Applied between IN(UH), IN(VH), IN(WH) -
COM(H), IN(UL), IN(VL), IN(WL) - COM(L)
0 ~ 0.65 V
Input OFF Threshold Voltage VIN(OFF) Applied between IN(UH), IN(VH), IN(WH) -
COM(H), IN(UL), IN(VL), IN(WL) - COM(L)
4 ~ 5.5 V
©2003 Fairchild Semiconductor Corporation
FSBM10SM60A
Rev. E, August 2003
Fig. 6. RSC Variation by change of Shunt Resistors ( RSU, RSV, RSW) for Short-Circuit Protection
(1) @ around 100% Rated Current Trip (IC ·=· 10A),
,,
,
(2)
@ around 150% Rated Current Trip (IC ·=· 15A)
0.00 0.02 0.04 0.06 0.08 0.10 0.12 0.14
0
20
40
60
80
100
120
(2)
(1)
RSC [Ω]
RSU,RSV,RSW [Ω]
©2003 Fairchild Semiconductor Corporation
FSBM10SM60A
Rev. E, August 2003
Mechanical Characteristics and Ratings
Fig. 7. Flatness Measurement Position of The Ceramic Substrate
Note:
7. Do not make over torque or mounting screws. Much mounting torque may cause ceramic cracks and bolts and Al heat-fin destruction.
8. Avoid one side tightening stress. Fig.8 shows the recommended torque order for mounting screws. Uneven mounting can cause the SPM ceramic substrate to
be damaged.
Fig. 8. Mounting Screws Torque Order
Item Condition Limits Unit
Min. Typ. Max.
Mounting Torque Mounting Screw: M4
(Note 7 and 8)
Recommended 10Kg•cm 8 10 12 Kg•cm
Recommended 0.98N•m 0.78 0.98 1.17 N•m
Ceramic Flatness Note Fig.7 0 - +120 um
Weight -35- g
(+)
(+)
(+)
Datum Line
(+)
(+)
(+)
Datum Line
1
2
1
2
©2003 Fairchild Semiconductor Corporation
FSBM10SM60A
Rev. E, August 2003
Time Charts of SPMs Protective Function
P1 : Normal operation - IGBT ON and conducting current
P2 : Under-Voltage detection
P3 : IGBT gate interrupt
P4 : Fault signal generation
P5 : Under-Voltage reset
P6 : Normal operation - IGBT ON and conducting current
Fig. 9. Under-Voltage Protection (Low-side)
P1 : Normal operation - IGBT ON and conducting current
P2 : Under-Voltage detection
P3 : IGBT gate interrupt
P4 : No fault signal
P5 : Under-Voltage reset
P6 : Normal operation - IGBT ON and conducting current
Fig. 10. Under-Voltage Protection (High-side)
Internal IGBT
Gate-Emitter Voltage
Input Signal
Output Current
Fault Output Signal
Control Supply Voltage
P1
P2
P3
P4
P6
P5
UV detect
UV reset
Input Signal
Output Current
Fault Output Signal
VBS
P1
P2
P3
P4
P6
P5
UV detect
UV reset
©2003 Fairchild Semiconductor Corporation
FSBM10SM60A
Rev. E, August 2003
P1 : Normal operation - IGBT ON and conducting current
P2 : Short-Circuit current detection
P3 : IGBT gate interrupt / Fault signal generation
P4 : IGBT is slowly turned off
P5 : IGBT OFF signal
P6 : IGBT ON signal - but IGBT cannot be turned on during the fault Output activation
P7 : IGBT OFF state
P8 : Fault Output reset and normal operation start
Fig. 11. Short-Circuit Current Protection (Low-side Operation only)
Internal IGBT
Gate-Emitter Voltage
Input Signal
Output Current
Sensing Voltage
Fault Output Signal
P1
P2
P3
P4
P6
P5
P7
P8
SC Reference
Voltage (0.5V)
RC Filter Delay
SC Detection
©2003 Fairchild Semiconductor Corporation
FSBM10SM60A
Rev. E, August 2003
Note:
1) It would be recommended that by-pass capacitors for the gating input signals, IN(UL), IN(VL), IN(WL), IN(UH), IN(VH) and IN(WH) should be placed on the SPM pins
and on the both sides of CPU and SPM for the fault output signal, VFO, as close as possible.
2) The logic input is compatible with standard CMOS or LSTTL outputs.
3) RPLCPL/RPHCPH/RPFCPF coupling at each SPM input is recommended in order to prevent input/output signals’ oscillation and it should be as close as possible to
each of SPM pins.
Fig. 12. Recommended CPU I/O Interface Circuit
Note:
It would be recommended that the bootstrap diode, DBS, has soft and fast recovery characteristics.
Fig. 13. Recommended Bootstrap Operation Circuit and Parameters
CPU
COM
5V-Line
1.2nF0.47nF1nF
Ω
4.7k Ω
4.7k
,,
IN(UL) IN(VL) IN(WL)
,,
IN(UH) IN(VH) IN(WH)
VFO
Ω
100
Ω
100
Ω
100
1nF
SPM
Ω
2k
RPF RPL RPH
CPF CPL CPH
15V-Line
20Ω
33uF 0.1uF
470uF 0.1uF
One-Leg Diagram of SPM
Vcc
IN
COM
VB
HO
VS
Vcc
IN
COM
OUT
Inverter
Output
P
N
These Values depend on PWM Control Algorithm
DBS
©2003 Fairchild Semiconductor Corporation
FSBM10SM60A
Rev. E, August 2003
Note:
1) RPLCPL/RPHCPH /RPFCPF coupling at each SPM input is recommended in order to prevent input signals’ oscillation and it should be as close as possible to each
SPM input pin.
2) By virtue of integrating an application specific type HVIC inside the SPM, direct coupling to CPU terminals without any opto-coupler or transformer isolation is
possible.
3) VFO output is open collector type. This signal line should be pulled up to the positive side of the 5V power supply with approximately 4.7kΩ resistance. Please
refer to Fig. 14.
4) CSP15 of around 7 times larger than bootstrap capacitor CBS is recommended.
5) VFO output pulse width should be determined by connecting an external capacitor(CFOD) between CFOD(pin8) and COM(L)(pin2). (Example : if CFOD = 33 nF, then
tFO = 1.8 ms (typ.)) Please refer to the note 6 for calculation method.
6) Each input signal line should be pulled up to the 5V power supply with approximately 4.7kΩ (at high side input) or 2kΩ (at low side input) resistance (other RC
coupling circuits at each input may be needed depending on the PWM control scheme used and on the wiring impedance of the system’s printed circuit board).
Approximately a 0.22~2nF by-pass capacitor should be used across each power supply connection terminals.
7) To prevent errors of the protection function, the wiring around RSC, RF and CSC should be as short as possible.
8) In the short-circuit protection circuit, please select the RFCSC time constant in the range 3~4 µs.
9) To enhance the noise immunity, CSC pin should be connected to the external circuit through a series resistor, RCSC, which is approximately 390Ω. RSCS should
be connected to CSC pin as close as possible.
10)Each capacitor should be mounted as close to the pins of the SPM as possible.
11)To prevent surge destruction, the wiring between the smoothing capacitor and the P&N pins should be as short as possible. The use of a high frequency non-
inductive capacitor of around 0.1~0.22 uF between the P&N pins is recommended.
12)Relays are used at almost every systems of electrical equipments of home appliances. In these cases, there should be sufficient distance between the CPU and
the relays. It is recommended that the distance be 5cm at least.
Fig. 14. Typical Application Circuit
COM(L)
VCC
IN(UL)
IN(VL)
IN(WL )
VFO
C(FOD)
C(SC)
OUT(UL)
OUT(VL)
OUT(WL)
NU (26)
NV (27)
NW (28)
U (29)
V (30)
W (31)
P (32)
(23) VS(W)
(22) VB(W)
(19) VS(V)
(18) VB(V)
(9) CSC
(8) CFOD
(7) VFO
(5) IN(W L)
(4) IN(V L)
(3) IN(U L)
(2) COM(L)
(1) VCC(L)
(10) RSC
NC (24)
NC (25)
(6) COM (L)
VCC
VB
OUT
COM
VS
IN
VB
VS
OUT
IN
COM
VCC
VCC
VB
OUT
COM
VS
IN
(21) VCC(WH)
(20) IN(WH)
(17) VCC(VH)
(15) IN(VH)
(16) COM(H)
(14) VS(U)
(13) VB(U)
(12) VCC(UH)
(11) IN(UH)
Fault
15 V line
CBS CBSC
RBS DBS
CBS CBSC
RBS DBS
CBS CBSC
RBS DBS
CSP15 CSPC15
CFOD
5V line
RPF
CPL
CBPF
RPL
RPL
RPL
CPL
CPL
5V line
CPH
RPH
CPH
RPH
CPH
RPH
RS
RS
RS
RS
RS
RS
RS
M
Vdc
CDCS
Gating U H
Gating VH
Gating W H
Gating W H
Gating VH
Gating U H
CPF
C
CC
C
P
PP
P
U
UU
U
RFU
RFV
RFW
RSU
RSV
RSW
CFU
CFV
CFW
W-Phase Current
V-Phase Current
U-Phase Current
RF
CSC
RSC
RCSC
©2003 Fairchild Semiconductor Corporation
FSBM10SM60A
Rev. E, August 2003
Detailed Package Outline Drawings
60.0 ±0.5 0
53.0 ±0.3 0
(46.60)
19.86±0.30
28.0 ±0.3 0
31.0 ±0. 50
13.6
±0.30
(17.00)
(3.30)
#1
#23
#24
#32
28x2.00 ±0.30=(56.0)
(2.00)
2.00 ±0.3 0
0.40
0.60 ±0.10
MAX1.05
0.40
0.60 ±0.10
MAX1.00
(
10.14
)
11.0
±0.30
3x7.62
±0.30
=(22.86)
3x4.0
±0.30
=(12.0
)
2.00
±0.30
(3.70)
(3.50)
MAX8.20
MAX1.00
0.80
1.30±0.10
MAX3.20
0.80
1.30±0.10
MAX2.50
0.40
0.60±0.10
MAX1.60
(34.80)
Ø4.30
36.05 ±0.50
7.20 ±0.5
12.30 ±0.5
(3°~5° )
0.70
-0.05
+0.10
SPM32-AA
Dimensions in Millimeters
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY
ARISING OUT OF THE APPLICA TION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT
CONVEY ANY LICENSE UNDER ITS P ATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
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The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROV AL OF F AIRCHILD SEMICONDUCTOR CORPORA TION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT ST A TUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
LittleFET™
MICROCOUPLER™
MicroFET™
MicroPak™
MICROWIRE™
MSX™
MSXPro™
OCX™
OCXPro™
OPTOLOGIC
OPTOPLANAR™
PACMAN™
POP™
F ACT Quiet Series™
FAST
FASTr™
FRFET™
GlobalOptoisolator™
GTO™
HiSeC™
I2C™
ImpliedDisconnect™
ISOPLANAR™
Rev. I5
ACEx™
ActiveArray™
Bottomless™
CoolFET™
CROSSVOLT™
DOME™
EcoSPARK™
E2CMOSTM
EnSignaTM
FACT™
Power247™
PowerTrench
QFET
QS™
QT Optoelectronics™
Quiet Series™
RapidConfigure™
RapidConnect™
SILENT SWITCHER
SMART ST ART™
SPM™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic
TINYOPTO™
TruTranslation™
UHC™
UltraFET
VCX™
Across the board. Around the world.™
The Power Franchise™
Programmable Active Droop™
