© Semiconductor Components Industries, LLC, 2010
November, 2010 − Rev. 1
1Publication Order Number:
MC74HCT4066A/D
MC74HCT4066A
Quad Analog Switch/
Multiplexer/Demultiplexer
with LSTTL Compatible
Inputs
High−Performance Silicon−Gate CMOS
The MC74HCT4066A utilizes silicon−gate CMOS technology to
achieve fast propagation delays, low ON resistances, and low
OFF−channel leakage current. This bilateral switch/
multiplexer/demultiplexer controls analog and digital voltages that
may vary across the full power−supply range (from VCC to GND).
The HCT4066A is identical in pinout to the metal−gate CMOS
MC14016 and MC14066. Each device has four independent switches.
The device has been designed so the ON resistances (RON) are more
linear over input voltage than RON of metal−gate CMOS analog
switches.
The ON/OFF control inputs are compatible with standard CMOS and
LSTTL outputs. For analog switches with voltage−level translators, see
the HC4316A.
Features
•Fast Switching and Propagation Speeds
•High ON/OFF Output Voltage Ratio
•Low Crosstalk Between Switches
•Diode Protection on All Inputs/Outputs
•Wide Power−Supply Voltage Range (VCC − GND) = 4.5 to 5.5 V
•Analog Input Voltage Range (VCC − GND) = 0 to 5.5 V
•Improved Linearity and Lower ON Resistance over Input Voltage
than the MC14016 or MC14066
•Low Noise
•Chip Complexity: 44 FETs or 11 Equivalent Gates
•These are Pb−Free Devices
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MARKING
DIAGRAMS
A = Assembly Location
L, WL = Wafer Lot
Y, YY = Year
W, WW = Work Week
G or = Pb−Free Package
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION
TSSOP−14
DT SUFFIX
CASE 948G
14
1
SOIC−14
D SUFFIX
CASE 751A
HCT40
66A
ALYW
1
14
(Note: Microdot may be in either location)
HCT4066AG
AWLYWW
1
14
1
14
MC74HCT4066A
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2
XAYA
12
A ON/OFF CONTROL 13
XBYB
43
B ON/OFF CONTROL 5
XCYC
89
C ON/OFF CONTROL 6
XDYD
11 10
D ON/OFF CONTROL 12
ANALOG
OUTPUTS/INPUTS
ANALOG INPUTS/OUTPUTS = XA, XB, XC, XD
PIN 14 = VCC
PIN 7 = GND
FUNCTION TABLE
On/Off Control State of
Input Analog Switch
LOff
HOn
Figure 1. Pin Assignment
11
12
13
14
8
9
105
4
3
2
1
7
6
YD
XD
VCC
XC
YC
XB
YB
YA
XA
GND
D ON/OFF CONTROL
A ON/OFF CONTROL
C ON/OFF CONTROL
B ON/OFF CONTROL
Figure 2. Logic Diagram
ORDERING INFORMATION
Device Package Shipping†
MC74HCT4066ADG SOIC−14
(Pb−Free) 55 Units / Rail
MC74HCT4066ADR2G SOIC−14
(Pb−Free) 2500 / Tape & Reel
MC74HCT4066ADTR2G TSSOP−14* 2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
MC74HCT4066A
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3
MAXIMUM RATINGS
Symbol Parameter Value Unit
VCC Positive DC Supply Voltage (Referenced to GND) –0.5 to +14.0 V
VIS Analog Input Voltage (Referenced to GND) –0.5 to VCC + 0.5 V
Vin Digital Input Voltage (Referenced to GND) –0.5 to VCC + 0.5 V
IDC Current Into or Out of Any Pin ±25 mA
PDPower Dissipation in Still Air, SOIC Package†
TSSOP Package†
500
450
mW
Tstg Storage Temperature –65 to +150 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress
ratings only. Functional operation above the Recommended Operating Conditions is not implied.
Extended exposure to stresses above the Recommended Operating Conditions may affect device
reliability.
†Derating −SOIC Package: – 7 mW/°C from 65°C to 125°C
TSSOP Package: − 6.1 mW/°C from 65°C to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
VCC Positive DC Supply Voltage (Referenced to GND) 4.5 5.5 V
VIS Analog Input Voltage (Referenced to GND) GND VCC V
Vin Digital Input Voltage (Referenced to GND) GND VCC V
VIO*Static or Dynamic Voltage Across Switch −1.2 V
TAOperating Temperature, All Package Types –55 +125 °C
tr, tfInput Rise and Fall Time, ON/OFF Control Inputs
(Figure 10) VCC = 4.5 V 0 500
ns
*For voltage drops across the switch greater than 1.2 V (switch on), excessive VCC current may be drawn; i.e., the current out of the switch may
contain both VCC and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded.
DC ELECTRICAL CHARACTERISTIC Digital Section (Voltages Referenced to GND)
Symbol Parameter Test Conditions
VCC
V
Guaranteed Limit
Unit
– 55 to
25°Cv 85°Cv 125°C
VIH Minimum High−Level Voltage
ON/OFF Control Inputs
Ron = Per Spec 4.5 to 5.5 2.0 2.0 2.0 V
VIL Maximum Low−Level Voltage
ON/OFF Control Inputs
Ron = Per Spec 4.5 to 5.5 0.8 0.8 0.8 V
Iin Maximum Input Leakage Current
ON/OFF Control Inputs
Vin = VCC or GND 5.5 ±0.1 ±1.0 ±1.0 A
ICC Maximum Quiescent Supply Current
(per Package)
Vin = VCC or GND
VIO = 0 V
5.5 2 20 40 A
ICC Additional Quiescent Supply Current
(per Input)
Vin = VCC − 2.1 V
Other control inputs at VCC
or GND
4.5 to 5.5 360 450 490 A
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high−impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND v (Vin or Vout) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
I/O pins must be connected to a
properly terminated line or bus.
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4
DC ELECTRICAL CHARACTERISTICS Analog Section (Voltages Referenced to GND)
Symbol Parameter Test Conditions
VCC
V
Guaranteed Limit
Unit
– 55 to
25°Cv 85°Cv 125°C
Ron Maximum “ON” Resistance Vin = VIH
VIS = VCC to GND
IS v 2.0 mA (Figures 3, 4)
4.5 120 160 200
Vin = VIH
VIS = VCC or GND
(Endpoints)
IS v 2.0 mA (Figures 3, 4)
4.5 70 85 120
Ron Maximum Difference in “ON”
Resistance Between Any Two
Channels in the Same Package
Vin = VIH
VIS = 1/2 (VCC − GND)
IS v 2.0 mA
4.5 20 25 30
Ioff Maximum Off−Channel Leakage
Current, Any One Channel
Vin = VIL
VIO = VCC or GND
Switch Off (Figure 5)
5.5 0.1 0.5 1.0 A
Ion Maximum On−Channel Leakage
Current, Any One Channel
Vin = VIH
VIS = VCC or GND
(Figure 6)
5.5 0.1 0.5 1.0 A
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, ON/OFF Control Inputs: tr = tf = 6 ns)
Symbol Parameter
VCC
V
Guaranteed Limit
Unit
– 55 to
25°Cv 85°Cv 125°C
tPLH,
tPHL
Maximum Propagation Delay, Analog Input to Analog Output
(Figures 10 and 11)
4.5 10 13 15 ns
tPLZ,
tPHZ
Maximum Propagation Delay, ON/OFF Control to Analog Output
(Figures 12 and 13)
4.5 30 38 45 ns
tPZL,
tPZH
Maximum Propagation Delay, ON/OFF Control to Analog Output
(Figures 12 and 13)
4.5 25 32 37 ns
CMaximum Capacitance ON/OFF Control Input −10 10 10 pF
Control Input = GND
Analog I/O
Feedthrough
−
−
35
1.0
35
1.0
35
1.0
CPD Power Dissipation Capacitance (Per Switch) (Figure 15)*
Typical @ 25°C, VCC = 5.0 V
pF
15
*Used to determine the no−load dynamic power consumption: PD = CPD VCC2f + ICC VCC.
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5
ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted)
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
Symbol
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
Parameter
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Test Conditions
ÎÎÎ
ÎÎÎ
ÎÎÎ
VCC
V
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
Limit*
25°C
54/74HCT
ÎÎÎ
ÎÎÎ
ÎÎÎ
Unit
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
BW
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
Maximum On−Channel Bandwidth or
Minimum Frequency Response
(Figure 7)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
fin = 1 MHz Sine Wave
Adjust fin Voltage to Obtain 0 dBm at VOS
Increase fin Frequency Until dB Meter Reads – 3 dB
RL = 50 , CL = 10 pF
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
4.5
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
150
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
MHz
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
−
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
Off−Channel Feedthrough Isolation
(Figure 8)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
fin Sine Wave
Adjust fin Voltage to Obtain 0 dBm at VIS
fin = 10 kHz, RL = 600 , CL = 50 pF
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
4.5
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
−50
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
dB
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
fin = 1.0 MHz, RL = 50 , CL = 10 pF
ÎÎÎ
ÎÎÎ
4.5
ÎÎÎÎ
ÎÎÎÎ
−40
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
−
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
Feedthrough Noise, Control to
Switch
(Figure 9)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
Vin v 1 MHz Square Wave (tr = tf = 6 ns)
Adjust RL at Setup so that IS = 0 A
RL = 600 , CL = 50 pF
ÎÎÎ
ÎÎÎ
ÎÎÎ
4.5
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
60
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
mVPP
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
RL = 10 k, CL = 10 pF
ÎÎÎ
ÎÎÎ
4.5
ÎÎÎÎ
ÎÎÎÎ
30
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
−
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
Crosstalk Between Any Two
Switches
(Figure 14)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
fin Sine Wave
Adjust fin Voltage to Obtain 0 dBm at VIS
fin = 10 kHz, RL = 600 , CL = 50 pF
ÎÎÎ
ÎÎÎ
ÎÎÎ
4.5
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
–70
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
dB
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
fin = 1.0 MHz, RL = 50 , CL = 10 pF
ÎÎÎ
ÎÎÎ
4.5
ÎÎÎÎ
ÎÎÎÎ
–80
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
THD
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎ
Total Harmonic Distortion
(Figure 16)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
fin = 1 kHz, RL = 10 k, CL = 50 pF
THD = THDMeasured − THDSource
VIS = 4.0 VPP sine wave
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
4.5
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
0.10
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
%
*Guaranteed limits not tested. Determined by design and verified by qualification.
MC74HCT4066A
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6
Figure 3. Typical On Resistance, VCC = 4.5 V
0
20
40
60
80
100
120
140
160
180
200
0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50
Vis, INPUT VOLTAGE (VOLTS), REFERENCED TO GROUND
RON @ 4.5 V
+25 °C
+125°C
−55°C
Figure 4. On Resistance Test Set−Up
PLOTTER
MINI COMPUTER
PROGRAMMABLE
POWER
SUPPLY
DC ANALYZER
VCC
+-
ANALOG IN COMMON OUT
GND
DEVICE
UNDER TEST
Figure 5. Maximum Off Channel Leakage Current,
Any One Channel, Test Set−Up
OFF
7
14
VCC
A
VCC
GND
VCC
SELECTED
CONTROL
INPUT
VIL
Figure 6. Maximum On Channel Leakage Current,
Test Set−Up
ON
14
VCC
N/C
A
GND
VCC
7
SELECTED
CONTROL
INPUT
VIH
MC74HCT4066A
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7
Figure 7. Maximum On−Channel Bandwidth
Test Set−Up
ON
14
VCC
0.1FCL*
fin dB
METER
*Includes all probe and jig capacitance.
VOS
7
SELECTED
CONTROL
INPUT
VCC
Figure 8. Off−Channel Feedthrough Isolation,
Test Set−Up
OFF
7
14
VCC
0.1FCL*
fin dB
METER
*Includes all probe and jig capacitance.
VOS
RL
VIS
SELECTED
CONTROL
INPUT
Figure 9. Feedthrough Noise, ON/OFF Control to
Analog Out, Test Set−Up
14
VCC
CL*
*Includes all probe and jig capacitance.
OFF/ON
3.0 V
GND
Vin ≤1 MHz
tr = tf = 6 ns
CONTROL
VCC/2
RL
IS
RLVOS
7
SELECTED
CONTROL
INPUT
VCC/2
VCC
GND
ANALOG IN
ANALOG OUT 50%
tPLH tPHL
50%
Figure 10. Propagation Delays, Analog In to
Analog Out
(VI)
MC74HCT4066A
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8
POSITIONWHEN TESTING tPLZ AND tPZL
Figure 11. Propagation Delay Test Set−Up
ON
14
VCC
*Includes all probe and jig capacitance.
TEST
POINT
ANALOG OUTANALOG IN
CL*
7
SELECTED
CONTROL
INPUT
VCC
trtf
VCC
GND
HIGH
IMPEDANCE
VOL
VOH
HIGH
IMPEDANCE
CONTROL
ANALOG
OUT
90%
Vm
10%
50%
50%
10%
90%
tPZH tPHZ
tPZL tPLZ
Figure 12. Propagation Delay, ON/OFF Control
to Analog Out
ON/OFF
VCC
TEST
POINT
14
VCC
1 k
POSITIONWHEN TESTING tPHZ AND tPZH
CL*
1
2
1
2
Figure 13. Propagation Delay Test Set−Up
1
2
7
SELECTED
CONTROL
INPUT
Figure 14. Crosstalk Between Any Two Switches,
Test Set−Up
RL
ON
14
VCC OR GND CL*
*Includes all probe and jig capacitance.
OFF
RL
RL
VIS
RLCL*
VOS
fin
0.1 F
VCC/2 VCC/2
7
SELECTED
CONTROL
INPUT
VCC/2
Figure 15. Power Dissipation Capacitance
Test Set−Up
14
VCC
N/C
OFF/ON
A
N/C
7
SELECTED
CONTROL
INPUT
ON/OFF CONTROL
ON
VCC
0.1 F
CL*
fin
RL
TO
DISTORTION
METER
*Includes all probe and jig capacitance.
VOS
VIS
7
SELECTED
CONTROL
INPUT
VCC
Figure 16. Total Harmonic Distortion, Test Set−Up
*Includes all probe and jig capacitance.
VCC
VCC/2
(VI)
VI = GND to 3.0 V
Vm = 1.3 V
MC74HCT4066A
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9
0
-10
-20
-30
-40
-50
1.0 2.0
FREQUENCY (kHz)
dBm
-60
-70
-80
-90
FUNDAMENTAL FREQUENCY
DEVICE
SOURCE
Figure 17. Plot, Harmonic Distortion
3.0
APPLICATION INFORMATION
Unused analog inputs/outputs may be left floating (not
connected). However, it is advisable to tie unused analog
inputs and outputs to VCC or GND through a low value
resistor. This minimizes crosstalk and feedthrough noise
that may be picked−up by the unused I/O pins.
The maximum analog voltage swings are determined by
the supply voltages VCC and GND. The positive peak analog
voltage should not exceed VCC. Similarly, the negative peak
analog voltage should not go below GND. In the example
below, the difference between VCC and GND is twelve volts.
Therefore, using the configuration in Figure 16, a maximum
analog signal of twelve volts peak−to−peak can be
controlled.
When voltage transients above VCC and/or below GND
are anticipated on the analog channels, external diodes (Dx)
are recommended as shown in Figure 17. These diodes
should be small signal, fast turn−on types able to absorb the
maximum anticipated current surges during clipping. An
alternate method would be to replace the Dx diodes with
MOSORB® (MOSORB is an acronym for high current
surge protectors). MOSORBs are fast turn−on devices
ideally suited for precise DC protection with no inherent
wear out mechanism.
ANALOG O/I
ON
14
VCC = 5 V
ANALOG I/O
+ 5 V
0 V
+ 5 V
0 V
OTHER CONTROL
INPUTS
ON
16
VCC
Dx
Dx
VCC
Dx
Figure 18. 5 V Application Figure 19. Transient Suppressor Application
7
SELECTED
CONTROL
INPUT
Dx
OTHER CONTROL
INPUTS
7
SELECTED
CONTROL
INPUT
VCC
MC74HCT4066A
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10
+5 V
14
HC4066A
CONTROL
INPUTS
7
5
6
14
15
LSTTL/
NMOS
ANALOG
SIGNALS
R* R* R* R*
ANALOG
SIGNALS
R* = 2 TO 10 k
CHANNEL 4
CHANNEL 3
CHANNEL 2
CHANNEL 1
1 OF 4
SWITCHES
COMMON I/O
1234
CONTROL INPUTS
INPUT
OUTPUT
0.01 F
LF356 OR
EQUIVALENT
a. Using Pull-Up Resistors with HC Device b. Using HCT Buffer
Figure 20. LSTTL/NMOS to HCTMOS Interface
Figure 21. 4−Input Multiplexer Figure 22. Sample/Hold Amplifier
+
-
1 OF 4
SWITCHES
+5 V
14
CONTROL
INPUTS
7
5
6
14
15
LSTTL/
NMOS
ANALOG
SIGNALS
ANALOG
SIGNALS
1 OF 4
SWITCHES
1 OF 4
SWITCHES
1 OF 4
SWITCHES
HCT4066A
MC74HCT4066A
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11
PACKAGE DIMENSIONS
SOIC−14
CASE 751A−03
ISSUE J
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
−A−
−B−
G
P7 PL
14 8
7
1
M
0.25 (0.010) B M
S
B
M
0.25 (0.010) A S
T
−T−
F
RX 45
SEATING
PLANE D14 PL K
C
J
M
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A8.55 8.75 0.337 0.344
B3.80 4.00 0.150 0.157
C1.35 1.75 0.054 0.068
D0.35 0.49 0.014 0.019
F0.40 1.25 0.016 0.049
G1.27 BSC 0.050 BSC
J0.19 0.25 0.008 0.009
K0.10 0.25 0.004 0.009
M0 7 0 7
P5.80 6.20 0.228 0.244
R0.25 0.50 0.010 0.019
7.04
14X
0.58
14X
1.52
1.27
DIMENSIONS: MILLIMETERS
1
PITCH
SOLDERING FOOTPRINT*
7X
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
MC74HCT4066A
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12
PACKAGE DIMENSIONS
TSSOP−14
CASE 948G−01
ISSUE B
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A4.90 5.10 0.193 0.200
B4.30 4.50 0.169 0.177
C−−− 1.20 −−− 0.047
D0.05 0.15 0.002 0.006
F0.50 0.75 0.020 0.030
G0.65 BSC 0.026 BSC
H0.50 0.60 0.020 0.024
J0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L6.40 BSC 0.252 BSC
M0 8 0 8
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
S
U0.15 (0.006) T
2X L/2
S
U
M
0.10 (0.004) V S
T
L−U−
SEATING
PLANE
0.10 (0.004)
−T−
ÇÇÇ
ÇÇÇ
SECTION N−N
DETAIL E
JJ1
K
K1
ÉÉÉ
ÉÉÉ
DETAIL E
F
M
−W−
0.25 (0.010)
8
14
7
1
PIN 1
IDENT.
H
G
A
D
C
B
S
U0.15 (0.006) T
−V−
14X REFK
N
N
7.06
14X
0.36 14X
1.26
0.65
DIMENSIONS: MILLIMETERS
1
PITCH
SOLDERING FOOTPRINT*
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
MC74HCT4066A
http://onsemi.com
13
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