Rev.4.2_00
2-WIRE CMOS SERIAL E2PROM S-24CS64A
Seiko Instruments Inc. 1
The S-24CS64A is a 2-wired, low power and wide
range operation 64 K-bit E2PROM organized as 8192
words × 8 bits.
Page write and sequential read are available.
Features
Low power consumption Standby : 5.0 µA Max. (VCC = 5.5 V)
Read : 0.8 mA Max. (VCC = 5.5 V)
Operating voltage range Read : 1.8 to 5.5 V
Write : 2.7 to 5.5 V
Page write : 32 bytes / page
Sequential read
Operating Frequency : 400 kHz (VCC = 2.7 to 5.5 V)
Write disable function when power supply voltage is low
Endurance: 106 cycles / word*1 (at +25°C) write capable,
105 cycles / word*1 (at +85°C)
*1. For each address (Word: 8 bits)
Data retention: 10 years (after rewriting 105 cycles / word at +85°C)
Write protection : 100 %
Lead-free products
Packages
Drawing code
Package name Package Tape Reel
8-Pin SOP (JEDEC) FJ008-A FJ008-D FJ008-D
8-Pin TSSOP FT008-A FT008-E FT008-E
WLP Please contact our sales office regarding the product with WLP package.
Caution This product is intended to use in general electronic devices such as consumer electronics,
office equipment, and communications devices. Before using the product in medical
equipment or automobile equipment including car audio, keyless entry and engine control
unit, contact to SII is indispensable.
DISCONTINUED
C) write capable,
DISCONTINUED
C) write capable,
85
DISCONTINUED
85
°
DISCONTINUED
°
C)
DISCONTINUED
C)
For each address (Word: 8 bits)
DISCONTINUED
For each address (Word: 8 bits)
Data retention: 10 years (after rewriting 10
DISCONTINUED
Data retention: 10 years (after rewriting 10
5
DISCONTINUED
5
DISCONTINUED
Package Tape Reel
DISCONTINUED
Package Tape Reel
DISCONTINUED
FJ008-A
DISCONTINUED
FJ008-A
DISCONTINUED
DISCONTINUED
TSSOP FT008-A FT008-E FT008-E
DISCONTINUED
TSSOP FT008-A FT008-E FT008-E
DISCONTINUED
TSSOP FT008-A FT008-E FT008-E
DISCONTINUED
TSSOP FT008-A FT008-E FT008-E
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
Please contact our sales office regarding the product with WLP package.
DISCONTINUED
Please contact our sales office regarding the product with WLP package.
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
This product is intended to use in general electronic devices such as consumer electronics,
DISCONTINUED
This product is intended to use in general electronic devices such as consumer electronics,
DISCONTINUED
office equipment, and communications devi
DISCONTINUED
office equipment, and communications devi
equipment or automobile equipment including
DISCONTINUED
equipment or automobile equipment including
PRODUCT
Page write and sequential read are available.
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Page write and sequential read are available.
C) write capable,
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C) write capable,
2-WIRE CMOS SERIAL E2PROM
S-24CS64A Rev.4.2_00
Seiko Instruments Inc.
2
Pin Configurations
8-Pin SOP (JEDEC)
Top view
Table 1
Pin No. Symbol Description
1 A0 Slave address input
2 A1 Slave address input
3 A2 Slave address input
4 GND Ground
5 SDA Serial data input / output
6 SCL Serial clock input
7 WP
Write protection input
Connected to VCC: Protection valid
Connected to GND: Protection invalid
8 VCC Power supply
Remark See Dimensions for details of the package drawings.
1
2
3
4
8
7
6
5
VCC
WP
SCL
SD
A
A0
A1
GND
A2
Figure 1
S-24CS64A0I-J8T1G
8-Pin TSSOP
Top view
Table 2
Pin No. Symbol Description
1 A0 Slave address input
2 A1 Slave address input
3 A2 Slave address input
4 GND Ground
5 SDA Serial data input / output
6 SCL Serial clock input
7 WP
Write protection input
Connected to VCC: Protection valid
Connected to GND: Protection invalid
8 VCC Power supply
Remark See Dimensions for details of the package drawings.
1
2
3
4
8
7
6
5
VCC
WP
SCL
SD
A
A0
A1
GND
A2
Figure 2
S-24CS64A0I-T8T1G
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Pin No. Symbol
DISCONTINUED
Pin No. Symbol
DISCONTINUED
DISCONTINUED
1 A0 Slave address input
DISCONTINUED
1 A0 Slave address input
DISCONTINUED
2 A1 Slave address input
DISCONTINUED
2 A1 Slave address input
DISCONTINUED
DISCONTINUED
DISCONTINUED
3 A2 Slave address input
DISCONTINUED
3 A2 Slave address input
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
4 GND Ground
DISCONTINUED
4 GND Ground
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
5 SDA Serial data input / output
DISCONTINUED
5 SDA Serial data input / output
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
6 SCL Serial clock input
DISCONTINUED
6 SCL Serial clock input
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
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5 SDA Serial data input / output
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5 SDA Serial data input / output
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6 SCL Serial clock input
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6 SCL Serial clock input
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Write protection input
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Write protection input
Connected to V
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Connected to V
Connected to GND: Protection invalid
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Connected to GND: Protection invalid
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Power supply
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Power supply
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See Dimensions for details of the package drawings.
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See Dimensions for details of the package drawings.
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2-WIRE CMOS SERIAL E2PROM
Rev.4.2_00 S-24CS64A
Seiko Instruments Inc. 3
WLP
Bottom view
Table 3
Pin No. Symbol Description
1 A0 Slave address input
2 VCC Power supply
3 WP
Write protection input
Connected to VCC: Protection valid
Connected to GND: Protection invalid
4 SCL Serial clock input
5 SDA Serial data input / output
6 GND Ground
7 A2 Slave address input
8 A1 Slave address input
VCC WP
SCL
SDA
GND
1
5
2 3
4
6
A0
A1
A2
7
8
Figure 3
S-24CS64A0I-H8Tx
Remark Please contact our sales office regarding the product with WLP package.
DISCONTINUED
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Connected to GND: Protection invalid
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Connected to GND: Protection invalid
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5 SDA Serial data input / output
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5 SDA Serial data input / output
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7 A2 Slave address input
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7 A2 Slave address input
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8 A1 Slave address input
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8 A1 Slave address input
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Please contact our sales office regarding the product with WLP package.
PRODUCT
Please contact our sales office regarding the product with WLP package.
2-WIRE CMOS SERIAL E2PROM
S-24CS64A Rev.4.2_00
Seiko Instruments Inc.
4
Block Diagram
VCC
GND
Serial Clock
Controller
Device Address
Comparator
Address
Counter
Y Decoder
Data Output
ACK Output
Controller
Start / Stop
Detector
Data Register
E
2
PROM
X Decoder
Selector
High-Voltage Generator
SCL
SDA
A
2
DIN
DOUT
R / W
LOAD INC
COMP
LOAD
WP
A
1
A
0
Voltage Detecto
r
Figure 4
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High-Voltage Generator
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High-Voltage Generator
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Y Decoder
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Y Decoder
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2-WIRE CMOS SERIAL E2PROM
Rev.4.2_00 S-24CS64A
Seiko Instruments Inc. 5
Absolute Maximum Ratings
Table 4
Item Symbol Ratings Unit
Power supply voltage VCC 0.3 to +7.0 V
Input voltage VIN 0.3 to +7.0 V
Output voltage VOUT 0.3 to +7.0 V
Operating ambient temperature Topr 40 to +85 °C
Storage temperature Tstg 65 to +150 °C
Caution The absolute maximum ratings are rated values exceeding which the
product could suffer physical damage. These values must therefore not
be exceeded under any conditions.
Recommended Operating Conditions
Table 5
Item Symbol Conditions Min. Typ. Max. Unit
Read Operation 1.8 5.5 V
Power supply voltage VCC Write Operation 2.7 5.5 V
VCC = 2.5 to 5.5 V 0.7×VCC VCC V
High level input voltage VIH VCC = 1.8 to 2.5 V 0.8×VCC VCC V
VCC = 2.5 to 5.5 V 0.0 0.3×VCC V
Low level input voltage VIL VCC = 1.8 to 2.5 V 0.0 0.2×VCC V
Pin Capacitance
Table 6
(Ta = 25°C, f = 1.0 MHz, VCC = 5 V)
Item Symbol Conditions Min. Typ. Max. Unit
Input capacitance CIN VIN = 0 V (SCL, A0, A1, A2, WP) 10 pF
Input / output capacitance CI / O VI / O = 0 V (SDA) 10 pF
Endurance
Table 7
Item Symbol Operation temperature Min. Typ. Max. Unit
Endurance NW 40 to +85°C 105 cycles / word*1
*1. For each address (Word: 8 bits)
DISCONTINUED
2.5 to 5.5 V 0.7
DISCONTINUED
2.5 to 5.5 V 0.7
1.8 to 2.5 V 0.8
DISCONTINUED
1.8 to 2.5 V 0.8
DISCONTINUED
2.5 to 5.5 V
DISCONTINUED
2.5 to 5.5 V
DISCONTINUED
1.8 to 2.5 V
DISCONTINUED
1.8 to 2.5 V
DISCONTINUED
DISCONTINUED
Item Symbol Conditions Min. Typ. Max. Unit
DISCONTINUED
Item Symbol Conditions Min. Typ. Max. Unit
DISCONTINUED
DISCONTINUED
Input capacitance C
DISCONTINUED
Input capacitance C
IN
DISCONTINUED
IN
DISCONTINUED
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Input / output capacitance C
DISCONTINUED
Input / output capacitance C
I / O
DISCONTINUED
I / O
DISCONTINUED
DISCONTINUED
Input / output capacitance C
DISCONTINUED
Input / output capacitance C
DISCONTINUED
DISCONTINUED
DISCONTINUED
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Item Symbol Operation temperature Min. Typ. Max. Unit
DISCONTINUED
Item Symbol Operation temperature Min. Typ. Max. Unit
DISCONTINUED
DISCONTINUED
DISCONTINUED
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Caution The absolute maximum ratings are rated values exceeding which the
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Caution The absolute maximum ratings are rated values exceeding which the
product could suffer physical damage. These values must therefore not
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product could suffer physical damage. These values must therefore not
Item Symbol Conditions Min. Typ. Max. Unit
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Item Symbol Conditions Min. Typ. Max. Unit
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Read Operation 1.8
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Read Operation 1.8
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Write Operation 2.7
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Write Operation 2.7
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2.5 to 5.5 V 0.7
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2.5 to 5.5 V 0.7
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2-WIRE CMOS SERIAL E2PROM
S-24CS64A Rev.4.2_00
Seiko Instruments Inc.
6
DC Electrical Characteristics
Table 8
V
CC
= 4.5 to 5.5 V
f = 400 kHz
V
CC
= 2.7 to 4.5 V
f = 100 kHz
V
CC
= 1.8 to 2.7 V
f = 100 kHz
Item Symbol Conditions
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
Unit
Current consumption
(READ) I
CC1
0.8 0.5 0.3
mA
Current consumption
(WRITE) I
CC2
4.0 3.0
mA
Table 9
V
CC
= 4.5 to 5.5 V V
CC
= 2.7 to 4.5 V V
CC
= 1.8 to 2.7 V
Item
Symbol
Conditions
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit
Standby current consumption I
SB
V
IN
=
V
CC
or GND

5.0

3.0
3.0
µ
A
Input leakage current I
LI
V
IN
=
GND
to
V
CC
0.1 1.0
0.1 1.0
0.1 1.0
µ
A
Output leakage current I
LO
V
OUT
=
GND
to
V
CC
0.1 1.0
0.1 1.0
0.1 1.0
µ
A
I
OL
=
3.2 mA

0.4


V
Low level output voltage V
OL
I
OL
=
1.5 mA

0.3

0.3
0.3 V
Current address hold voltage V
AH
1.5
5.5 1.5
4.5 1.5
2.7 V
DISCONTINUED
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= 4.5 to 5.5 V V
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= 4.5 to 5.5 V V
CC
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CC
= 2.7 to 4.5 V V
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= 2.7 to 4.5 V V
CC
= 2.7 to 4.5 V V
CC
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CC
= 2.7 to 4.5 V V
CC
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Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
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Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
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5.0
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5.0

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
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0.1 1.0
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0.1 1.0
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0.1 1.0
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0.1 1.0
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
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
0.4
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0.4
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
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
0.3
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0.3
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2-WIRE CMOS SERIAL E2PROM
Rev.4.2_00 S-24CS64A
Seiko Instruments Inc. 7
AC Electrical Characteristics
Table 10 Measurement Conditions
Input pulse voltage 0.1×VCC to 0.9×VCC
Input pulse rising / falling time 20 ns
Output judgement voltage 0.5×VCC
Output load 100 pF+ Pull-up resistor 1.0 k
VCC
R=1.0 k
SDA
C=100 pF
Figure 5 Output Load Circuit
Table 11
VCC = 4.5 to 5.5 V VCC = 2.7 to 4.5 V VCC = 1.8 to 2.7 V
Item Symbol Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit
SCL clock frequency fSCL 0 400 0 400 0 100 kHz
SCL clock time “L” tLOW 1.0 1.0 4.7 µs
SCL clock time “H” tHIGH 0.9 0.9 4.0 µs
SDA output delay time tAA 0.1 0.9 0.1 0.9 0.1 3.5 µs
SDA output hold time tDH 50 50 100 ns
Start condition setup time tSU.STA 0.6 0.6 4.7 µs
Start condition hold time tHD.STA 0.6 0.6 4.0 µs
Data input setup time tSU.DAT 100 100 200 ns
Data input hold time tHD.DAT 0 0 0 ns
Stop condition setup time tSU.STO 0.6 0.6 4.0 µs
SCL, SDA rising time tR 0.3 0.3 1.0 µs
SCL, SDA falling time tF 0.3 0.3 0.3 µs
Bus release time tBUF 1.3 1.3 4.7 µs
Noise suppression time tI 50 100 100 ns
SCL
SDA IN
SDA OUT
tBUF
tR
tSU.STO
tSU.DAT
tHD.DAT
tDH tAA
tHIGH tLOW
tHD.STA tSU.STA
tF
Figure 6 Bus Timing
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DISCONTINUED
1.3
DISCONTINUED
1.3
DISCONTINUED
DISCONTINUED
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DISCONTINUED
DISCONTINUED
SU.STA
DISCONTINUED
SU.STA
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
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Figure 5 Output Load Circuit
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Figure 5 Output Load Circuit
= 2.7 to 4.5 V V
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= 2.7 to 4.5 V V
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Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
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Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
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1.0
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1.0
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0.9
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0.9
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0.9 0.1
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0.9 0.1
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50
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50
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0.6
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0.6
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2-WIRE CMOS SERIAL E2PROM
S-24CS64A Rev.4.2_00
Seiko Instruments Inc.
8
Table 12
VCC = 2.7 to 5.5 V
Item Symbol Min. Typ. Max. Unit
Write time tWR 6.0 10.0 ms
SCL
SDA D0
Write data
A
cknowledge
Stop Condition Start Condition
t
WR
Figure 7 Write Cycle Timing
DISCONTINUED
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Start Condition
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Start Condition
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Figure 7 Write Cycle Timing
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Figure 7 Write Cycle Timing
2-WIRE CMOS SERIAL E2PROM
Rev.4.2_00 S-24CS64A
Seiko Instruments Inc. 9
Pin Functions
1. A0, A1 and A2 (Slave Address Input) Pins
The slave address is assigned by connecting pins A0, A1 and A2 to the GND or to the VCC respectively.
One of the eight different slave address can be assigned by the combination of pins A0, A1 and A2.
The given slave address, which is compared with the slave address transmitted from the master device, is
used to select the one among the multiple devices connected to the bus. The address input pin should be
connected to the GND or to the VCC.
2. SDA (Serial Data Input / Output) Pin
The SDA pin is used for bi-directional transmission of serial data. It consists of a signal input pin and an
Nch open-drain output pin.
The SDA line is usually pulled up to the VCC, and OR-wired with other open-drain or open-collector output
devices.
3. SCL (Serial Clock Input) Pin
The SCL pin is used for serial clock input. Since signals are processed at the rising or falling edge of the
SCL clock input signal, attention should be paid to the rising time and falling time to conform to the
specifications.
4. WP (Write Protection Input) Pin
The write protection is enabled by connecting the WP pin to the VCC. When there is no need for write
protection, connect the pin to the GND.
DISCONTINUED
gnals are processed at the rising or falling edge of the
DISCONTINUED
gnals are processed at the rising or falling edge of the
SCL clock input signal, attention should be paid to t
DISCONTINUED
SCL clock input signal, attention should be paid to t
he rising time and falling time to conform to the
DISCONTINUED
he rising time and falling time to conform to the
connecting the WP pin to the V
DISCONTINUED
connecting the WP pin to the V
protection, connect the pin to the GND.
DISCONTINUED
protection, connect the pin to the GND.
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connected to the bus. The address input pin should be
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connected to the bus. The address input pin should be
rial data. It consists of a signal input pin and an
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rial data. It consists of a signal input pin and an
, and OR-wired with other open-drain or open-collector output
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, and OR-wired with other open-drain or open-collector output
gnals are processed at the rising or falling edge of the
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gnals are processed at the rising or falling edge of the
2-WIRE CMOS SERIAL E2PROM
S-24CS64A Rev.4.2_00
Seiko Instruments Inc.
10
Operation
1. Start Condition
Start is identified by a high to low transition of the SDA line while the SCL line is stable at high.
Every operation begins from a start condition.
2. Stop Condition
Stop is identified by a low to high transition of the SDA line while the SCL line is stable at high.
When a device receives a stop condition during a read sequence, the read operation is interrupted, and
the device enters standby mode.
When a device receives a stop condition during a write sequence, the reception of the write data is halted,
and the E2PROM initiates a write cycle.
tSU.STA tHD.STA tSU.STO
Start Condition Stop Condition
SCL
SDA
Figure 8 Start / Stop Conditions
DISCONTINUED
DISCONTINUED
DISCONTINUED
Figure 8 Start / Stop Conditions
DISCONTINUED
Figure 8 Start / Stop Conditions
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Stop is identified by a low to high transition of the SDA line while the SCL line is stable at high.
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Stop is identified by a low to high transition of the SDA line while the SCL line is stable at high.
ead sequence, the read operation is interrupted, and
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ead sequence, the read operation is interrupted, and
equence, the reception of t
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equence, the reception of t
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2-WIRE CMOS SERIAL E2PROM
Rev.4.2_00 S-24CS64A
Seiko Instruments Inc. 11
3. Data Transmission
Changing the SDA line while the SCL line is low, data is transmitted.
Changing the SDA line while the SCL line is high, a start or stop condition is recognized.
tSU.DAT t
HD.DAT
SCL
SDA
Figure 9 Data Transmission Timing
4. Acknowledge
The unit of data transmission is 8 bits. During the 9th clock cycle period the receiver on the bus pulls down
the SDA line to acknowledge the receipt of the 8-bit data.
When a internal write cycle is in progress, the device does not generate an acknowledge.
1 8 9
Acknowledge
Output
tAA tDH
Start Condition
SCL
(E2PROM Input)
SDA
(Master Output)
SDA
(E2PROM Output)
Figure 10 Acknowledge Output Timing
DISCONTINUED
The unit of data transmission is 8 bits. During the 9th
DISCONTINUED
The unit of data transmission is 8 bits. During the 9th
clock cycle period the receiver on the bus pulls down
DISCONTINUED
clock cycle period the receiver on the bus pulls down
the SDA line to acknowledge the receipt of the 8-bit data.
DISCONTINUED
the SDA line to acknowledge the receipt of the 8-bit data.
When a internal write cycle is in progress, the device does not generate an acknowledge.
DISCONTINUED
When a internal write cycle is in progress, the device does not generate an acknowledge.
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
1
DISCONTINUED
1
DISCONTINUED
Start Condition
DISCONTINUED
Start Condition
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Figure 9 Data Transmission Timing
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Figure 9 Data Transmission Timing
2-WIRE CMOS SERIAL E2PROM
S-24CS64A Rev.4.2_00
Seiko Instruments Inc.
12
5. Device Addressing
To start communication, the master device on the system generates a start condition to the bus line. Next,
the master device sends 7-bit device address and a 1-bit read / write instruction code on to the SDA bus.
The 4 most significant bits of the device address are called the “Device Code”, and are fixed to “1010”.
Successive 3 bits are called the “Slave Address”. These 3 bits are used to identify a device on the system
bus and are compared with the predetermined value which is defined by the address input pins (A0, A1
and A2). When the comparison result matches, the slave device responds with an acknowledge during the
9th clock cycle.
Slave Address
1 0 1 0 A2 A1 A0 R / W
Device Code
LSB MSB
Figure 11 Device Address
6. Write
6.1 Byte Write
When the master sends a 7-bit device address and a 1-bit read / write instruction code set to “0”, following
a start condition, the E2PROM acknowledges it. The E2PROM then receives the upper 8 bits of the word
address and responds with an acknowledge. And the E2PROM receives the lower 8 bits of the word
address and responds with an acknowledge. After the E2PROM receives 8-bit write data and responds
with an acknowledge, it receives a stop condition and that initiates the write cycle at the addressed
memory.
During the write cycle all operations are forbidden and no acknowledge is generated.
A2 A1 A0
S
T
A
R
T
1 0 1 0
W
R
I
T
E
DEVICE
ADDRESS UPPER WORD ADDRESS
R
/
W
M
S
B
SDA LINE
ADR INC
(
ADDRESS INCREMENT
)
A
C
K
L
S
B
LOWER WORD ADDRESS
A
C
K
A
C
K
0
S
T
O
P
DATA
X X X W7 W6 W5 W4 W3 W2 W1 W0 D7 D6 D5 D4 D3 D2 D1 D0
A
C
K
A
C
K
W12W11W10 W9 W8
Figure 12 Byte Write
DISCONTINUED
When the master sends a 7-bit device address and a 1-bit read / write instruction code set to “0”, following
DISCONTINUED
When the master sends a 7-bit device address and a 1-bit read / write instruction code set to “0”, following
PROM acknowledges it. The E
DISCONTINUED
PROM acknowledges it. The E
address and responds with an acknowledge. And the E
DISCONTINUED
address and responds with an acknowledge. And the E
address and responds with an acknowledge. After the E
DISCONTINUED
address and responds with an acknowledge. After the E
with an acknowledge, it receives a stop condition and
DISCONTINUED
with an acknowledge, it receives a stop condition and
During the write cycle all operations ar
DISCONTINUED
During the write cycle all operations ar
DISCONTINUED
A2
DISCONTINUED
A2
DISCONTINUED
A1
DISCONTINUED
A1
DISCONTINUED
DISCONTINUED
DISCONTINUED
0
DISCONTINUED
0
DISCONTINUED
W
DISCONTINUED
W
R
DISCONTINUED
R
I
DISCONTINUED
I
T
DISCONTINUED
T
DISCONTINUED
DEVICE
DISCONTINUED
DEVICE
ADDRESS
DISCONTINUED
ADDRESS
DISCONTINUED
PRODUCT
h is defined by the addre
PRODUCT
h is defined by the addre
ave device responds with an acknowledge during the
PRODUCT
ave device responds with an acknowledge during the
PRODUCT
PRODUCT
PRODUCT
PRODUCT
A0
PRODUCT
A0
PRODUCT
PRODUCT
R / W
PRODUCT
R / W
PRODUCT
PRODUCT
Figure 11 Device Address
PRODUCT
Figure 11 Device Address
2-WIRE CMOS SERIAL E2PROM
Rev.4.2_00 S-24CS64A
Seiko Instruments Inc. 13
6.2 Page Write
The page write mode allows up to 32 bytes to be written in a single wire operation in the S-24CS64A.
Basic data transmission procedure is the same as that in the “Byte Write”. However, when the E2PROM
receives 8-bit write data which corresponds to the page size, the page can be written.
When the E2PROM receives a 7-bit device address and a 1-bit read / write instruction code set to “0”,
following a start condition, it generates an acknowledge. Then the E2PROM receives the upper 8 bits of
the word address and responds with an acknowledge. And the E2PROM receives the lower 8 bits of the
word address and responds with an acknowledge. After the E2PROM receives 8-bit write data and
responds with an acknowledge, it receives 8-bit write data corresponding to the next word address, and
generates an acknowledge. The E2PROM repeats reception of 8-bit write data and generation of
acknowledge in succession. The E2PROM can receive as many write data as the maximum page size.
Receiving a stop condition initiates a write cycle of the area starting from the designated memory address
and having the page size equal to the received write data.
S
T
A
R
T
1 0 1 0
W
R
I
T
E
S
T
O
P
DEVICE
ADDRESS
LOWER WORD ADDRESS (n) UPPER WORD ADDRESS (n)
R
/
W
M
S
B
SDA
LINE A2 A1 A0
A
C
K
L
S
B
A
C
K
A
C
K
0X X X W12 D7 D0
ADR INC
A
C
K
ADR INC
A
C
K
DATA (n) DATA (n+x)
W11 W10W9 W7 W5 W4 W3 W2 W1 W0W6W8 D7 D0
Figure 13 Page Write
The lower 5 bits of the word address are automatically incremented every time when the E2PROM
receives 8-bit write data. If the size of the write data exceeds 32 bytes, the upper 8 bits of the word
address remain unchanged, and the lower 5 bits are rolled over and previously received data will be
overwritten.
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
W5
DISCONTINUED
W5
DISCONTINUED
W4
DISCONTINUED
W4
DISCONTINUED
W3
DISCONTINUED
W3
DISCONTINUED
W2
DISCONTINUED
W2
DISCONTINUED
DISCONTINUED
Figure 13 Page Write
DISCONTINUED
Figure 13 Page Write
The lower 5 bits of the word address are aut
DISCONTINUED
The lower 5 bits of the word address are aut
receives 8-bit write data. If the si
DISCONTINUED
receives 8-bit write data. If the si
ze of the write data exceeds 32 byte
DISCONTINUED
ze of the write data exceeds 32 byte
DISCONTINUED
address remain unchanged, and the lower 5 bits are
DISCONTINUED
address remain unchanged, and the lower 5 bits are
PRODUCT
PROM receives the upper 8 bits of
PRODUCT
PROM receives the upper 8 bits of
PROM receives the lower 8 bits of the
PRODUCT
PROM receives the lower 8 bits of the
PROM receives 8-bit write data and
PRODUCT
PROM receives 8-bit write data and
responds with an acknowledge, it receives 8-bit write data corresponding to the next word address, and
PRODUCT
responds with an acknowledge, it receives 8-bit write data corresponding to the next word address, and
PROM repeats reception of 8-
PRODUCT
PROM repeats reception of 8-
bit write data and generation of
PRODUCT
bit write data and generation of
PROM can receive as many write data as the maximum page size.
PRODUCT
PROM can receive as many write data as the maximum page size.
the area starting from the designated memory address
PRODUCT
the area starting from the designated memory address
PRODUCT
LOWER WORD ADDRESS (n)
PRODUCT
LOWER WORD ADDRESS (n)
PRODUCT
PRODUCT
2-WIRE CMOS SERIAL E2PROM
S-24CS64A Rev.4.2_00
Seiko Instruments Inc.
14
6.3 Write Protection
Write protection is available in the S-24CS64A. When the WP pin is connected to the VCC, write operation
to memory area is forbidden at all.
When the WP pin is connected to the GND, the write protection is invalid, and write operation in all
memory area is available.
Fix the level of the WP pin from the rising edge of SCL for loading the last write data (D0) until the end of
the write time (10 ms max.). If the WP pin changes during this time, the address data being written at this
time is not guaranteed.
There is no need for using write protection, the WP pin should be connected to the GND. The write
protection is valid in the operating voltage range.
SDA
WP
SCL
Acknowledge
WP Pin Fixed Period
Stop
Condition
Start
Condition
Write Data
t
WR
D0
Figure 14 WP Pin Fixed Period
6.4 Acknowledge Polling
Acknowledge polling is used to know the completion of the write cycle in the E2PROM.
After the E2PROM receives a stop condition and once starts the write cycle, all operations are forbidden
and no response is made to the signal transmitted by the master device.
Accordingly the master device can recognize the completion of the write cycle in the E2PROM by
detecting a response from the slave device after transmitting the start condition, the device address and
the read / write instruction code to the E2PROM, namely to the slave devices.
That is, if the E2PROM does not generate an acknowledge, the write cycle is in progress and if the
E2PROM generates an acknowledge, the write cycle has been completed.
Keep the level of the WP pin fixed until acknowledge is confirmed.
It is recommended to use the read instruction “1” as the read / write instruction code transmitted by the
master device.
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
WP Pin Fixed Period
DISCONTINUED
WP Pin Fixed Period
Stop
DISCONTINUED
Stop
Condition
DISCONTINUED
Condition
Figure 14 WP Pin Fixed Period
DISCONTINUED
Figure 14 WP Pin Fixed Period
Acknowledge polling is used to know the co
DISCONTINUED
Acknowledge polling is used to know the co
PROM receives a stop condition and once starts
DISCONTINUED
PROM receives a stop condition and once starts
and no response is made to the signal tr
DISCONTINUED
and no response is made to the signal tr
Accordingly the master device can recognize
DISCONTINUED
Accordingly the master device can recognize
detecting a response from the slave device after transmitting the start condition, the device address and
DISCONTINUED
detecting a response from the slave device after transmitting the start condition, the device address and
the read / write instruction code to the E
DISCONTINUED
the read / write instruction code to the E
PRODUCT
L for loading the last write data (D0) until the end of
PRODUCT
L for loading the last write data (D0) until the end of
during this time, the address data being written at this
PRODUCT
during this time, the address data being written at this
pin should be connected to the GND. The write
PRODUCT
pin should be connected to the GND. The write
PRODUCT
PRODUCT
PRODUCT
PRODUCT
t
PRODUCT
t
WR
PRODUCT
WR
2-WIRE CMOS SERIAL E2PROM
Rev.4.2_00 S-24CS64A
Seiko Instruments Inc. 15
7. Read
7.1 Current Address Read
Either in writing or in reading the E2PROM holds the last accessed memory address, internally
incremented by one. The memory address is maintained as long as the power voltage is higher than the
current address hold voltage VAH.
The master device can read the data at the memory address of the current address pointer without
assigning the word address as a result, when it recognizes the position of the address pointer in the
E2PROM. This is called “Current Address Read”.
In the following the address counter in the E2PROM is assumed to be “n”.
When the E2PROM receives a 7-bit device address and a 1-bit read / write instruction code set to “1”
following a start condition, it responds with an acknowledge.
Next an 8-bit data at the address “n” is sent from the E2PROM synchronous to the SCL clock. The
address counter is incremented at the falling edge of the SCL clock for the 8th bit data, and the content of
the address counter becomes n+1.
The master device outputs stop condition not an acknowledge, the reading of E2PROM is ended.
S
T
A
R
T
1 0 1 0
R
E
A
D
S
T
O
P
DEVICE
ADDRESS
R
/
W
M
S
B
SDA LINE A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
A
C
K
L
S
B
ADR INC
1
DATA
NO ACK from
Master Device
Figure 15 Current Address Read
Attention should be paid to the following point on the recognition of the address pointer in the E2PROM.
In the read operation the memory address counter in the E2PROM is automatically incremented at every
falling edge of the SCL clock for the 8th bit of the output data. In the write operation, on the other hand,
the upper 8 bits of the memory address are left unchanged and are not incremented at the falling edge of
the SCL clock for the 8th bit of the received data.
DISCONTINUED
DISCONTINUED
0
DISCONTINUED
0
DISCONTINUED
R
DISCONTINUED
R
E
DISCONTINUED
E
A
DISCONTINUED
A
D
DISCONTINUED
D
DISCONTINUED
ADDRESS
DISCONTINUED
ADDRESS
ADDRESS
DISCONTINUED
ADDRESS
DISCONTINUED
A2
DISCONTINUED
A2
A2
DISCONTINUED
A2
DISCONTINUED
A1
DISCONTINUED
A1
DISCONTINUED
A0
DISCONTINUED
A0
A0
DISCONTINUED
A0
DISCONTINUED
DISCONTINUED
Figure 15 Current Address Read
DISCONTINUED
Figure 15 Current Address Read
Attention should be paid to the following point on
DISCONTINUED
Attention should be paid to the following point on
In the read operation the memory address counter in the E
DISCONTINUED
In the read operation the memory address counter in the E
falling edge of the SCL clock for the 8th bit of the out
DISCONTINUED
falling edge of the SCL clock for the 8th bit of the out
DISCONTINUED
the upper 8 bits of the memory address are left unchanged and are not incremented at the falling edge of
DISCONTINUED
the upper 8 bits of the memory address are left unchanged and are not incremented at the falling edge of
the SCL clock for the 8th bit of the received data.
DISCONTINUED
the SCL clock for the 8th bit of the received data.
PRODUCT
address of the current
PRODUCT
address of the current
address pointer without
PRODUCT
address pointer without
ognizes the position of t
PRODUCT
ognizes the position of t
he address pointer in the
PRODUCT
he address pointer in the
PROM is assumed to be “n”.
PRODUCT
PROM is assumed to be n”.
t read / write instruction code set to “1”
PRODUCT
t read / write instruction code set to “1”
PROM synchronous to the SCL clock. The
PRODUCT
PROM synchronous to the SCL clock. The
SCL clock for the 8th bit
PRODUCT
SCL clock for the 8th bit
not an acknowledge, the reading of E
PRODUCT
not an acknowledge, the reading of E
2-WIRE CMOS SERIAL E2PROM
S-24CS64A Rev.4.2_00
Seiko Instruments Inc.
16
7.2 Random Read
Random read is used to read the data at an arbitrary memory address.
A dummy write is performed to load the memory address into the address counter.
When the E2PROM receives a 7-bit device address and a 1-bit read / write instruction code set to “0”
following a start condition, it responds with an acknowledge. The E2PROM then receives an 8-bit upper
word address and responds with an acknowledge. Next the E2PROM then receives an 8-bit lower word
address and responds with an acknowledge. The memory address is loaded to the address counter in the
E2PROM by these operations. Reception of write data does not follow in a dummy write whereas reception
of write data follows in a byte write and in a page write.
Since the memory address is loaded into the memory address counter by dummy write, the master device
can read the data starting from the arbitrary memory address by transmitting a new start condition and
performing the same operation in the current address read.
That is, when the E2PROM receives a 7-bit device address and a 1-bit read / write instruction code set to
“1”, following a start condition signal, it responds with an acknowledge. Next, 8-bit data is transmitted
from the E2PROM in synchronous to the SCL clock. The master device outputs stop condition not an
acknowledge, the reading of E2PROM is ended.
SDA
LINE
S
T
A
R
T
1 0 1 0
W
R
I
T
E
DEVICE
ADDRESS LOWER WORD ADDRESS
R
/
W
M
S
B
A2 A1 A0
A
C
K
L
S
B
W7 W6 W5 W4 W3 W2 W1
A
C
K
0
DUMMY WRITE
S
T
O
P
S
T
A
R
T
1 0 1 0
R
E
A
D
DEVICE
ADDRESS
R
/
W
M
S
B
A2 A1 A0
A
C
K
L
S
B
1
NO ACK from
Master Device
ADR INC
DATA
UPPER WORD ADDRESS
X W9 W8 X X X D7 D6 D5 D4 D3 D2 D1 D0
A
C
K
W12 W11 W10 W0
Figure 16 Random Read
DISCONTINUED
DISCONTINUED
LOWER WORD ADDRESS
DISCONTINUED
LOWER WORD ADDRESS
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
W6
DISCONTINUED
W6
DISCONTINUED
W5
DISCONTINUED
W5
DISCONTINUED
W4
DISCONTINUED
W4
DISCONTINUED
DISCONTINUED
W3
DISCONTINUED
W3
DISCONTINUED
DISCONTINUED
DISCONTINUED
C
DISCONTINUED
C
K
DISCONTINUED
K
Figure 16 Random Read
DISCONTINUED
Figure 16 Random Read
PRODUCT
PROM then receives an 8-bit lower word
PRODUCT
PROM then receives an 8-bit lower word
address is loaded to the address counter in the
PRODUCT
address is loaded to the address counter in the
a dummy write whereas reception
PRODUCT
a dummy write whereas reception
address counter by dummy wr
PRODUCT
address counter by dummy wr
ry address by transmitting a new start condition and
PRODUCT
ry address by transmitting a new start condition and
PROM receives a 7-bit device address and a 1-
PRODUCT
PROM receives a 7-bit device address and a 1-
bit read / write instruction code set to
PRODUCT
bit read / write instruction code set to
th an acknowledge. Next, 8-bit data is transmitted
PRODUCT
th an acknowledge. Next, 8-bit data is transmitted
he master device outputs stop condition not an
PRODUCT
he master device outputs stop condition not an
2-WIRE CMOS SERIAL E2PROM
Rev.4.2_00 S-24CS64A
Seiko Instruments Inc. 17
7.3 Sequential Read
When the E2PROM receives a 7-bit device address and a 1-bit read / write instruction code set to “1”
following a start condition both in current and random read operations, it responds with an acknowledge.
An 8-bit data is then sent from the E2PROM synchronous to the SCL clock and the address counter is
automatically incremented at the falling edge of the SCL clock for the 8th bit data.
When the master device responds with an acknowledge, the data at the next memory address is
transmitted. Response with an acknowledge by the master device has the memory address counter in the
E2PROM incremented and makes it possible to read data in succession. This is called “Sequential Read”.
The master device outputs stop condition not an acknowledge, the reading of E2PROM is ended.
Data can be read in succession in the sequential read mode. When the memory address counter reaches
the last word address, it rolls over to the first memory address.
R
E
A
D
S
T
O
P
DEVICE
ADDRESS
R
/
W
ADR INC
A
C
K
A
C
K
A
C
K
1
ADR INC
A
C
K
ADR INC
SDA
LINE
DATA(n)
D7 D0 D7 D0D7 D0 D7 D0
DATA (n+1) DATA (n+2) DATA (n+x)
NO ACK from
Master Device
ADR INC
Figure 17 Sequential Read
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DATA (n+1)
DISCONTINUED
DATA (n+1)
DATA (n+1)
DISCONTINUED
DATA (n+1)
DISCONTINUED
Figure 17 Sequential Read
DISCONTINUED
Figure 17 Sequential Read
PRODUCT
edge, the data at the next memory address is
PRODUCT
edge, the data at the next memory address is
er device has the memory address counter in the
PRODUCT
er device has the memory address counter in the
PROM incremented and makes it possible to read data in succession. This is called Sequential Read.
PRODUCT
PROM incremented and makes it possible to read data in succession. This is called Sequential Read.
not an acknowledge, the reading of E
PRODUCT
not an acknowledge, the reading of E
2
PRODUCT
2
PROM is ended.
PRODUCT
PROM is ended.
ead mode. When the memory address counter reaches
PRODUCT
ead mode. When the memory address counter reaches
PRODUCT
PRODUCT
C
PRODUCT
C
K
PRODUCT
K
K
PRODUCT
K
PRODUCT
PRODUCT
D0
PRODUCT
D0
PRODUCT
D7
PRODUCT
D7
PRODUCT
PRODUCT
2-WIRE CMOS SERIAL E2PROM
S-24CS64A Rev.4.2_00
Seiko Instruments Inc.
18
8. Address Increment Timing
The timing for the automatic address increment is the falling edge of the SCL clock for the 8th bit of the
read data in read operation and the the falling edge of the SCL clock for the 8th bit of the received data in
write operation.
SCL
SDA R / W=1
A
ddress Increment
891 89
D7 Output D0 Output
A
CK Output
Figure 18 Address Increment Timing in Reading
SCL
SDA R / W=0
891 89
D7 Input D0 Input
A
CK Output
A
CK Output
A
ddress Increment
Figure 19 Address Increment Timing in Writing
Write Inhibition Function at Low Power Voltage
The S-24CS64A have a detection circuit for low power voltage. The detection circuit cancels a write
instruction when the power voltage is low or the power switch is on. The detection voltage is 1.85 V
typically and the release voltage is 1.95 V typically, the hysteresis of approximate 0.1 V thus exists. (See
Figure 20.)
When a low power voltage is detected, a write instruction is canceled at the reception of a stop condition.
When the power voltage lowers during a data transmission or a write operation, the date at the address of
the operation is not assured.
Power supply voltage
Write Instruction
cancel
Release voltage (+VDET)
1.95 V typ.
Detection voltage (-VDET)
1.85 V typ.
Hysteresis width
0.1 V approximately
Figure 20 Operation at low power voltage
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
D7 Input
DISCONTINUED
D7 Input
DISCONTINUED
DISCONTINUED
Figure 19 Address Increment Timing in Writing
DISCONTINUED
Figure 19 Address Increment Timing in Writing
Write Inhibition Function at Low Power Voltage
DISCONTINUED
Write Inhibition Function at Low Power Voltage
The S-24CS64A have a detection circuit for low power
DISCONTINUED
The S-24CS64A have a detection circuit for low power
instruction when the power voltage is low or the pow
DISCONTINUED
instruction when the power voltage is low or the pow
typically and the release voltage is 1.95 V typically, the
DISCONTINUED
typically and the release voltage is 1.95 V typically, the
When a low power voltage is detected, a write instruction
DISCONTINUED
When a low power voltage is detected, a write instruction
When the power voltage lowers during a data transmission or
DISCONTINUED
When the power voltage lowers during a data transmission or
the operation is not assured.
DISCONTINUED
the operation is not assured.
PRODUCT
PRODUCT
PRODUCT
A
PRODUCT
A
ddress Increment
PRODUCT
ddress Increment
89
PRODUCT
89
89
PRODUCT
89
89
PRODUCT
89
89
PRODUCT
89
D0 Output
PRODUCT
D0 Output
Figure 18 Address Increment Timing in Reading
PRODUCT
Figure 18 Address Increment Timing in Reading
PRODUCT
2-WIRE CMOS SERIAL E2PROM
Rev.4.2_00 S-24CS64A
Seiko Instruments Inc. 19
Using S-24CS64A
1. Adding a pull-up resistor to SDA I/O pin and SCL input pin
Add a 1 to 5 k pull-up resistor to the SCL input pin*1 and the SDA I/O pin in order to enable the functions
of the I2C-bus protocol. Normal communication cannot be provided without a pull-up resistor.
*1. When the SCL input pin of the E2PROM is connected to a tri-state output pin of the microprocessor,
connect the same pull-up resistor to prevent a high impedance status from being input to the SCL
input pin.
This protects the E2PROM from malfunction due to an undefined output (high impedance) from the tri-
state pin when the microprocessor is reset when the voltage drops.
2. I/O pin equivalent circuit
The I/O pins of this IC do not include pull-up and pull-down resistors. The SDA pin is an open-drain output.
The following shows the equivalent circuits.
SCL
Figure 21 SCL Pin
SDA
Figure 22 SDA Pin
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
SDA
DISCONTINUED
SDA
DISCONTINUED
PRODUCT
PROM is connected to a tri-state output pin of the microprocessor,
PRODUCT
PROM is connected to a tri-state output pin of the microprocessor,
high impedance status from being input to the SCL
PRODUCT
high impedance status from being input to the SCL
PROM from malfunction due to an undefined output (high impedance) from the tri-
PRODUCT
PROM from malfunction due to an undefined output (high impedance) from the tri-
The I/O pins of this IC do not include pull-up and pull-down resistors. The SDA pin is an open-drain output.
PRODUCT
The I/O pins of this IC do not include pull-up and pull-down resistors. The SDA pin is an open-drain output.
PRODUCT
2-WIRE CMOS SERIAL E2PROM
S-24CS64A Rev.4.2_00
Seiko Instruments Inc.
20
WP
Figure 23 WP Pin
A0, A1, A2
Figure 24 A0, A1, A2 Pin
DISCONTINUED
Figure 24 A0, A1, A2 Pin
DISCONTINUED
Figure 24 A0, A1, A2 Pin
PRODUCT
PRODUCT
PRODUCT
2-WIRE CMOS SERIAL E2PROM
Rev.4.2_00 S-24CS64A
Seiko Instruments Inc. 21
3. Matching phases while E2PROM is accessed
The S-24CS64A does not have a pin for resetting (the internal circuit), therefore, the E2PROM cannot be
forcibly reset externally. If a communication interruption occurs in the E2PROM, it must be reset by
software.
For example, even if a reset signal is input to the microprocessor, the internal circuit of the E2PROM is not
reset as long as the stop condition is not input to the E2PROM. In other words, the E2PROM retains the
same status and cannot shift to the next operation. This symptom applies to the case when only the
microprocessor is reset when the power supply voltage drops. With this status, if the power supply voltage
is restored, reset the E2PROM (after matching the phase with the microprocessor) and input an instruction.
The following shows this reset method.
[How to reset E2PROM]
The E2PROM can be reset by the start and stop instructions. When the E2PROM is reading data “0” or
is outputting the acknowledge signal, 0 is output to the SDA line. In this status, the microprocessor
cannot output an instruction to the SDA line. In this case, terminate the acknowledge output operation
or read operation, and then input a start instruction. Figure 25 shows this procedure.
First, input the condition. Then transmit 9 clocks (dummy clocks) of SCL. During this time, the
microprocessor sets the SDA line to high level. By this operation, the E2PROM interrupts the
acknowledge output operation or data output, so input the start condition*1. When a start condition is
input, the E2PROM is reset. To make doubly sure, input the stop condition to the E2PROM. Normal
operation is then possible.
9821
SCL
SDA
Start
condition
Stop
condition
Start
condition
Dummy clock
Figure 25 Resetting E2PROM
*1. After 9 clocks (dummy clocks), if the SCL clock continues to be output without a start condition
being input, a write operation may be started upon receipt of a stop condition. To prevent this, input
a start condition after 9 clocks (dummy clocks).
Remark It is recommended to perform the above reset using dummy clocks when the system is
initialized after the power supply voltage has been raised.
DISCONTINUED
First, input the condition. Then transmit 9 clocks (
DISCONTINUED
First, input the condition. Then transmit 9 clocks (
microprocessor sets the SDA line to high level. By this operation, the E
DISCONTINUED
microprocessor sets the SDA line to high level. By this operation, the E
acknowledge output operation or data output, so input the start condition
DISCONTINUED
acknowledge output operation or data output, so input the start condition
PROM is reset. To make doubly sure, input the stop condition to the E
DISCONTINUED
PROM is reset. To make doubly sure, input the stop condition to the E
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
1
DISCONTINUED
1
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
Dummy clock
DISCONTINUED
Dummy clock
DISCONTINUED
PRODUCT
PROM. In other words, the E
PRODUCT
PROM. In other words, the E
This symptom applies to the case when only the
PRODUCT
This symptom applies to the case when only the
ops. With this status, if the power supply voltage
PRODUCT
ops. With this status, if the power supply voltage
PROM (after matching the phase with the microprocessor) and input an instruction.
PRODUCT
PROM (after matching the phase with the microprocessor) and input an instruction.
PROM can be reset by the start and stop instructions. When the E
PRODUCT
PROM can be reset by the start and stop instructions. When the E
he SDA line. In this status, the microprocessor
PRODUCT
he SDA line. In this status, the microprocessor
this case, terminate the acknowledge output operation
PRODUCT
this case, terminate the acknowledge output operation
Figure 25
PRODUCT
Figure 25
dummy clocks) of SCL. During this time, the
PRODUCT
dummy clocks) of SCL. During this time, the
2-WIRE CMOS SERIAL E2PROM
S-24CS64A Rev.4.2_00
Seiko Instruments Inc.
22
4. Acknowledge check
The I2C-bus protocol includes an acknowledge check function as a handshake function to prevent a
communication error. This function allows detection of a communication failure during data communication
between the microprocessor and E2PROM. This function is effective to prevent malfunction, so it is
recommended to perform an acknowledge check on the microprocessor side.
5. Built-in power-on-clear circuit
E2PROMs have a built-in power-on-clear circuit that initializes the E2PROM. Unsuccessful initialization
may cause a malfunction. For the power-on-clear circuit to operate normally, the following conditions must
be satisfied for raising the power supply voltage.
5.1 Raising power supply voltage
Raise the power supply voltage, starting at 0.2 V maximum, so that the voltage reaches the power supply
voltage to be used within the time defined by tRISE as shown in Figure 26.
For example, when the power supply voltage to be used is 5.0 V, tRISE is 200 ms as shown in Figure 27.
The power supply voltage must be raised within 200 ms.
0.2 V V
INIT
(Max.)
t
INIT
*2
(Max.)
t
RISE
(Max.)
Power supply voltage (V
CC
)
0 V
*1
*1. 0 V means there is no difference in potential between the VCC pin and
the GND pin of the E
2
PROM.
*2. t
INIT
is the time required to initialize the E
2
PROM. No instructions are
accepted during this time.
Figure 26 Raising Power Supply Voltage
DISCONTINUED
The power supply voltage must be raised within 200 ms.
DISCONTINUED
The power supply voltage must be raised within 200 ms.
DISCONTINUED
0.2 V
DISCONTINUED
0.2 V
DISCONTINUED
DISCONTINUED
DISCONTINUED
RISE
DISCONTINUED
RISE
(Max.)
DISCONTINUED
(Max.)
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
0 V means there is no difference in potential between the VCC pin and
DISCONTINUED
0 V means there is no difference in potential between the VCC pin and
DISCONTINUED
the GND pin of the E
DISCONTINUED
the GND pin of the E
PRODUCT
PROM. Unsuccessful initialization
PRODUCT
PROM. Unsuccessful initialization
uit to operate normally, the following conditions must
PRODUCT
uit to operate normally, the following conditions must
mum, so that the voltage reaches the power supply
PRODUCT
mum, so that the voltage reaches the power supply
as shown in
PRODUCT
as shown in
Figure 26
PRODUCT
Figure 26
For example, when the power supply voltage to be used is 5.0 V, t
PRODUCT
For example, when the power supply voltage to be used is 5.0 V, t
2-WIRE CMOS SERIAL E2PROM
Rev.4.2_00 S-24CS64A
Seiko Instruments Inc. 23
Rise time (tRISE) Max.
[ms]
Power supply voltage
(VCC)
[V]
50
5.0
4.0
3.0
2.0
100 150 200
For example:
If your E2PROM supply voltage = 5.0 V, raise the power supply
voltage to 5.0 V within 200 ms.
Figure 27 Raising Time of Power Supply Voltage
When initialization is successfully completed via the power-on-clear circuit, the E2PROM enters the
standby status.
If the power-on-clear circuit does not operate, the following are the possible causes.
(1) Because the E2PROM has not been initialized, an instruction formerly input is valid or an instruction
may be inappropriately recognized. In this case, writing may be performed.
(2) The voltage may have dropped due to power off while the E2PROM is being accessed. Even if the
microprocessor is reset due to the low power voltage, the E2PROM may malfunction unless the
power-on-clear operation conditions of E2PROM are satisfied. For the power-on-clear operation
conditions of E2PROM, refer to 5.1 Raising power supply voltage.
If the power-on-clear circuit does not operate, match the phase (reset) so that the internal E2PROM circuit
is normally reset. The statuses of the E2PROM immediately after the power-on-clear circuit operates and
when phase is matched (reset) are the same.
DISCONTINUED
PROM supply voltage = 5.0 V, raise the power supply
DISCONTINUED
PROM supply voltage = 5.0 V, raise the power supply
voltage to 5.0 V within 200 ms.
DISCONTINUED
voltage to 5.0 V within 200 ms.
Figure 27 Raising Time of Power Supply Voltage
DISCONTINUED
Figure 27 Raising Time of Power Supply Voltage
When initialization is successfully comple
DISCONTINUED
When initialization is successfully comple
ted via the power-on-clear circuit, the E
DISCONTINUED
ted via the power-on-clear circuit, the E
If the power-on-clear circuit does not operate, the following are the possible causes.
DISCONTINUED
If the power-on-clear circuit does not operate, the following are the possible causes.
PROM has not been initialized, an instruction fo
DISCONTINUED
PROM has not been initialized, an instruction fo
may be inappropriately recognized. In
DISCONTINUED
may be inappropriately recognized. In
(2) The voltage may have dropped due to power off while the E
DISCONTINUED
(2) The voltage may have dropped due to power off while the E
microprocessor is reset due to the low power voltage, the E
DISCONTINUED
microprocessor is reset due to the low power voltage, the E
power-on-clear operation conditions of E
DISCONTINUED
power-on-clear operation conditions of E
conditions of E
DISCONTINUED
conditions of E
2
DISCONTINUED
2
PROM, refer to
DISCONTINUED
PROM, refer to
If the power-on-clear circuit does not operate, match the phase (reset) so that the internal E
DISCONTINUED
If the power-on-clear circuit does not operate, match the phase (reset) so that the internal E
PRODUCT
PRODUCT
Rise time (t
PRODUCT
Rise time (t
RISE
PRODUCT
RISE
[ms]
PRODUCT
[ms]
PRODUCT
PRODUCT
PRODUCT
100 150 200
PRODUCT
100 150 200
2-WIRE CMOS SERIAL E2PROM
S-24CS64A Rev.4.2_00
Seiko Instruments Inc.
24
5.2 Wait for the initialization sequence to end
The E2PROM executes initialization during the time that the supply voltage is increasing to its normal
value. All instructions must wait until after initialization. The relationship between the initialization time
(tINIT) and rise time (tRISE) is shown in Figure 28.
Rise time (tRISE)
[s]
E2PROM initialization
time (tINIT) Max.
[s]
100 m
10 m
1.0 m
100 µ
10 µ
1.0 µ
1.0
µ
10
µ
100
µ
1.0 m 10 m 100 m
Figure 28 Initialization Time of E2PROM
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
µ
DISCONTINUED
µ
10
DISCONTINUED
10
µ
DISCONTINUED
µ
100
DISCONTINUED
100
DISCONTINUED
Figure 28 Initialization Time of E
DISCONTINUED
Figure 28 Initialization Time of E
PRODUCT
PRODUCT
PRODUCT
PRODUCT
PRODUCT
PRODUCT
2-WIRE CMOS SERIAL E2PROM
Rev.4.2_00 S-24CS64A
Seiko Instruments Inc. 25
6. Data hold time (tHD. DAT = 0 ns)
If SCL and SDA of the E2PROM are changed at the same time, it is necessary to prevent the start / stop
condition from being mistakenly recognized due to the effect of noise. If a start / stop condition is
mistakenly recognized during communication, the E2PROM enters the standby status.
It is recommended that SDA is delayed from the falling edge of SCL by 0.3 µs minimum in the S-24CS64A.
This is to prevent time lag caused by the load of the bus line from generating the stop (or start) condition.
SCL
SDA
t
HD. DAT
= 0.3 µs Min.
Figure 29 E2PROM Data Hold Time
7. SDA pin and SCL pin noise suppression time
The S-24CS64A includes a built-in low-pass filter to suppress noise at the SDA and SCL pins. This means
that if the power supply voltage is 5.0 V, noise with a pulse width of 160 ns or less can be suppressed.
The guaranteed for details, refer to noise suppression time (tI) in Table 11.
Noise suppression time (tI) Max.
[ns]
200
100
300
2 3 4 5
Power supply voltage (VCC)
[V]
Figure 30 Noise Suppression Time for SDA and SCL Pins
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
Figure 29 E
DISCONTINUED
Figure 29 E
2
DISCONTINUED
2
PROM Data Hold Time
DISCONTINUED
PROM Data Hold Time
7. SDA pin and SCL pin noise suppression time
DISCONTINUED
7. SDA pin and SCL pin noise suppression time
DISCONTINUED
The S-24CS64A includes a built-in low-pass filter to
DISCONTINUED
The S-24CS64A includes a built-in low-pass filter to
that if the power supply voltage is 5.0 V, noise with
DISCONTINUED
that if the power supply voltage is 5.0 V, noise with
The guaranteed for details, refer to noise suppression time (t
DISCONTINUED
The guaranteed for details, refer to noise suppression time (t
Noise suppression time (t
DISCONTINUED
Noise suppression time (t
PRODUCT
he bus line from generating the stop (or start) condition.
PRODUCT
he bus line from generating the stop (or start) condition.
PRODUCT
PRODUCT
PRODUCT
PRODUCT
PRODUCT
2-WIRE CMOS SERIAL E2PROM
S-24CS64A Rev.4.2_00
Seiko Instruments Inc.
26
8. Trap: E2PROM operation in case that the stop condition is received during write operation before
receiving the defined data value (less than 8-bit) to SCL pin
When the E2PROM receives the stop condition signal compulsorily, during receiving 1 byte of write data,
“write” operation is aborted.
When the E2PROM receives the stop condition signal after receiving 1 byte or more of data for “page
write”, 8-bit of data received normally before receiving the stop condition signal can be written.
9. Trap: E2PROM operation and write data in case that write data is input more than defined page size at
“page write”
When write data is input more than defined page size at page write operation, for example, S-24CS64A
(which can be executed 32-byte page write) is received data more than 33 byte, 8-bit data of the 33rd byte
is over written to the first byte in the same page. Data over the capacity of page address cannot be written.
10. Trap: Severe environments
Absolute maximum ratings: Do not operate these ICs in excess of the absolute max ratings, as listed on
the data sheet. Exceeding the supply voltage rating can cause latch-up.
Operations with moisture on the E2PROM pins may occur malfunction by short-circuit between pins.
Especially, in occasions like picking the E2PROM up from low temperature tank during the evaluation. Be
sure that not remain frost on E2PROM pin to prevent malfunction by short-circuit.
Also attention should be paid in using on environment, which is easy to dew for the same reason.
DISCONTINUED
y voltage rating can cause latch-up.
DISCONTINUED
y voltage rating can cause latch-up.
PROM pins may occur malfunction
DISCONTINUED
PROM pins may occur malfunction
DISCONTINUED
PROM up from low temperature tank during the evaluation. Be
DISCONTINUED
PROM up from low temperature tank during the evaluation. Be
PROM pin to prevent malf
DISCONTINUED
PROM pin to prevent malf
DISCONTINUED
Also attention should be paid in using on environmen
DISCONTINUED
Also attention should be paid in using on environmen
PRODUCT
ceiving the stop condition signal can be written.
PRODUCT
ceiving the stop condition signal can be written.
PROM operation and write data in case that write data is input more than defined page size at
PRODUCT
PROM operation and write data in case that write data is input more than defined page size at
at page write operation, fo
PRODUCT
at page write operation, fo
data more than 33 byte, 8-bit data of the 33rd byte
PRODUCT
data more than 33 byte, 8-bit data of the 33rd byte
Data over the capacity of page address cannot be written.
PRODUCT
Data over the capacity of page address cannot be written.
in excess of the absolute max ratings, as listed on
PRODUCT
in excess of the absolute max ratings, as listed on
y voltage rating can cause latch-up.
PRODUCT
y voltage rating can cause latch-up.
2-WIRE CMOS SERIAL E2PROM
Rev.4.2_00 S-24CS64A
Seiko Instruments Inc. 27
Precautions
Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in
electrostatic protection circuit.
SII claims no responsibility for any and all disputes arising out of or in connection with any infringement of
the products including this IC upon patents owned by a third party.
Precautions for WLP package
The side of device silicon substrate is exposed to the marking side of device package. Since this portion
has lower strength against the mechanical stress than the standard plastic package, chip, crack, etc
should be careful of the handing of a package enough. Moreover, the exposed side of silicon has
electrical potential of device substrate, and needs to be kept out of contact with the external potential.
In this package, the overcoat of the resin of translucence is carried out on the side of device area. Keep it
mind that it may affect the characteristic of a device when exposed a device in the bottom of a high light
source.
DISCONTINUED
PRODUCT
he marking side of device package. Since this portion
PRODUCT
he marking side of device package. Since this portion
has lower strength against the mechanical stress than the standard plastic package, chip, crack, etc
PRODUCT
has lower strength against the mechanical stress than the standard plastic package, chip, crack, etc
Moreover, the exposed side of silicon has
PRODUCT
Moreover, the exposed side of silicon has
ate, and needs to be kept out of cont
PRODUCT
ate, and needs to be kept out of cont
PRODUCT
act with the external potential.
PRODUCT
act with the external potential.
lucence is carried out on the
PRODUCT
lucence is carried out on the
PRODUCT
ice when exposed a device in the bottom of a high light
PRODUCT
ice when exposed a device in the bottom of a high light
2-WIRE CMOS SERIAL E2PROM
S-24CS64A Rev.4.2_00
Seiko Instruments Inc.
28
Characteristics (Typical Data)
1. DC Characteristics
1.1 Current consumption (READ) ICC1 1.2 Current consumption (READ) ICC1
Ambient temperature Ta Ambient temperature Ta
VCC=5.5 V
fSCL=100 kHz
DAT
A
=0101
–40 0 85
300
100
200
0
ICC1
(µA)
Ta (°C)
Ta (°C)
VCC=3.3 V
fSCL=100 kHz
DATA=0101
–40 0 85
300
100
200
0
ICC1
(µA)
1.3 Current consumption (READ) ICC1 1.4 Current consumption (READ) ICC1
Ambient temperature Ta Power supply voltage VCC
VCC=1.8 V
fSCL=100 kHz
DATA=0101
300
100
200
0
ICC1
(µA)
Ta
(
°C
)
–40 0 85
Ta=25°C
fSCL=100 kHz
DATA=0101
2 3 4 5 6 7
VCC (V)
300
100
200
0
ICC1
(µA)
1.5 Current consumption (READ) ICC1 1.6 Current consumption (READ) ICC1
Power supply voltage VCC Clock frequency fSCL
Ta=25°C
fSCL=400 kHz
DATA=0101
2 3 4 5 6 7
VCC (V)
500
200
400
0
ICC1
(µA)
300
100
VCC=5.0 V
Ta=25°C
100k
fSCL (Hz)
400k 1M
ICC1
(µA)
500
200
400
300
100
DISCONTINUED
1.4 Current consumption (READ) I
DISCONTINUED
1.4 Current consumption (READ) I
DISCONTINUED
DISCONTINUED
Power supply voltage V
DISCONTINUED
Power supply voltage V
1.5 Current consumption (READ) I
DISCONTINUED
1.5 Current consumption (READ) I
Power supply voltage V
DISCONTINUED
Power supply voltage V
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
=
DISCONTINUED
=
25
DISCONTINUED
25
°
DISCONTINUED
°
C
DISCONTINUED
C
SCL
DISCONTINUED
SCL
=
DISCONTINUED
=
400 kHz
DISCONTINUED
400 kHz
DATA
DISCONTINUED
DATA
=
DISCONTINUED
=
DATA=DATA
DISCONTINUED
DATA=DATA
0101
DISCONTINUED
0101
PRODUCT
PRODUCT
PRODUCT
100 kHz
PRODUCT
100 kHz
0101
PRODUCT
0101
–40 0 85
PRODUCT
–40 0 85
PRODUCT
PRODUCT
PRODUCT
1.4 Current consumption (READ) I
PRODUCT
1.4 Current consumption (READ) I
2-WIRE CMOS SERIAL E2PROM
Rev.4.2_00 S-24CS64A
Seiko Instruments Inc. 29
1.7 Current consumption (PROGRAM) ICC2 1.8 Current consumption (PROGRAM) ICC2
Ambient temperature Ta Ambient temperature Ta
VCC=5.5 V
Ta (°C)
–40 0 85
1.0
0.5
0
ICC2
(mA)
1.5
VCC=3.3 V
Ta (°C)
–40 0 85
ICC2
(mA) 1.0
0.5
0
1.5
1.9 Current consumption (PROGRAM) ICC2 1.10 Current consumption (PROGRAM) ICC2
Ambient temperature Ta Power supply voltage VCC
VCC=2.7 V
ICC2
(mA)
Ta (°C)
–40 0 85
1.0
0.5
0
1.5
Ta=25°C
VCC (V)
ICC2
(mA)
2
1 3 4 5 6
1.0
0.5
0
1.5
1.11 Standby current consumption ISB 1.12 Input leakage current ILI
Ambient temperature Ta Ambient temperature Ta
2.0
1.0
VCC=5.5 V
0
ISB
(µA)
Ta (°C)
–40 0 85
1.0
0.5
0
ILI
(µA)
Ta
(
°C
)
–40 0 85
VCC=5.5 V
SDA, SCL, WP=0 V
DISCONTINUED
I
DISCONTINUED
I
CC2
DISCONTINUED
CC2
(mA)
DISCONTINUED
(mA)
1.11 Standby current consumption I
DISCONTINUED
1.11 Standby current consumption I
SB
DISCONTINUED
SB
Ambient temperature Ta
DISCONTINUED
Ambient temperature Ta
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
PRODUCT
PRODUCT
PRODUCT
Ta (
PRODUCT
Ta (
°
PRODUCT
°
–40 0
PRODUCT
–40 0
PRODUCT
1.10 Current consumption (PROGRAM) I
PRODUCT
1.10 Current consumption (PROGRAM) I
Power supply voltage V
PRODUCT
Power supply voltage V
PRODUCT
PRODUCT
PRODUCT
Ta
PRODUCT
Ta
2-WIRE CMOS SERIAL E2PROM
S-24CS64A Rev.4.2_00
Seiko Instruments Inc.
30
1.13 Input leakage current ILI 1.14 Output leakage current ILO
Ambient temperature Ta Ambient temperature Ta
1.0
0.5
VCC=5.5 V
0
ILI
(µA)
Ta
(
°C
)
–40 0 85
SDA, SCL, WP
=
5.5 V
1.0
0.5
VCC=5.5 V
SDA=0 V
0
ILO
(µA)
Ta (°C)
–40 0 85
1.15 Output leakage current ILO 1.16 Low level output voltage VOL
Ambient temperature Ta Low level output current IOL
1.0
0.5
VCC=5.5 V
SD
A
=5.5 V
0
ILO
(µA)
Ta (°C)
–40 0 85
0.3
0.2
VOL
(V)
0.1
0 2 1 3 4 5 6
Ta=−40°C
IOL (mA)
VCC=1.8 V
VCC=5.0 V
1.17 Low level output voltage VOL 1.18 Low level output voltage VOL
Low level output current IOL Low level output current IOL
0.3
0.2
VOL
(V)
0.1
0 2 1 3 4 5 6
Ta=25°C
IOL (mA)
VCC=1.8 V
VCC=5.0 V
0.3
0.2
VOL
(V)
0.1
0 2 1 3 4 5 6
Ta=85°C
IOL (mA)
VCC=1.8 V
VCC= 5.0 V
DISCONTINUED
V
DISCONTINUED
V
OL
DISCONTINUED
OL
(V)
DISCONTINUED
(V)
1.17 Low level output voltage V
DISCONTINUED
1.17 Low level output voltage V
OL
DISCONTINUED
OL
Low level output current I
DISCONTINUED
Low level output current I
OL
DISCONTINUED
OL
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
V
DISCONTINUED
V
CC
DISCONTINUED
CC
DISCONTINUED
PRODUCT
PRODUCT
PRODUCT
PRODUCT
PRODUCT
Ta (
PRODUCT
Ta (
°
PRODUCT
°
C)
PRODUCT
C)
0
PRODUCT
0
1.16 Low level output voltage V
PRODUCT
1.16 Low level output voltage V
Low level output current I
PRODUCT
Low level output current I
0.3
PRODUCT
0.3
PRODUCT
PRODUCT
PRODUCT
Ta
PRODUCT
Ta
2-WIRE CMOS SERIAL E2PROM
Rev.4.2_00 S-24CS64A
Seiko Instruments Inc. 31
1.19 High input inversion voltage VIH 1.20 High input inversion voltage VIH
Power supply voltage VCC Ambient temperature Ta
Ta=25°C
SDA, SCL
1.0
0
2.0
3.0
VIH
(V)
VCC (V)
7 6 2 3 4 5 1
VCC=5.0 V
SDA, SCL
1.0
0
2.0
3.0
V
IH
(V)
Ta
(
°C
)
–40 0 85
1.21 Low input inversion voltage VIL 1.22 Low input inversion voltage VIL
Power supply voltage VCC Ambient temperature Ta
1.0
0
2.0
3.0
V
IL
(V)
VCC (V)
7 6 2 3 4 5 1
Ta=25°C
SDA, SCL
1.0
0
2.0
3.0
V
IL
(V)
Ta (°C)
–40 0 85
VCC=5.0 V
SDA, SCL
1.23 Low power supply detection voltage VDET 1.24 Low power supply release voltage +VDET
Ambient temperature Ta Ambient temperature Ta
1.0
0
2.0
VDET
(V)
Ta (°C)
–40 0 85
1.0
0
2.0
+VDET
(V)
Ta (°C)
–40 0 85
DISCONTINUED
3.0
DISCONTINUED
3.0
V
DISCONTINUED
V
1.23 Low power supply detection voltage
DISCONTINUED
1.23 Low power supply detection voltage
Ambient temperature Ta
DISCONTINUED
Ambient temperature Ta
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
PRODUCT
PRODUCT
Ta
PRODUCT
Ta
–40 0
PRODUCT
–40 0
1.22 Low input inversion voltage V
PRODUCT
1.22 Low input inversion voltage V
PRODUCT
PRODUCT
Ambient temperature Ta
PRODUCT
Ambient temperature Ta
Ambient temperature Ta
PRODUCT
Ambient temperature Ta
Ambient temperature Ta
PRODUCT
Ambient temperature Ta
PRODUCT
PRODUCT
V
PRODUCT
V
2-WIRE CMOS SERIAL E2PROM
S-24CS64A Rev.4.2_00
Seiko Instruments Inc.
32
2. AC Characteristics
2.1 Maximum operating frequency fMAX. 2.2 Write time tWR Power supply voltage VCC
Power supply voltage VCC
10k
2 3 4 5
Ta=25°C
VCC (V)
fMAX.
(Hz)
1
100k
1M
VCC (V)
8
4
Ta=25°C
tWR
(ms)
2
6
0 6 2 3 4 5 1
2.3 Write time tWR Ambient temperature Ta 2.4 Write time tWR Ambient temperature Ta
VCC=4.5 V
tWR
(ms)
9
6
3
0
Ta (°C)
–40 0 85
VCC=2.7 V
tWR
(ms)
9
6
3
0
Ta (°C)
–40 0 85
2.5 SDA output delay time tAA 2.6 SDA output delay time tAA
Ambient temperature Ta Ambient temperature Ta
Ta (°C)
–40 0 85
VCC=4.5 V
1.0
0.5
tAA
(µs)
0
Ta (°C)
–40 0 85
VCC=2.7 V
1.0
0.5
tAA
(µs)
0
DISCONTINUED
t
DISCONTINUED
t
2.5 SDA output delay time t
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2.5 SDA output delay time t
AA
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AA
Ambient temperature Ta
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Ambient temperature Ta
DISCONTINUED
DISCONTINUED
DISCONTINUED
4.5 V
DISCONTINUED
4.5 V
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
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2
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2
3
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3
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1
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1
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Ambient temperature Ta 2.4 Write time t
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Ambient temperature Ta 2.4 Write time t
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2-WIRE CMOS SERIAL E2PROM
Rev.4.2_00 S-24CS64A
Seiko Instruments Inc. 33
2.7 SDA output delay time tAA
Ambient temperature Ta
Ta(°C)
–40 0 85
VCC=1.8 V
1.0
0.5
tAA
(µs)
0
DISCONTINUED
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2-WIRE CMOS SERIAL E2PROM
S-24CS64A Rev.4.2_00
Seiko Instruments Inc.
34
Product Name Structure
1. 8-Pin SOP(JEDEC), 8-Pin TSSOP Packages
S-24CS64A 0I - xxxx G
Package name (abbreviation) and IC packing specifications
J8T1: 8-Pin SOP (JEDEC), Tape
T8T1:
8-Pin TSSOP, Tape
Fixed
Product name
S-24CS64A: 64 Kbit
2. WLP Package
S-24CS64A 0I - H8Tx
Package name (abbreviation) and IC packing specifications
H8Tx:
WLP, Tape
Fixed
Product name
S-24CS64A: 64 Kbit
Remark Please contact our sales office regarding the product with WLP package.
DISCONTINUED
Package name (abbreviation)
DISCONTINUED
Package name (abbreviation)
WLP, Tape
DISCONTINUED
WLP, Tape
Product name
DISCONTINUED
Product name
S-24CS64A: 64 Kbit
DISCONTINUED
S-24CS64A: 64 Kbit
DISCONTINUED
Please contact our sales office r
DISCONTINUED
Please contact our sales office r
PRODUCT
Package name (abbreviation)
PRODUCT
Package name (abbreviation)
No. FJ008-A-P-SD-2.1
No.
TITLE
SCALE
UNIT mm
SOP8J-D-PKG Dimensions
Seiko Instruments Inc.
FJ008-A-P-SD-2.1
0.4±0.05
1.27
0.20±0.05
5.02±0.2
14
85
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
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DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
0.4±0.05
DISCONTINUED
0.4±0.05
PRODUCT
PRODUCT
PRODUCT
PRODUCT
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PRODUCT
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PRODUCT
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No.
TITLE
SCALE
UNIT mm
5
8
1
4
ø2.0±0.05
ø1.55±0.05 0.3±0.05
2.1±0.1
8.0±0.1
5°max.
6.7±0.1
2.0±0.05
Seiko Instruments Inc.
Feed direction
4.0±0.1(10 pitches:40.0±0.2)
SOP8J-D-Carrier Tape
No. FJ008-D-C-SD-1.1
FJ008-D-C-SD-1.1
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
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DISCONTINUED
DISCONTINUED
DISCONTINUED
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DISCONTINUED
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DISCONTINUED
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DISCONTINUED
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No.
TITLE
SCALE
UNIT mm
QTY. 2,000
2±0.5
13.5±0.5
60°
2±0.5
ø13±0.2
ø21±0.8
Seiko Instruments Inc.
Enlarged drawing in the central part
SOP8J-D-Reel
No. FJ008-D-R-SD-1.1
FJ008-D-R-SD-1.1
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DISCONTINUED
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DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
2±0.5
DISCONTINUED
0.5
DISCONTINUED
DISCONTINUED
DISCONTINUED
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PRODUCT
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No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
TSSOP8-E-PKG Dimensions
No. FT008-A-P-SD-1.1
FT008-A-P-SD-1.1
0.17±0.05
3.00 +0.3
-0.2
0.65
0.2±0.1
14
5
8
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
0.2±0.1
DISCONTINUED
0.2±0.1
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
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No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
ø1.55±0.05
2.0±0.05
8.0±0.1 ø1.55 +0.1
-0.05
(4.4)
0.3±0.05
1
45
8
4.0±0.1
Feed direction
TSSOP8-E-Carrier Tape
No. FT008-E-C-SD-1.0
FT008-E-C-SD-1.0
+0.4
-0.2
6.6
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
5
DISCONTINUED
5
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No.
TITLE
SCALE
UNIT mm
Seiko Instruments Inc.
Enlarged drawing in the central part
No. FT008-E-R-SD-1.0
2±0.5
ø13±0.5
ø21±0.8
13.4±1.0
17.5±1.0
3,000
QTY.
TSSOP8-E-Reel
FT008-E-R-SD-1.0
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
2±0.5
DISCONTINUED
0.5
DISCONTINUED
DISCONTINUED
DISCONTINUED
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The information described herein is subject to change without notice.
Seiko Instruments Inc. is not responsible for any problems caused by circuits or diagrams described herein
whose related industrial properties, patents, or other rights belong to third parties. The application circuit
examples explain typical applications of the products, and do not guarantee the success of any specific
mass-production design.
When the products described herein are regulated products subject to the Wassenaar Arrangement or other
agreements, they may not be exported without authorization from the appropriate governmental authority.
Use of the information described herein for other purposes and/or reproduction or copying without the
express permission of Seiko Instruments Inc. is strictly prohibited.
The products described herein cannot be used as part of any device or equipment affecting the human
body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus
installed in airplanes and other vehicles, without prior written permission of Seiko Instruments Inc.
Although Seiko Instruments Inc. exerts the greatest possible effort to ensure high quality and reliability, the
failure or malfunction of semiconductor products may occur. The user of these products should therefore
give thorough consideration to safety design, including redundancy, fire-prevention measures, and
malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.
DISCONTINUED
DISCONTINUED
DISCONTINUED
DISCONTINUED
The information described herein is subject to change without notice.
DISCONTINUED
The information described herein is subject to change without notice.
Seiko Instruments Inc. is not responsible for any problems caused by circuits or diagrams described herein
DISCONTINUED
Seiko Instruments Inc. is not responsible for any problems caused by circuits or diagrams described herein
DISCONTINUED
whose related industrial properties, patents, or other rights belong to third parties. The application circuit
DISCONTINUED
whose related industrial properties, patents, or other rights belong to third parties. The application circuit
PRODUCT