REV. 0
a
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 2002
ADG821/ADG822/ADG823
<1 Ω CMOS 1.8 V to 5.5 V,
Dual SPST Switches
FEATURES
0.8 Max On Resistance @125C
0.28 Max On Resistance Flatness @125C
1.8 V to 5.5 V Single Supply
200 mA Current Carrying Capability
Automotive Temperature Range: –40C to +125C
Rail-to-Rail Operation
8-Lead MSOP Package
33 ns Switching Times
Typical Power Consumption (<0.01 W)
TTL/CMOS Compatible Inputs
Pin Compatible with ADG721/722/723
APPLICATIONS
Power Routing
Battery-Powered Systems
Communication Systems
Data Acquisition Systems
Audio and Video Signal Routing
Cellular Phones
Modems
PCMCIA Cards
Hard Drives
Relay Replacement
FUNCTIONAL BLOCK DIAGRAM
ADG821
IN1
D2
S2
S1
D1
IN2
ADG822
IN1
D2
S2
S1
D1
IN2
ADG823
IN1
D2
S2
S1
D1
IN2
SWITCHES SHOWN FOR A LOGIC “0”
INPUT
GENERAL DESCRIPTION
The ADG821, ADG822, and ADG823 are monolithic CMOS
SPST (single pole, single throw) switches. These switches are
designed on an advanced submicron process that provides low
power dissipation, yet gives high switching speed, low on
resistance, and low leakage currents.
The ADG821, ADG822, and ADG823 are designed to operate
from a single 1.8 V to 5.5 V supply, making them ideal for use
in battery-powered instruments.
Each switch of the ADG821/ADG822/ADG823 conducts equally
well in both directions when on. The ADG821, ADG822, and
ADG823 contain two independent SPST switches.
The ADG821
and ADG822 differ only in that both switches are normally open
and normally closed, respectively. In the ADG823, Switch 1 is
normally open and Switch 2 is normally closed. The ADG823
exhibits break-before-make switching action.
The ADG821, ADG822, and ADG823 are available in an 8-lead
MSOP package.
PRODUCT HIGHLIGHTS
1. Very Low On Resistance (0.5 Ω typ)
2. On Resistance Flatness (R
FLAT(ON)
) (0.15 Ω typ)
3. Automotive Temperature Range –40°C to +125°C
4. 200 mA Current Carrying Capability
5. Low Power Dissipation. CMOS construction ensures low
power dissipation.
6. 8-Lead MSOP Package
REV. 0–2–
ADG821/ADG822/ADG823–SPECIFICATIONS
1
–40C to –40C to
Parameter 25C+85C+125C
2
Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to V
DD
V
On Resistance (R
ON
)0.5 Ω typ V
S
= 0 V to V
DD
, I
S
= 100 mA;
0.6 0.7 0.8 Ω max Test Circuit 1
On Resistance Match Between
Channels (∆R
ON
)0.16 Ω typ V
S
= 0 V to V
DD
, I
S
= 100 mA
0.2 0.25 0.28 Ω max
On Resistance Flatness (R
FLAT(ON)
)0.15 Ω typ V
S
= 0 V to V
DD
, I
S
= 100 mA
0.23 0.26 0.3 Ω max
LEAKAGE CURRENTS V
DD
= 5.5 V
Source OFF Leakage I
S
(OFF) ±0.01 nA typ V
S
= 4.5 V/1 V, V
D
= 1 V/4.5 V;
±0.25 ±3±25 nA max Test Circuit 2
Drain OFF Leakage I
D
(OFF) ±0.01 nA typ V
S
= 4.5 V/1 V, V
D
= 1 V/4.5 V;
±0.25 ±3±25 nA max Test Circuit 2
Channel ON Leakage I
D
, I
S
(ON) ±0.01 nA typ V
S
= V
D
= 1 V, or V
S
= V
D
= 4.5 V;
±0.25 ±3±25 nA max Test Circuit 3
DIGITAL INPUTS
Input High Voltage, V
INH
2.0 V min
Input Low Voltage, V
INL
0.8 V max
Input Current
I
INL
or I
INH
0.005 µA typ V
IN
= V
INL
or V
INH
±0.1 µA max
C
IN
, Digital Input Capacitance 4 pF typ
DYNAMIC CHARACTERISTICS
3
t
ON
33 ns typ R
L
= 50 Ω, C
L
= 35 pF,
45 48 52 ns max V
S
= 3 V; Test Circuit 4
t
OFF
11 ns typ R
L
= 50 Ω, C
L
= 35 pF,
16 19 21 ns max V
S
= 3 V; Test Circuit 4
Break-Before-Make Time Delay, t
BBM
32 ns typ R
L
= 50 Ω, C
L
= 35 pF,
(ADG823 Only) 1 ns min V
S1
= V
S2
= 3 V; Test Circuit 5
Charge Injection 15 pC typ V
S
= 2.5 V; R
S
= 0 Ω, C
L
= 1 nF;
Test Circuit 6
Off Isolation –52 dB typ R
L
= 50 Ω, C
L
= 5 pF,
f =1 MHz; Test Circuit 7
Channel-to-Channel Crosstalk –82 dB typ R
L
= 50 Ω, C
L
= 5 pF
f = 1 MHz; Test Circuit 9
Bandwidth –3 dB 24 MHz typ R
L
= 50 Ω, C
L
= 5 pF;
Test Circuit 8
C
S
(OFF) 85 pF typ f =1 MHz
C
D
(OFF) 98 pF typ f =1 MHz
C
D
, C
S
(ON) 230 pF typ f =1 MHz
POWER REQUIREMENTS V
DD
= 5.5 V
Digital Inputs = 0 V or 5.5 V
I
DD
0.001 µA typ
1.0 2.0 µA max
NOTES
1
Temperature range: Automotive range: –40°C to +125°C.
2
On resistance parameters tested with I
S
= 10 mA.
3
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
(VDD = 5 V ± 10%, GND = 0 V. All specifications
–40C to +125C, unless otherwise noted.)
REV. 0
ADG821/ADG822/ADG823
–3– Spec RIGHT
(VDD = 2.7 V to 3.6 V, GND = 0 V. All specifications –40C to +125C, unless otherwise noted.)1
–40C to –40C to
Parameter 25C+85C+125C
2
Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to V
DD
V
On Resistance (R
ON
)0.7 Ω typ V
S
= 0 V to V
DD
, I
S
= 100 mA;
1.4 1.5 1.6 Ω max Test Circuit 1
On Resistance Match Between 0.16 Ω typ
Channels (∆R
ON
)0.2 0.25 0.28 Ω max V
S
= 0 V to V
DD
, I
S
= 100 mA
On Resistance Flatness (R
FLAT(ON)
)0.3 0.33 Ω typ V
S
= 0 V to V
DD
, I
S
= 100 mA
LEAKAGE CURRENTS V
DD
= 3.6 V
Source OFF Leakage I
S
(OFF) ±0.01 nA typ V
S
= 3.3 V/1 V, V
D
= 1 V/3.3 V;
±0.25 ±3±15 nA max Test Circuit 2
Drain OFF Leakage I
D
(OFF) ±0.01 nA typ V
S
= 3.3 V/1 V, V
D
= 1 V/3.3 V;
±0.25 ±3±25 nA max Test Circuit 2
Channel ON Leakage I
D
, I
S
(ON) ±0.01 nA typ V
S
= V
D
= 1 V, or 3.3 V;
±0.25 ±3±25 nA max Test Circuit 3
DIGITAL INPUTS
Input High Voltage, V
INH
2.0 V min
Input Low Voltage, V
INL
0.8 V max
Input Current
I
INL
or I
INH
0.005 µA typ V
IN
= V
INL
or V
INH
±0.1 µA max
C
IN
, Digital Input Capacitance 4 pF typ
DYNAMIC CHARACTERISTICS
3
t
ON
48 ns typ R
L
= 50 Ω, C
L
= 35 pF,
67 74 78 ns max V
S
= 1.5 V; Test Circuit 4
t
OFF
12 ns typ R
L
= 50 Ω, C
L
= 35 pF,
18 20 23 ns max V
S
= 1.5 V; Test Circuit 4
Break-Before-Make Time Delay, t
BBM
40 ns typ R
L
= 50 Ω, C
L
= 35 pF,
(ADG823 Only) 1 ns min V
S1
= V
S2
= 1.5V; Test Circuit 5
Charge Injection ±2pC typ V
S
=1.5 V; R
S
= 0 Ω, C
L
= 1 nF;
Test Circuit 6
Off Isolation –52 dB typ R
L
= 50 Ω, C
L
= 5 pF,
f = 1 MHz; Test Circuit 7
Channel-to-Channel Crosstalk –82 dB typ R
L
= 50 Ω, C
L
= 5 pF,
f = 1 MHz; Test Circuit 9
Bandwidth –3 dB 24 MHz typ R
L
= 50 Ω, C
L
= 5 pF;
Test Circuit 8
C
S
(OFF) 85 pF typ f =1 MHz
C
D
(OFF) 98 pF typ f =1 MHz
C
D
, C
S
(ON) 230 pF typ f =1 MHz
POWER REQUIREMENTS V
DD
= 3.6 V
Digital Inputs = 0 V or 3.6 V
I
DD
0.001 µA typ
1.0 2.0 µA max
NOTES
1
Temperature range: Automotive range: –40°C to +125°C.
2
On resistance parameters tested with I
S
= 10 mA.
3
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
REV. 0–4–
ADG821/ADG822/ADG823
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
ADG821/ADG822/ADG823 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions
are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= 25°C, unless otherwise noted.)
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
Analog Inputs
2 . . . . . . . . . . . . . . . . . . . . . . . . . . .
–0.3 V to V
DD
+ 0.3 V or
30 mA, Whichever Occurs First
Digital Inputs
2
. . . . . . . . . . . . . . . . . . –0.3 V to V
DD
+ 0.3 V or
30 mA, Whichever Occurs First
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 400 mA
(Pulsed at 1 ms, 10% Duty Cycle max)
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . 200 mA
Operating Temperature Range
Automotive . . . . . . . . . . . . . . . . . . . . . . . –40°C to +125°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature (T
j
max) . . . . . . . . . . . . . . . . . . . 150°C
Package Power Dissipation . . . . . . . . . . . . . . (T
j
max – T
A
)/θ
JA
8-Lead MSOP Package
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 206°C/W
θ
JC
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 44°C/W
Lead Temperature, Soldering (10 sec) . . . . . . . . . . . . . 300°C
IR Reflow, Peak Temperature (<20 sec) . . . . . . . . . . . . 235°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.
2
Overvoltages at IN, S, or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
ORDERING GUIDE
Model Option Temperature Range Brand
*
Package Description Package
ADG821BRM –40°C to +125°CSQB MSOP (microSmall Outline IC) RM-8
ADG822BRM –40°C to +125°CSRB MSOP (microSmall Outline IC) RM-8
ADG823BRM –40°C to +125°CSSB MSOP (microSmall Outline IC) RM-8
*
Branding on MSOP packages is limited to three characters due to space constraints.
Table I. Truth Table for the ADG821/ADG822
ADG821 INx ADG822 INx Switch x Condition
01OFF
10ON
Table II. Truth Table for the ADG823
IN1 IN2 Switch S1 Switch S2
0 0 OFF ON
0 1 OFF OFF
1 0 ON ON
1 1 ON OFF
REV. 0
ADG821/ADG822/ADG823
–5–
TERMINOLOGY
V
DD
Most Positive Power Supply Potential
GND Ground (0 V) Reference
I
DD
Positive Supply Current
SSource Terminal. May be an input or output.
DDrain Terminal. May be an input or output.
IN Logic Control Input
R
ON
Ohmic Resistance between D and S
∆R
ON
On Resistance Match between any Two Channels (i.e., R
ON
max – R
ON
min)
R
FLAT(ON)
Flatness is defined as the difference between the maximum and minimum value of on resistance as
measured over the specified analog signal range.
I
S
(OFF) Source Leakage Current with the Switch OFF
I
D
(OFF) Drain Leakage Current with the Switch OFF
I
D
, I
S
(ON) Channel Leakage Current with the Switch ON
V
D
(V
S
)Analog Voltage on Terminals D and S
V
INL
Maximum Input Voltage for Logic “0”
V
INH
Minimum Input Voltage for Logic “1”
I
INL
(I
INH
)Input Current of the Digital Input
C
S
(OFF) OFF Switch Source Capacitance
C
D
(OFF) OFF Switch Drain Capacitance
C
D
, C
S
(ON) ON Switch Capacitance
t
ON
Delay between Applying the Digital Control Input and the Output Switching ON
t
OFF
Delay between Applying the Digital Control Input and the Output Switching OFF
t
BBM
OFF time or ON time measured between the 90% points of both switches, when switching from one
address state to another.
Charge Injection It is a measure of the glitch impulse transferred from the digital input to the analog output during switching.
Crosstalk It is a measure of unwanted signal that is coupled through from one channel to another as a result
of parasitic capacitance.
Off Isolation A Measure of Unwanted Signal Coupling through an OFF Switch
Bandwidth The Frequency at which the Output Is Attenuated by –3 dBs
On Response The Frequency Response of the ON Switch
Insertion Loss The Loss due to the On Resistance of the Switch
PIN CONFIGURATION
8-Lead MSOP
(RM-8)
TOP VIEW
(Not to Scale)
8
7
6
5
1
2
3
4
S1
D1
IN2
VDD
D2
S2GND
ADG821/
ADG822/
ADG823
IN1
REV. 0–6–
ADG821/ADG822/ADG823
–Typical Performance Characteristics
V
D
(V
S
) – V
0
ON RESISTANCE –
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
12345
V
DD
= 2.7V
V
DD
= 3.0V
V
DD
= 3.3V
V
DD
= 4.5V
V
DD
= 5.0V
V
DD
= 5.5V
T
A
= 25C
5
TPC 1. On Resistance vs. V
D
(V
S
)
V
D
(V
S
) – V
ON RESISTANCE –
0.8
0
0.7
0.6
0.5
0.4
0.3
0.2
0.1
00.5 1.0 1.5 2.0 2.5 3.0
+125C
+85C
+25C–40C
V
DD
= 3V
TPC 4. On Resistance vs. V
D
(V
S
)
for Different Temperatures
TEMPERATURE – C
TIME – ns
0
10
20
30
40
50
60
–40 –20 0 20 40 60 80 100 1200
V
DD
= 3V
V
DD
= 3V, 5V
T
A
= 25C
t
ON
t
OFF
V
DD
= 5V
TPC 7. t
ON
/t
OFF
vs. Temperature
V
D
(V
S
) – V
ON RESISTANCE –
5.0
0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
00.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
T
A
= 25C
V
DD
= 1.8V
TPC 2. On Resistance vs. V
D
(V
S
)
TEMPERATURE – C
020 120
40 60 80 100
CURRENT – nA
8
7
–1
3
2
1
0
6
4
5
125
I
S
, I
D
(ON)
V
DD
= 5V, 3V
I
S
(OFF)
I
D
(OFF)
TPC 5. Leakage Currents vs.
Temperature
FREQUENCY – MHz
0
100
ATTENUATION – dB
110
–10
–20
–30
–40
–50
–60
–70
VDD = 3V, 5V
TA = 25C
0.2
TPC 8. Off Isolation vs. Frequency
VD (VS) – V
ON RESISTANCE –
0.8
0
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
+125C
+85C
+25C
–40C
VDD = 5V
TPC 3. On Resistance vs. V
D
(V
S
)
for Different Temperatures
Vs – V
0 0.5 3.0
1.0 1.5 2.0 2.5
CHARGE INJECTION – pC
–200
–150
–100
–50
0
50
100
150
200
3.5 4.0 4.5 5.0
V
DD
= 3V
V
DD
= 5V
T
A
= 25C
TPC 6. Charge Injection vs.
Source Voltage
FREQUENCY – MHz
0
100
ATTENUATION – dB
0.1 1 10
–1
–2
–3
–4
–5
–6
–7
VDD = 3V, 5V
TA = 25C
–8
–9
TPC 9. On Response vs. Frequency
REV. 0
ADG821/ADG822/ADG823
–7–
FREQUENCY – MHz
100
ATTENUATION – dB
0.1 1 10
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
TPC 10. Crosstalk vs. Frequency
V
DD
– V
0
LOGIC THRESHOLD VOLTAGE – V
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0
12345
0.4
6
V
IN
RISING
V
IN
FALLING
TPC 11. Logic Threshold
Voltage vs. Suppply Voltage
FREQUENCY – Hz
0.045
100
THD – %
20
0.040
0.035
0.030
0.025
0.020
0.015
0.010
0.005
0.050
1K 10K
VS = 5V
RL = 600
VP-P = 2V
TPC 12. THD
REV. 0–8–
ADG821/ADG822/ADG823
Test Circuits
I
DS
V1
SD
V
S
R
ON
= V1/I
DS
Test Circuit 1. On Resistance
SD
V
S
AA
V
D
I
S
(OFF) I
D
(OFF)
Test Circuit 2. Off Leakage
SD
A
V
D
I
D
(ON)
NC
NC = NO CONNECT
Test Circuit 3. On Leakage
VDD
VDD
0.1F
VSIN
SD
GND
RL
50
CL
35pF
VOUT
VIN
VIN
VOUT
tON tOFF
50% 50%
90% 90%
50% 50%
ADG821
ADG822
Test Circuit 4. Switching Times
0.1F
V
DD
V
DD
S1 D1
IN1, IN2
V
S1
GND
R
L1
50
C
L1
35pF
V
OUT1
V
S2
V
OUT2
R
L2
50
C
L2
35pF
S2
V
IN
D2
tBBM tBBM
50% 50%
90%
V
IN
V
OUT1
V
OUT2
90%
90%
90%
0V
0V
0V
Test Circuit 5. Break-Before-Make Time Delay, t
BBM
(ADG823 only)
VDD
VDD
SD
IN
VS
GND
CL
1nF
VOUT
RS
SW ON
VIN
VOUT
QINJ = CL ∆VOUT
SW OFF
VOUT
Test Circuit 6. Charge Injection
REV. 0
ADG821/ADG822/ADG823
–9–
V
S
V
OUT
NETWORK
ANALYZER
R
L
IN
GND
V
IN
S
D
OFF ISOLATION = 20 LOG
V
OUT
V
S
V
DD
0.1F
V
DD
50
50
50
Test Circuit 7. Off Isolation
CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG
GND
V
DD
V
DD
S1
D
S2
V
S
V
OUT
NETWORK
ANALYZER
R
L
IN
V
OUT
V
S
R
50
0.1F
50
50
Test Circuit 9. Channel-to-Channel Crosstalk
V
S
V
OUT
50
NETWORK
ANALYZER
R
L
50
IN
GND
V
IN
S
D
INSERTION LOSS = 20 LOG V
OUT
WITH SWITCH
V
OUT
WITHOUT SWITCH
V
DD
V
DD
0.1F
Test Circuit 8. Bandwidth
REV. 0–10–
ADG821/ADG822/ADG823
OUTLINE DIMENSIONS
8-Lead MSOP Package [MSOP]
(RM-8)
Dimensions shown in millimeters
0.23
0.08
0.80
0.40
8
0
85
4
1
4.90
BSC
PIN 1
0.65 BSC
3.00
BSC
SEATING
PLANE
0.15
0.00
0.38
0.22
1.10 MAX
3.00
BSC
COMPLIANT TO JEDEC STANDARDS MO-187AA
–11–
C02851–0–8/02(0)
PRINTED IN U.S.A.
–12–