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FAN48623 — 2500 mA Synchronous TinyBoost™ R egulator with B ypass Mode
Circuit D e scription
FAN48623 is a synchronous boost regulator, typically
operating at 2.5 MHz in Continuous Conduction Mode
(CCM), w hich occurs at moderate to heavy load current and
low VIN voltages. At light load, the regulator operates at
Discontinuous Conduction Mode (DCM) to maintain high
efficiency.
FAN48623 uses a current-mode modulator to achieve
excellent trans ient res ponse and s mooth tr ansitions betw een
CCM a n d DCM operation.
The regulator includes a Bypass Mode that automatically
activates w hen VIN is above the boost regulator’s set point.
Tab le 2. Operatin g States
Startup and Shutdown (EN Pin)
If EN is LOW, all bias circuits are off and the regulator is in
Shutdown Mode. During s hutdown, cur rent flow is prev ented
from VIN to VOUT, as w ell as reverse flow from VOUT to
VIN. During startup, keep DC current draw below 500 mA
until the device successfully executes startup. It is
recommended not to connect EN directly to VIN but use a
GPIO voltage of 1.8 V to set the logic for the EN pin. The
f ollowing table desc ribes the s tartup s equence.
Tab le 3. B oost Start up Seque nce
Start
Mode
Entry Exit End
Mode
(µs)
LIN1 VIN > VUVLO,
EN=1
OUT
IN
LIN2 LIN1 Exit
OUT
IN
TIMEOUT FAUL
T 1024
SS LIN1 or
LIN2 Exit VOUT=VOUT_TARGET
BST
Linear S t artup (LIN)
When EN is HIGH and VIN > VUVLO, the regulator attempts to
bring VOUT w ithin 300 mV of VIN using the internal fixed
current source from VIN (Q3). The current is limited to the
LIN1 (~1 A) set poi nt.
If VOUT reaches VIN-300 mV during LIN1 Mode, SS Mode is
initiated. Otherwise, LIN1 times out after 512 µs and LIN2
Mode is enter ed.
In LIN2 Mode, the current source is incremented to
approximately 2 A. If VOUT fails to reach VIN-300 mV after
1024 µs, a fault state is declared.
Soft-Start Mode (SS)
Upon successful completion of the LIN Mode (VOUT>VIN-
300 mV ), SS Mode begins and the r egulator starts switching
with boost valley current limited to 50% of nominal level at
Boost Mode.
During SS Mode, VOUT is ramped up by stepping the internal
reference. If VOUT fails to reach the voltage required during
the SS ramp s equence w ithin 64 µs, a fault state is declared.
Boost Mode (BST)
This is a normal operating state of the regulator.
Bypass M ode (BPS)
If V IN is above VOUT_TARGET when the SS Mode suc ces sf ully
completes, the dev ice tr ansitions direc tly to BPS Mode.
Tab le 4. E N and BYP Logic Ta bl e
EN BYP
Mode VOUT
0
1
IN
1 Auto Bypass
OUT_TARGET
IN
(if VIN > VOUT_TARGET)
FAULT State
The regulator enters the FAULT state under any of the
following conditi ons:
VOUT f ails to ac hieve the v oltage required to advanc e f rom
LIN s tate to SS state.
VOUT f ails to ac hieve the v oltage required to advanc e f rom
SS state to BST state.
Boost valley current lim it triggers for 2 ms during the BST
state.
VIN to V OUT voltage drop exceeds 160 mV during BPS
state.
VIN < VUVLO
If a fault is triggered, the regulator stops sw itching and
presents a high-impedance path between VIN and VOUT.
After waiting 20 ms, a n automatic restart is attempted.
P ower Good
Power good is defined as a 0-FAULT, 1-POWER GOOD,
open-drain output. The Pow er Good pin (PG) signals when
the regulator has successfully completed soft-start w ith no
faults occurring. Pow er Good also functions as a warning
flag for high die temperature.
PG is released HIGH when the soft-start sequence is
successfully completed.
Any FAULT state causes PG to be de-asserted.
PG is not asserted during Forced Bypass exit to Boost
Mode until the soft-start sequence is successfully
completed.
IN
OUT
SS Soft-Start Mode
IN
OUT
VOUT_TARGET
OUT
OUT_TARGET
IN
OUT_TARGET