2001-2017 Microchip Technology Inc. DS20001685E-page 1
MCP6021/1R/2/3/4
Features
• Rail-to-Rail Input/Output
• Wide Bandwidth: 10 MHz (typical)
• Low Noise: 8.7 nV/Hz at 10 kHz (typical)
• Low Offset Voltage:
- Industrial Temperature: ±500 µV (max.)
- Extended Temperature: ±250 µV (max.)
• Mid-Supply V
REF
: MCP6021 and MCP6023
• Low Supply Current: 1 mA (typical)
• Total Harmonic Distortion:
- 0.00053% (typical, G = 1 V/V)
• Unity Gain Stable
• Power Supply Range: 2.5V to 5.5V
• Temperature Range:
- Industrial: -40°C to +85°C
- Extended: -40°C to +125°C
Applications
• Automotive
• Multi-Pole Active Filters
• Audio Processing
• DAC Buffer
• Test Equipment
• Medical Instrumentation
Design Aids
• SPICE Macro Models
•FilterLab
®
Software
• MPLAB
®
Mindi™ Analog Simulator
• Microchip Advanced Part Selector (MAPS)
• Analog Demonstration and Evaluation Boards
• Application Notes
Typical Application
Description
The MCP6021, MCP6021R, MCP6022, MCP6023 and
MCP6024 from Microchip Technology Inc. are rail-to-
rail input and output operational amplifiers with high
performance. Key specifications include: wide band-
width (10 MHz), low noise (8.7 nV/Hz), low input offset
voltage and low distortion (0.00053% THD+N). The
MCP6023 also offers a Chip Select pin (CS) that gives
power savings when the part is not in use.
The single MCP6021 and MCP6021R are available in
SOT-23-5 packages. The single MCP6021, single
MCP6023 and dual MCP6022 are available in 8-lead
PDIP, SOIC and TSSOP packages. The Extended
Temperature single MCP6021 is available in 8-lead
MSOP. The quad MCP6024 is offered in 14-lead PDIP,
SOIC and TSSOP packages.
The MCP6021/1R/2/3/4 family is available in Industrial
and Extended temperature ranges. It has a power
supply range of 2.5V to 5.5V.
Package Types
Photo
Detector
100 pF
5.6 pF
100 k
V
DD
/2
MCP6021
Transimpedance Amplifier
MCP6021
SOT-23-5
1
2
3
5
4
V
DD
V
IN
-
V
OUT
V
SS
V
IN
+
MCP6022
PDIP, SOIC, TSSOP
1
2
3
4
8
7
6
5
CS
V
DD
V
OUT
V
REF
NC
V
IN
-
V
IN
+
V
SS
MCP6023
PDIP, SOIC, TSSOP
1
2
3
4
8
7
6
5
V
DD
V
OUTB
V
INB
-
V
INB
+
V
OUTA
V
INA
-
V
INA
+
V
SS
MCP6024
PDIP, SOIC, TSSOP
1
2
3
4
V
OUTD
V
IND
-
V
IND
+
V
SS
V
OUTA
V
INA
-
V
INA
+
V
DD
V
INC
+
V
INC
-
V
OUTC
5
6
7
V
INB
+
V
INB
-
V
OUTB
14
13
12
11
10
9
8
MCP6021
PDIP, SOIC,
MSOP, TSSOP
1
2
3
4
8
7
6
5
NC
V
DD
V
OUT
V
REF
NC
V
IN
-
V
IN
+
V
SS
MCP6021R
SOT-23-5
1
2
3
5
4
V
SS
V
IN
-
V
OUT
V
DD
V
IN
+
Rail-to-Rail Input/Output, 10 MHz Op Amps
MCP6021/1R/2/3/4
DS20001685E-page 2 2001-2017 Microchip Technology Inc.
NOTES:
2001-2017 Microchip Technology Inc. DS20001685E-page 3
MCP6021/1R/2/3/4
1.0 ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings†
V
DD
–V
SS
........................................................................7.0V
Current Analog Input Pins (V
IN
+, V
IN
-)..........................±2 mA
Analog Inputs (V
IN
+, V
IN
-) ††......... V
SS
– 1.0V to V
DD
+1.0V
All Other Inputs and Outputs.......... V
SS
– 0.3V to V
DD
+0.3V
Difference Input Voltage ...................................... |V
DD
–V
SS
|
Output Short-Circuit Current ................................Continuous
Current at Output and Supply Pins ............................±30 mA
Storage Temperature ....................................-65°C to +150°C
Maximum Junction Temperature.................................+150°C
ESD Protection on All Pins (HBM; MM)  2 kV; 200V
† Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of
the device at those or any other conditions above those
indicated in the operational listings of this specification is not
implied. Exposure to maximum rating conditions for extended
periods may affect device reliability.
†† See Section 4 .1 .2, Input Vo ltage Li m its.
DC ELECT RICAL CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, T
A
= +25°C, V
DD
= +2.5V to +5.5V, V
SS
= GND, V
CM
= V
DD
/2, V
OUT
V
DD
/2
and R
L
=10kto V
DD
/2.
Parameters Sym. Min. Typ. Max. Units Conditions
Input Of f s e t
Input Offset Voltage:
Industrial Temperature Parts V
OS
-500 — +500 µV V
CM
= 0V
Extended Temperature Parts V
OS
-250 — +250 µV V
CM
= 0V, V
DD
= 5.0V
Extended Temperature Parts V
OS
-2.5 — +2.5 mV V
CM
= 0V, V
DD
= 5.0V,
T
A
= -40°C to +125°C
Input Offset Voltage Temperature Drift V
OS
/T
A
—±3.5—µV/°CT
A
= -40°C to +125°C
Power Supply Rejection Ratio PSRR 74 90 — dB V
CM
= 0V
Input Cur r e nt and Impedance
Input Bias Current: I
B
—1—pA
Industrial Temperature Parts I
B
— 30 150 pA T
A
= +85°C
Extended Temperature Parts I
B
— 640 5,000 pA T
A
= +125°C
Input Offset Current I
OS
—±1—pA
Common-Mode Input Impedance Z
CM
—10
13
||6 — ||pF
Differential Input Impedance Z
DIFF
—10
13
||3 — ||pF
Common-Mode
Common-Mode Input Range V
CMR
V
SS
– 0.3 — V
DD
+ 0.3 V
Common-Mode Rejection Ratio CMRR 74 90 — dB V
DD
= 5V, V
CM
= -0.3V to 5.3V
CMRR 70 85 — dB V
DD
= 5V, V
CM
= 3.0V to 5.3V
CMRR 74 90 — dB V
DD
= 5V, V
CM
= -0.3V to 3.0V
Voltage Reference (MCP6021 and MCP6023 only)
V
REF
Accuracy (V
REF
–V
DD
/2) V
REF_ACC
-50 — +50 mV
V
REF
Temperature Drift V
REF
/T
A
— ±100 — µV/°C T
A
= -40°C to +125°C
Open-Loop Gain
DC Open-Loop Gain (Large Signal) A
OL
90 110 — dB V
CM
= 0V,
V
OUT
= V
SS
+ 0.3V to V
DD
– 0.3V
Output
Maximum Output Voltage Swing V
OL
, V
OH
V
SS
+ 15 — V
DD
– 20 mV 0.5V input overdrive
Output Short Circuit Current I
SC
—±30—mAV
DD
= 2.5V
I
SC
—±22—mAV
DD
= 5.5V
Power Supply
Supply Voltage V
DD
2.5 — 5.5 V
Quiescent Current per Amplifier I
Q
0.5 1.0 1.35 mA I
O
= 0
MCP6021/1R/2/3/4
DS20001685E-page 4 2001-2017 Microchip Technology Inc.
AC ELECT RICAL CHARACTERISTICS
MCP6023 CHIP SELECT (CS) ELECTRICAL CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, T
A
= +25°C, V
DD
= +2.5V to +5.5V, V
SS
= GND, V
CM
= V
DD
/2, V
OUT
V
DD
/2,
R
L
=10kto V
DD
/2 and C
L
= 60 pF.
Parameters Sym. Min. Typ. Max. Units Conditions
AC Response
Gain Bandwidth Product GBWP — 10 — MHz
Phase Margin PM — 65 — ° G = +1 V/V
Settling Time, 0.2% t
SETTLE
— 250 — ns G = +1 V/V, V
OUT
= 100 mV
p-p
Slew Rate SR — 7.0 — V/µs
Total Harmonic Dis t or tion Plus Noise
f = 1 kHz, G = +1 V/V THD + N — 0.00053 — % V
OUT
= 0.25V to 3.25V (1.75V ± 1.50V
PK
),
V
DD
= 5.0V, BW = 22 kHz
f = 1 kHz, G = +1 V/V, R
L
= 600THD + N — 0.00064 — % V
OUT
= 0.25V to 3.25V (1.75V ± 1.50V
PK
),
V
DD
= 5.0V, BW = 22 kHz
f = 1 kHz, G = +1 V/V THD + N — 0.0014 — % V
OUT
= 4V
P-P
, V
DD
= 5.0V, BW = 22 kHz
f = 1 kHz, G = +10 V/V THD + N — 0.0009 — % V
OUT
= 4V
P-P
, V
DD
= 5.0V, BW = 22 kHz
f = 1 kHz, G = +100 V/V THD + N — 0.005 — % V
OUT
= 4V
P-P
, V
DD
= 5.0V, BW = 22 kHz
Noise
Input Noise Voltage E
ni
— 2.9 — µVp-p f = 0.1 Hz to 10 Hz
Input Noise Voltage Density e
ni
—8.7—nV/Hz f = 10 kHz
Input Noise Current Density i
ni
—3—fA/Hz f = 1 kHz
Electrical Specifications: Unless otherwise indicated, T
A
= +25°C, V
DD
= +2.5V to +5.5V, V
SS
= GND, V
CM
= V
DD
/2,
V
OUT
V
DD
/2, R
L
=10kto V
DD
/2 and C
L
= 60 pF.
Para m et e r s Sym. Min. Typ. Max. Units Condit ions
CS Low Specifications
CS Logic Threshold, Low V
IL
V
SS
—0.2V
DD
V
CS Input Current, Low I
CSL
-1.0 0.01 — µA CS = V
SS
CS High Specifications
CS Logic Threshold, High V
IH
0.8 V
DD
—V
DD
V
CS Input Current, High I
CSH
—0.012.0 µACS = V
DD
GND Current I
SS
-2 -0.05 — µA CS = V
DD
Amplifier Output Leakage I
O(LEAK)
—0.01— µACS = V
DD
CS Dynamic Specifications
CS Low to Amplifier Output Turn-on Time t
ON
— 2 10 µs G = +1, V
IN
= V
SS
,
CS = 0.2 V
DD
to V
OUT
= 0.45 V
DD
time
CS High to Amplifier Output High-Z Time t
OFF
— 0.01 — µs G = +1, V
IN
= V
SS
,
CS = 0.8 V
DD
to V
OUT
= 0.05 V
DD
time
Hysteresis V
HYST
—0.6— VV
DD
= 5.0V, internal switch
2001-2017 Microchip Technology Inc. DS20001685E-page 5
MCP6021/1R/2/3/4
TEMPERATURE CHARACTERISTICS
FIGURE 1-1: Timing Diagram for the CS
Pin on the MCP6023.
1.1 Test Circuits
The test circuits used for the DC and AC tests are
shown in Figure 1-2 and Figure 1-3. The bypass
capacitors are laid out according to the rules discussed
in Section 4.7 “Supply Bypass”.
FIGURE 1-2: AC and DC Test Circuit for
Most Non-Inv erti ng Ga in Cond iti ons .
FIGURE 1-3: AC and DC Test Circuit for
Most Inverting Gain Conditions.
Electrical Specifications: Unless otherwise indicated, V
DD
= +2.5V to +5.5V and V
SS
= GND.
Parameters Sym. Min. Typ. Max. Units Conditions
Temperature Ranges
Industrial Temperature Range T
A
-40 — +85 °C
Extended Temperature Range T
A
-40 — +125 °C
Operating Temperature Range T
A
-40 — +125 °C (Note 1)
Storage Temperature Range T
A
-65 — +150 °C
Thermal Package Resistances
Thermal Resistance, 5L-SOT-23
JA
— 256 — °C/W
Thermal Resistance, 8L-PDIP
JA
—85—°C/W
Thermal Resistance, 8L-SOIC
JA
— 163 — °C/W
Thermal Resistance, 8L-MSOP
JA
— 206 — °C/W
Thermal Resistance, 8L-TSSOP
JA
— 124 — °C/W
Thermal Resistance, 14L-PDIP
JA
—70—°C/W
Thermal Resistance, 14L-SOIC
JA
— 120 — °C/W
Thermal Resistance, 14L-TSSOP
JA
— 100 — °C/W
Note 1: The industrial temperature devices operate over this Extended temperature range, but with reduced performance. In any
case, the internal Junction Temperature (T
J
) must not exceed the absolute maximum specification of +150°C.
High-Z
t
ON
CS
t
OFF
V
OUT
-50 nA
High-Z
I
SS
I
CS
10 nA 10 nA 10 nA
-50 nA
Amplifier On
(typical)
(typical)
(typical)
(typical) (typical)
-1 mA
(typical)
VDD
MCP6021
2k:2k:
1k:VOUT
VIN
VDD/2
1µF
CLRL
VL
0.1 µF
CB1
RN
RGRF
60 pF 10 k:
CB2
V
DD
MCP6021
2k:
1k:V
OUT
V
DD
/2
V
IN
1µF
V
L
0.1 µF
2k:
C
L
R
L
C
B1
R
N
R
G
R
F
60 pF 10 k:
C
B2
MCP6021/1R/2/3/4
DS20001685E-page 6 2001-2017 Microchip Technology Inc.
NOTES:
2001-2017 Microchip Technology Inc. DS20001685E-page 7
MCP6021/1R/2/3/4
2.0 TYPICAL PERFORMANCE CURVES
Note: Unless otherwise indicated, T
A
= +25°C, V
DD
= +2.5V to +5.5V, V
SS
= GND, V
CM
= V
DD
/2, V
OUT
V
DD
/2,
R
L
=10kto V
DD
/2 and C
L
=60 pF.
FIGURE 2-1: Input Offset Voltage
(Industr i al Temperatu re Parts).
FIGURE 2-2: Input Offset Voltage
(Extend ed Temp er atu re Parts).
FIGURE 2-3: Input Offset Voltage vs.
Common-Mode Input Voltage with V
DD
= 2.5V.
FIGURE 2-4: Input Offset Voltage Drift
(Industrial Temperature Parts).
FIGURE 2-5: Input Offset Voltage Drift
(Extended Temperature Parts).
FIGURE 2-6: Input Offset Voltage vs.
Common-Mode Input Voltage with V
DD
= 5.5V.
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
0%
2%
4%
6%
8%
10%
12%
14%
16%
-500
-400
-300
-200
-100
0
100
200
300
400
500
Percentage of Occurances
Input Offset Voltage (µV)
1192 Samples
V
CM = 0V
TA= +25°C
I-Temp
Parts
0%
2%
4%
6%
8%
10%
12%
14%
16%
18%
20%
22%
24%
-240
-200
-160
-120
-80
-40
0
40
80
120
160
200
240
Percentage of Occurances
Input Offset Voltage (µV)
438 Samples
V
DD = 5.0V
VCM = 0V
TA= +25°C
E-Temp
Parts
-500
-400
-300
-200
-100
0
100
200
300
400
500
-0.5 0.0 0.5 1.0 1.5 2.0 2.5
3.0
Input Offset Voltage (µV)
Common Mode Input Voltage (V)
V
DD = 2.5V
-40°C
+25°C
+85°C
+125°C
0%
2%
4%
6%
8%
10%
12%
14%
16%
18%
20%
22%
24%
-20
-16
-12
-8
-4
0
4
8
12
16
20
Percentage of Occurances
Input Offset Voltage Drift (µV/°C)
438 Samples
V
CM = 0V
TA= -40°C to +125°C
E-Temp
Parts
-500
-400
-300
-200
-100
0
100
200
300
400
500
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Input Offset Voltage (µV)
Common Mode Input Voltage (V)
V
DD = 5.5V
-40°C
+25°C
+85°C
+125°C
MCP6021/1R/2/3/4
DS20001685E-page 8 2001-2017 Microchip Technology Inc.
Note: Unless otherwise indicated, T
A
= +25°C, V
DD
= +2.5V to +5.5V, V
SS
= GND, V
CM
= V
DD
/2, V
OUT
V
DD
/2,
R
L
=10kto V
DD
/2 and C
L
=60 pF.
FIGURE 2-7: Input Offset Voltage vs.
Temperature.
FIGURE 2-8: Input Noise Voltage Density
vs. Frequency.
FIGURE 2-9: CMRR, PSRR vs.
Frequency.
FIGURE 2-10: Input Offset Voltage vs.
Output Voltage.
FIGURE 2-11: Input Noise Voltage Density
vs. Common-Mode Input Voltage.
FIGURE 2-12: CMRR, PSRR vs.
Temperature.
-300
-250
-200
-150
-100
-50
0
50
100
-50-25 0 255075100125
Input Offset Voltage (µV)
Ambient Temperature (°C)
V
DD = 5.0V
VCM = 0V
1
10
100
1,000
1.E-01 1.E+00 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 1.E+06
Input Noise Voltage Density
(nV/√Hz)
Frequency (Hz)
0.1 1 10 100 1k 10k 1M100k
20
30
40
50
60
70
80
90
100
1.E+02 1.E+03 1.E+04 1.E+05 1.E+06
CMRR, PSRR (dB)
Frequency (Hz)
CMRR
100 1k 10k 100k 1M
PSRR+
PSRR-
-200
-150
-100
-50
0
50
100
150
200
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Input Offset Voltage (µV)
Output Voltage (V)
V
DD = 5.5V
VCM = VDD/2
VDD = 2.5V
0
2
4
6
8
10
12
14
16
18
20
22
24
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
Input Noise Voltage Density
(nV/√Hz)
Common Mode Input Voltage (V)
V
DD = 5.0V
f = 1 kHz
f = 10 kHz
70
75
80
85
90
95
100
105
110
-50-250 255075100125
PSRR, CMRR (dB)
Ambient Temperature (°C)
PSRR (VCM = 0V)
CMRR
2001-2017 Microchip Technology Inc. DS20001685E-page 9
MCP6021/1R/2/3/4
Note: Unless otherwise indicated, T
A
= +25°C, V
DD
= +2.5V to +5.5V, V
SS
= GND, V
CM
= V
DD
/2, V
OUT
V
DD
/2,
R
L
=10kto V
DD
/2 and C
L
=60 pF.
FIGURE 2-13: Input Bias, Offset Currents
vs. Common-Mode Input Voltage.
FIGURE 2-14: Quiescent Current vs.
Supply Voltage.
FIGURE 2-15: Output Short-Circuit Current
vs. Supply Voltage.
FIGURE 2-16: Input Bias, Offset Currents
vs. Temperature.
FIGURE 2-17: Quiescent Current vs.
Temperature.
FIGURE 2-18: Open-Loop Gain, Phase vs.
Frequency.
1
10
100
1,000
10,000
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Input Bias, Offset Currents
(pA)
Common Mode Input Voltage (V)
I
B, TA= +125°C
VDD = 5.5V
IOS, TA= +85°C
IOS, TA= +125°C
IB, TA= +85°C
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Quiescent Current
(mA/amplifier)
Power Supply Voltage (V)
+125°C
+85°C
+25°C
-40°C
0
5
10
15
20
25
30
35
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Output ShortCircuit Current
(mA)
Supply Voltage (V)
+125°C
+85°C
+25°C
-40°C
1
10
100
1,000
10,000
25 35 45 55 65 75 85 95 105 115 125
Input Bias, Offset Currents (pA)
Ambient Temperature (°C)
I
B
VCM = VDD
VDD = 5.5V
IOS
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
-50-25 0 255075100125
Quiescent Current
(mA/amplifier)
Ambient Temperature (°C)
V
DD = 5.5V
VDD = 2.5V
VCM = VDD -0.5V
-210
-195
-180
-165
-150
-135
-120
-105
-90
-75
-60
-45
-30
-15
0
-20
-10
0
10
20
30
40
50
60
70
80
90
100
110
120
1.E+00 1.E+01 1.E+ 02 1.E+03 1.E+04 1.E+ 05 1.E+06 1.E+07 1.E+ 08
Open-Loop Phase (°)
Open-Loop Gain (dB)
Frequency (Hz)
Gain
Phase
1 10010 1k 100k10k 1M 100M10M
MCP6021/1R/2/3/4
DS20001685E-page 10 2001-2017 Microchip Technology Inc.
Note: Unless otherwise indicated, T
A
= +25°C, V
DD
= +2.5V to +5.5V, V
SS
= GND, V
CM
= V
DD
/2, V
OUT
V
DD
/2,
R
L
=10kto V
DD
/2 and C
L
=60 pF.
FIGURE 2-19: DC Open-Loop Gain vs.
Load Resistance.
FIGURE 2-20: Small Signal DC Open-Loop
Gain vs. Output Voltage Headroom.
FIGURE 2-21: Gain Bandwidth Product,
Phase Margin vs. Temperature.
FIGURE 2-22: DC Open-Loop Gain vs.
Temperature.
FIGURE 2-23: Gain Bandwidth Product,
Phase Margin vs. Common-Mode Input Voltage.
FIGURE 2-24: Gain Bandwidth Product,
Phase Margin vs. Output Voltage.
80
90
100
110
120
130
1.E+02 1.E+03 1.E+04 1.E+05
DC Open-Loop Gain (dB)
Load Resistance (ΩΩ)
V
DD = 5.5V
VDD = 2.5V
100 1k 10k 100k
70
80
90
100
110
120
0.00 0.05 0.10 0.15 0.20 0.25 0.30
DC Open-Loop Gain (dB)
Output Voltage Headroom (V);
VDD - VOH or VOL - VSS
V
CM = VDD/2
VDD = 2.5V
VDD = 5.5V
0
10
20
30
40
50
60
70
80
90
100
0
1
2
3
4
5
6
7
8
9
10
-50-25 0 255075100125
Phase Margin, G = +1 (°)
Gain Bandwidth Product (MHz)
Ambient Temperature (°C)
PM, V
DD
= 5.5V
GBWP, V
DD
= 2.5V
PM, V
DD
= 2.5V
GBWP, V
DD
= 5.5V
90
95
100
105
110
115
120
-50-250 255075100125
DC Open-Loop Gain (dB)
Ambient Temperature (°C)
V
DD = 5.5V
VDD = 2.5V
0
15
30
45
60
75
90
105
0
2
4
6
8
10
12
14
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
Phase Margin, G = +1 (°)
Gain Bandwidth Product (MHz)
Common Mode Input Voltage (V)
Gain Bandwidth Product
Phase Margin, G = +1
V
DD = 5.0V
0
15
30
45
60
75
90
105
0
2
4
6
8
10
12
14
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
Phase Margin, G = +1 (°)
Gain Bandwidth Product (MHz)
Output Voltage (V)
Gain Bandwidth Product
Phase Margin, G = +1
V
DD = 5.0V
VCM = VDD/2
2001-2017 Microchip Technology Inc. DS20001685E-page 11
MCP6021/1R/2/3/4
Note: Unless otherwise indicated, T
A
= +25°C, V
DD
= +2.5V to +5.5V, V
SS
= GND, V
CM
= V
DD
/2, V
OUT
V
DD
/2,
R
L
=10kto V
DD
/2 and C
L
=60 pF.
FIGURE 2-25: Slew Rate vs. Temperature.
FIGURE 2-26: Total Harmonic Distortion
plus Noise vs. Output Voltage with f = 1 kHz.
FIGURE 2-27: The MCP6021 /1R/ 2/3/4
Family Shows No Phase Reversal Under
Overdrive.
FIGURE 2-28: Maximum Output Voltage
Swing vs. Frequency.
FIGURE 2-29: Total Harmonic Distortion
plus Noise vs. Output V olt age with f = 20 kHz.
FIGURE 2-30: Channel-to-Channel
Separation vs. Frequency (MCP6022 and
MCP6024 only).
0
1
2
3
4
5
6
7
8
9
10
11
-50-25 0 255075100125
Slew Rate (V/µs)
Ambient Temperature (°C)
Falling, V
DD = 5.5V
Rising, VDD = 5.5V
Falling, VDD = 2.5V
Rising, VDD = 2.5V
0.0001%
0.0010%
0.0100%
0.1000%
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
THD+N (%)
Output Voltage (V
P-P
)
f = 1 kHz
BW
Meas = 22 kHz
VDD = 5.0V
G = +1 V/V
G = +10 V/V
G = +100 V/V
-1
0
1
2
3
4
5
6
0 102030405060708090100
Input, Output Voltage (V)
Time (10 µs/div)
V
DD = 5.0V
G = +2 V/V
VIN
VOUT
0.1
1
10
1.E+04 1.E+05 1.E+06 1.E+07
Maximum Output Voltage
Swing (V
P-P
)
Frequency (Hz)
V
DD = 5.5V
10k 100k 1M 10M
V
DD = 2.5V
0.0001%
0.0010%
0.0100%
0.1000%
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
THD+N (%)
Output Voltage (V
P-P
)
G = +10 V/V
f = 20 kHz
BW
Meas = 80 kHz
VDD = 5.0V
G = +1 V/V
G = +100 V/V
105
110
115
120
125
130
135
1.E+03 1.E+04 1.E+05 1.E+06
Channel-to-Channel Separation
(dB)
Frequency (Hz)
1k 1M100k10k
G = +1 V/V
MCP6021/1R/2/3/4
DS20001685E-page 12 2001-2017 Microchip Technology Inc.
Note: Unless otherwise indicated, T
A
= +25°C, V
DD
= +2.5V to +5.5V, V
SS
= GND, V
CM
= V
DD
/2, V
OUT
V
DD
/2,
R
L
=10kto V
DD
/2 and C
L
=60 pF.
FIGURE 2-31: Output Voltage Headroom
vs. Output Current.
FIGURE 2-32: Small Signal Non-Inverting
Pulse Response.
FIGURE 2-33: Large Signal Non-Inverting
Pulse Response.
FIGURE 2-34: Output Voltage Headroom
vs. Temperature.
FIGURE 2-35: Small Signal Inverting Pulse
Response.
FIGURE 2-36: Large Signal Inverting Pulse
Response.
1
10
100
1,000
0.01 0.1 1 10
Output Voltage Headroom;
V
DD
– V
OH
or V
OL
– V
SS
(mV)
Output Current Magnitude (mA)
V
DD – VOH
VOL – VSS
-6.E-02
-5.E-02
-4.E-02
-3.E-02
-2.E-02
-1.E-02
0.E+00
1.E-02
2.E-02
3.E-02
4.E-02
5.E-02
6.E-02
0.E+00 2.E-07 4.E-07 6.E-07 8.E-07 1.E-06 1.E-06 1.E-06 2.E-06 2.E-0 6 2.E-06
Output Voltage (10 mV/div)
Time (200 ns/div)
G = +1 V/V
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
0.E+00 5.E-07 1.E-06 2.E-06 2.E-06 3.E-06 3.E-06 4.E-06 4.E-06 5.E-0 6 5.E-06
Output Voltage (V)
Time (500 ns/div)
G = +1 V/V
0
1
2
3
4
5
6
7
8
9
10
-50-25 0 255075100125
Output Voltage Headroom
V
DD
– V
OH
or V
OL
– V
SS
(mV)
Ambient Temperature (°C)
V
DD – VOH
VOL – VSS
-6.E-02
-5.E-02
-4.E-02
-3.E-02
-2.E-02
-1.E-02
0.E+00
1.E-02
2.E-02
3.E-02
4.E-02
5.E-02
6.E-02
0.E+00 2.E-07 4.E-07 6.E-07 8.E-07 1.E-06 1.E-06 1.E-06 2.E-06 2.E-0 6 2.E-06
Output Voltage (10 mV/div)
Time (200 ns/div)
G = -1 V/V
R
F= 1 kΩ
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
0.E+00 5.E-07 1.E-06 2.E-06 2.E-06 3.E-06 3.E-06 4.E-06 4.E-06 5.E-0 6 5.E-06
Output Voltage (V)
Time (500 ns/div)
G = -1 V/V
R
F= 1 kΩ
2001-2017 Microchip Technology Inc. DS20001685E-page 13
MCP6021/1R/2/3/4
Note: Unless otherwise indicated, T
A
= +25°C, V
DD
= +2.5V to +5.5V, V
SS
= GND, V
CM
= V
DD
/2, V
OUT
V
DD
/2,
R
L
=10kto V
DD
/2 and C
L
=60 pF.
FIGURE 2-37: V
REF
Accuracy vs. Supply
Voltage (MCP6021 and MCP6023 only).
FIGURE 2-38: Chip Select (CS) Hysteresis
(MCP6023 only) with V
DD
= 2.5V.
FIGURE 2-39: Chip Select (CS) to
Amplifier Output Response Time (MCP6023
Only).
FIGURE 2-40: V
REF
Accura cy vs.
Temperature (MCP6021 and MCP6023 only).
FIGURE 2-41: Chip Select (CS) Hysteresis
(MCP6023 only) with V
DD
= 5.5V.
FIGURE 2-42: Measured Input Current vs.
Input Voltage (Below V
SS
)
-50
-40
-30
-20
-10
0
10
20
30
40
50
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
V
REF
Accuracy;
V
REF
–V
DD
/2 (mV)
Power Supply Voltage (V)
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
0.0 0.5 1.0 1.5 2.0 2.5
Quiescent Current
(mA/amplifier)
Chip Select Voltage (V)
Op Amp
shuts off here
Op Amp
turns on here
Hysteresis
V
DD = 2.5V
G = +1 V/V
VIN = 1.25V
CS swept
low to high
CS swept
high to low
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
0.0E+00 5.0E-06 1.0E-05 1.5E -05 2.0E-05 2.5E-05 3.0E -05 3.5E-05
Chip Select Voltage,
Output Voltage (V)
Time (5 µs/div)
Output High-Z
V
DD = 5.0V
G = +1 V/V
VIN = VSS
Output
on
Output
on
VOUT
CS Voltage
-50
-40
-30
-20
-10
0
10
20
30
40
50
-50-25 0 255075100125
V
REF
Accuracy;
V
REF
–V
DD
/2 (mV)
Ambient Temperature (°C)
V
DD = 5.5V
VDD = 2.5V
Representative Part
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Quiescent Current
(mA/amplifier)
Chip Select Voltage (V)
Op Amp
shuts off here
Op Amp
turns on here
Hysteresis
CS swept
high to low CS swept
low to high
V
DD = 5.5V
G = +1 V/V
VIN = 2.75V
1.E-12
1.E-11
1.E-10
1.E-09
1.E-08
1.E-07
1.E-06
1.E-05
1.E-04
1.E-03
1.E-02
-1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0
Input Current Magnitude (A)
Input Voltage (V)
+125°C
+85°C
+25°C
-40°C
10m
1m
100µ
10µ
1µ
100n
10n
1n
100p
10p
1p
MCP6021/1R/2/3/4
DS20001685E-page 14 2001-2017 Microchip Technology Inc.
NOTES:
2001-2017 Microchip Technology Inc. DS20001685E-page 15
MCP6021/1R/2/3/4
3.0 PIN DESCRIPTIONS
Descriptions of the pins are listed in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLE
3.1 Analog Outputs
The operational amplifier output pins are low-impedance
voltage sources.
3.2 Analog Inputs
The operational amplifier non-inverting and inverting
inputs are high-impedance CMOS inputs with low bias
currents.
3.3 Reference Voltage (VREF)
MCP6021 and MCP6023
Mid-supply reference voltage is provided by the single
operational amplifiers (except in the SOT-23-5
package). This is an unbuffered, resistor voltage divider
internal to the part.
3.4 Chip Select Digital Input (CS)
This is a CMOS, Schmitt triggered input that places the
part into a Low-Power mode of operation.
3.5 Power Supply (VSS and VDD)
The positive power supply pin (V
DD
) is 2.5V to 5.5V
higher than the negative power supply pin (V
SS
). For
normal operation, the other pins are at voltages
between V
SS
and V
DD
.
Typically, these parts are used in a single (positive)
supply configuration. In this case, V
SS
is connected to
ground and V
DD
is connected to the supply. V
DD
will
need a bypass capacitor.
MCP6021 MCP6021 MCP6022 MCP6023 MCP6024
Symbol Description
PDIP, SOIC,
MSOP,
TSSOP
(1)
SOT-23-5 SOT-23-5
(2)
PDIP, SOIC,
TSSOP
PDIP, SOIC,
TSSOP
PDIP, SOIC,
TSSOP
61 1161V
OUT
,V
OUTA
Analog Output (Op Amp A)
24 4222V
IN
-, V
INA
- Inverting Input (Op Amp A)
33 3333V
IN
+, V
INA
+ Non-Inverting Input (Op Amp A)
75 2874V
DD
Positive Power Supply
—— — 5—5V
INB
+ Non-Inverting Input (Op Amp B)
—— — 6—6V
INB
– Inverting Input (Op Amp B)
—— — 7—7V
OUTB
Analog Output (Op Amp B)
—— ———8V
OUTC
Analog Output (Op Amp C)
—— ———9V
INC
– Inverting Input (Op Amp C)
—— ———10V
INC
+ Non-Inverting Input (Op Amp C)
42 54411V
SS
Negative Power Supply
—— ———12V
IND
+ Non-Inverting Input (Op Amp D)
—— ———13V
IND
– Inverting Input (Op Amp D)
—— ———14V
OUTD
Analog Output (Op Amp D)
5———5—V
REF
Reference Voltage
—— ——8—CS
Chip Select
1, 8 — — — 1 — NC No Internal Connection
Note 1: The MCP6021 in the 8-pin TSSOP package is only available for I-temp (Industrial Temperature) parts.
2: The MCP6021R is only available in the 5-pin SOT-23 package and for E-temp (Extended Temperature) parts.
MCP6021/1R/2/3/4
DS20001685E-page 16 2001-2017 Microchip Technology Inc.
NOTES:
2001-2017 Microchip Technology Inc. DS20001685E-page 17
MCP6021/1R/2/3/4
4.0 APPLI CATIONS INFORMATION
The MCP6021/1R/2/3/4 family of operational amplifiers
is fabricated on Microchip’s state-of-the-art CMOS
process. The amplifiers are unity-gain stable and suitable
for a wide range of general purpose applications.
4.1 Rail-to-Rail Input
4.1.1 PHASE REVERSAL
The MCP6021/1R/2/3/4 operational amplifiers are
designed to prevent phase reversal when the input pins
exceed the supply voltages. Figure 2-42 shows the
input voltage exceeding the supply voltage without any
phase reversal.
4.1.2 INPUT VOLTAGE LIMITS
In order to prevent damage and/or improper operation
of these amplifiers, the circuit must limit the voltages at
the input pins. See the Absolute Maximum Ratings†
section.
The ESD protection on the inputs can be depicted as
shown in Figure 4-1. This structure was chosen to
protect the input transistors and to minimize Input Bias
(I
B
) current.
FIGURE 4-1: Simplified Analog Input ESD
Structures.
The input ESD diodes clamp the inputs when they try
to go more than one diode drop below V
SS
. They also
clamp any voltages that go well above V
DD
. Their
breakdown voltage is high enough to allow normal
operation, but not low enough to protect against slow
overvoltage (beyond V
DD
) events. Very fast ESD
events (that meet the specifications) are limited so that
damage does not occur. In some applications, it may
be necessary to prevent excessive voltages from
reaching the operational amplifier inputs. Figure 4-2
shows one approach to protecting these inputs.
A significant amount of current can flow out of the
inputs when the Common-Mode Voltage (V
CM
) is below
ground (V
SS
). See Figure 2-42.
FIGURE 4-2: Protecting the Analog Inputs.
4.1.3 INPUT CURRENT LIMITS
In order to prevent damage and/or improper operation
of these amplifiers, the circuit must limit the voltages at
the input pins. See the Absolute Maximum Ratings†
section. Figure 4-3 shows one approach to protecting
these inputs. The resistors, R
1
and R
2
, limit the pos-
sible currents in or out of the input pins (and the ESD
diodes, D
1
and D
2
). The diode currents will go through
either V
DD
or V
SS
.
FIGURE 4-3: Protecting the Analog Inputs.
4.1.4 NORMAL OPERATION
The input stage of the MCP6021/1R/2/3/4 operational
amplifiers uses two differential CMOS input stages in
parallel. One operates at a low Common-Mode Voltage
(V
CM
) input, while the other operates at high V
CM
. With
this topology, the device operates with V
CM
up to 0.3V
above V
DD
and 0.3V below V
SS
.
4.2 Rail-to-Rail Output
The maximum output voltage swing is the maximum
swing possible under a particular output load. According
to the specification table, the output can reach within
20 mV of either supply rail when R
L
= 10 k. See
Figure 2-31 and Figure 2-34 for more information
concerning typical performance.
Bond
Pad
VIN
Bond
Pad
Bond
Pad
Bond
Pad
Input
Stage
VDD
VIN+
VSS
V
1
V
DD
D
1
V
2
D
2
MCP602X V
OUT
U
1
V
1
R
1
V
DD
D
1
min(R
1
,R
2
)>V
SS
–min (V
1
,V
2
)
2mA
min(R
1
,R
2
)>max(V
1
,V
2
)–V
DD
2mA
V
2
R
2
D
2
MCP602X V
OUT
U
1
MCP6021/1R/2/3/4
DS20001685E-page 18 2001-2017 Microchip Technology Inc.
4.3 Capacitive Loads
Driving large capacitive loads can cause stability
problems for voltage feedback operational amplifiers.
As the load capacitance increases, the feedback loop’s
phase margin decreases and the closed loop
bandwidth is reduced. This produces gain peaking in
the frequency response, with overshoot and ringing in
the step response.
When driving large capacitive loads with these opera-
tional amplifiers (e.g., > 60 pF when G = +1), a small
series resistor at the output (R
ISO
in Figure 4-4)
improves the feedback loop’s phase margin (stability)
by making the load resistive at higher frequencies. The
bandwidth will be generally lower than the bandwidth
with no capacitive load.
FIGURE 4-4: Output Resistor, R
ISO
,
S tabilizes Large Capacitive Loads.
Figure 4-5 gives recommended R
ISO
values for
different capacitive loads and gains. The x-axis is the
normalized load capacitance (C
L
/G
N
), where G
N
is the
circuit’s noise gain. For non-inverting gains, G
N
and the
Signal Gain are equal. For inverting gains, G
N
is
1+|Signal Gain| (e.g., -1 V/V gives G
N
= +2 V/V).
FIGURE 4-5: Recommended R
ISO
Values
for Capacitive Loads.
After selecting R
ISO
for your circuit, double-check the
resulting frequency response peaking and step
response overshoot. Modify R
ISO
’s value until the
response is reasonable. Evaluation on the bench and
simulations with the MCP6021/1R/2/3/4 Spice macro
model are helpful.
4.4 Gain Peaking
Figure 2-35 and Figure 2-36 use R
F
= 1 k to avoid
(frequency response) gain peaking and (step response)
overshoot. The capacitance to ground at the inverting
input (C
G
) is the op amp’s Common-mode input capaci-
tance plus board parasitic capacitance. C
G
is in parallel
with R
G
, which causes an increase in gain at high frequen-
cies for non-inverting gains greater than 1 V/V (unity
gain). C
G
also reduces the phase margin of the feedback
loop for both non-inverting and inverting gains.
FIGURE 4-6: Non-Inverting Gain Circuit
with Parasitic Capacitance.
The largest value of R
F
in Figure 4-6 that should be
used is a function of noise gain (see G
N
in Section 4.3
“Cap acitive Loads”) and C
G
. Figure 4-7 shows results
for various conditions. Other compensation techniques
may be used, but they tend to be more complicated to
design.
FIGURE 4-7: Non-Inverting Gain Circuit
with Parasitic Capacitance.
4.5 MCP6023 Chip Select (CS)
The MCP6023 is a single amplifier with Chip Select
(CS). When CS is pulled high, the supply current drops
to 10 nA (typical) and flows through the CS pin to V
SS
.
When this happens, the amplifier output is put into a
high-impedance state. By pulling CS low, the amplifier
is enabled. The CS pin has an internal 5 MΩ (typical)
pull-down resistor connected to V
SS
, so it will go low if
the CS pin is left floating. Figure 1-1 and Figure 2-39
show the output voltage and supply current response to
a CS pulse.
V
IN
MCP602X
R
ISO
V
OUT
C
L
10
100
1,000
10 100 1,000 10,000
Recommended R
ISO (
Ω
)
Normalized Capacitance; CL/GN(pF)
G
N
≥+1
V
IN
R
G
R
F
V
OUT
C
G
1.E+02
1.E+03
1.E+04
1.E+05
110
Maximum R
F
(W)
Noise Gain; GN(V/V)
G
N> +1 V/V
100
1k
10k
100k
C
G= 7 pF
CG= 20 pF
CG= 50 pF
CG= 100 pF
2001-2017 Microchip Technology Inc. DS20001685E-page 19
MCP6021/1R/2/3/4
4.6 MCP6021 and MCP6023 Reference
Voltage
The single operational amplifiers (MCP6021 and
MCP6023), not in the SOT-23-5 package, have an
internal mid-supply reference voltage connected to the
V
REF
pin (see Figure 4-8). The MCP6021 has CS inter-
nally tied to V
SS
, which always keeps the operational
amplifier on and always provides a mid-supply refer-
ence. With the MCP6023, taking the CS pin high
conserves power by shutting down both the operational
amplifier and the V
REF
circuitry. Taking the CS pin low
turns on the operational amplifier and V
REF
circuitry.
FIGURE 4-8: Simplified Internal V
REF
Circuit (MCP6021 and MCP6023 only).
See Figure 4-9 for a non-inverting gain circuit using the
internal mid-supply reference. The DC Blocking
Capacitor (C
B
) also reduces noise by coupling the
operational amplifier input to the source.
FIGURE 4-9: Non-Inverting Gain Circuit
Using V
REF
(MCP6021 and MCP6023 only).
To use the internal mid-supply reference for an
inverting gain circuit, connect the V
REF
pin to the
non-inverting input, as shown in Figure 4-10. The
capacitor, C
B
, helps reduce power supply noise on the
output.
FIGURE 4-10: Inverting Gain Circuit Using
V
REF
(MCP6021 and MCP6023 only).
If you don’t need the mid-supply reference, leave the
V
REF
pin open.
4.7 Supply Bypass
With this family of operational amplifiers, the power
supply pin (V
DD
for single supply) should have a local
bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm
for good, high-frequency performance. It also needs a
bulk capacitor (i.e., 1 µF or larger) within 100 mm to
provide large, slow currents. This bulk capacitor can be
shared with nearby analog parts.
4.8 Unused Operational Amplifiers
An unused operational amplifier in a quad package
(MCP6024) should be configured as shown in
Figure 4-11. These circuits prevent the output from tog-
gling and causing crosstalk. Circuit A sets the opera-
tional amplifier at its minimum noise gain. The resistor
divider produces any desired reference voltage within
the output voltage range of the operational amplifier.
The operational amplifier buffers that reference
voltage. Circuit B uses the minimum number of compo-
nents and operates as a comparator, but it may draw
more current.
FIGURE 4-11: Unused Operatio nal
Amplifiers.
V
DD
V
SS
V
REF
CS
50 k
50 k
(CS tied internally to V
SS
for MCP6021)
5M
V
IN
R
G
R
F
V
OUT
C
B
V
REF
V
IN
R
G
R
F
V
OUT
V
REF
C
B
V
DD
V
DD
¼ MCP6024 (A) ¼ MCP6024 (B)
R
1
R
2
V
DD
V
REF
VREF VDD
R2
R1R2
+
--------------------+=
MCP6021/1R/2/3/4
DS20001685E-page 20 2001-2017 Microchip Technology Inc.
4.9 PCB Surface Leakage
In applications where low input bias current is critical,
PCB (Printed Circuit Board) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 10
12
. A 5V difference would
cause 5 pA of current to flow, which is greater than the
MCP6021/1R/2/3/4 family’s bias current at +25°C
(1 pA, typical).
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
Figure 4-12 shows an example of this type of layout.
FIGURE 4-12: Exam pl e G uar d Ri ng La yo ut .
1. Non-Inverting Gain and Unity Gain Buffer.
a) Connect the guard ring to the inverting input
pin (V
IN
-); this biases the guard ring to the
Common-mode input voltage.
b) Connect the non-inverting pin (V
IN
+) to the
input with a wire that does not touch the
PCB surface.
2. Inverting (Figure 4-12) and Transimpedance Gain
Amplifiers (convert current to voltage, such as
photo detectors).
a) Connect the guard ring to the non-inverting
input pin (V
IN
+). This biases the guard ring
to the same reference voltage as the
operational amplifier’s input (e.g., V
DD
/2 or
ground).
b) Connect the inverting pin (V
IN
-) to the input
with a wire that does not touch the PCB
surface.
4.10 High-Speed PCB Layout
Due to their speed capabilities, a little extra care in the
PCB (Printed Circuit Board) layout can make a signifi-
cant difference in the performance of these operational
amplifiers. Good PC board layout techniques will help
you achieve the performance shown in Section 1.0
“Electrical Characteristics” and Section 2.0 “Typical
Performance Curves”, while also helping you minimize
EMC (Electro-Magnetic Compatibility) issues.
Use a solid ground plane and connect the bypass local
capacitor(s) to this plane with minimal length traces.
This cuts down inductive and capacitive crosstalk.
Separate digital from analog, low speed from high
speed and low power from high power. This will reduce
interference.
Keep sensitive traces short and straight. Separate
them from interfering components and traces. This is
especially important for high-frequency (low rise time)
signals.
Sometimes it helps to place guard traces next to victim
traces. They should be on both sides of the victim trace
and as close as possible. Connect the guard trace to
the ground plane at both ends and in the middle for long
traces.
Use coax cables (or low-inductance wiring) to route
signal and power to and from the PCB.
4.11 Typical Applications
4.11.1 A/D CONVERTER DRIVER AND
ANTI-ALIASING FILTER
Figure 4-13 shows a third-order Butterworth filter that
can be used as an A/D Converter driver. It has a band-
width of 20 kHz and a reasonable step response. It will
work well for conversion rates of 80 ksps and greater (it
has 29 dB attenuation at 60 kHz).
FIGURE 4-13: A/D Converter Driver and
Anti-Aliasing Filter with a 20 kHz Cutoff
Frequency.
This filter can easily be adjusted to another bandwidth
by multiplying all capacitors by the same factor.
Alternatively, the resistors can all be scaled by another
common factor to adjust the bandwidth.
Guard Ring V
IN
-V
IN
+
14.7 k33.2 k
1.0 nF
100 pF
MCP602X
8.45 k
1.2 nF
2001-2017 Microchip Technology Inc. DS20001685E-page 21
MCP6021/1R/2/3/4
4.11.2 OPTICAL DETECTOR AMPLIFIER
Figure 4-14 shows the MCP6021 operational amplifier
used as a transimpedance amplifier in a photo detector
circuit. The photo detector looks like a capacitive
current source, so the 100 k resistor gains the input
signal to a reasonable level. The 5.6 pF capacitor
stabilizes this circuit and produces a flat frequency
response with a bandwidth of 370 kHz.
FIGURE 4-14: Transimpedance Amplifier
for an Optical Detector.
Photo
Detector
100 pF
5.6 pF
100 k
V
DD
/2
MCP6021
MCP6021/1R/2/3/4
DS20001685E-page 22 2001-2017 Microchip Technology Inc.
NOTES:
2001-2017 Microchip Technology Inc. DS20001685E-page 23
MCP6021/1R/2/3/4
5.0 DE SIGN AIDS
Microchip provides the basic design tools needed for
the MCP6021/1R/2/3/4 family of operational amplifiers.
5.1 SPICE Macro Model
The latest SPICE macro model available for the
MCP6021/1R/2/3/4 operational amplifiers is on
Microchip’s web site at www.microchip.com. This
model is intended as an initial design tool that works
well in the operational amplifier’s linear region of oper-
ation at room temperature. There is information on its
capabilities within the macro model file.
Bench testing is a very important part of any design and
cannot be replaced with simulations. Also, simulation
results using this macro model need to be validated by
comparing them to the data sheet specifications and
characteristic curves.
5.2 FilterLab
® Software
Microchip’s FilterLab
®
software is an innovative software
tool that simplifies analog active filter (using operational
amplifiers) design. Available at no cost from the
Microchip web site at www.microchip.com/filterlab, the
FilterLab design tool provides full schematic diagrams of
the filter circuit with component values. It also outputs
the filter circuit in SPICE format, which can be used with
the macro model to simulate actual filter performance.
5.3 MPLAB
® Mindi™ Analog
Simulator
Microchip’s Mindi™ circuit designer and simulator aids
in the design of various circuits useful for active filter,
amplifier and power management applications. It is a
free online circuit designer and simulator available from
the Microchip web site at www.microchip.com/mindi.
This interactive circuit designer and simulator enables
designers to quickly generate circuit diagrams and
simulate circuits. Circuits developed using the MPLAB
Mindi
analog simulator can be downloaded to a
personal computer or workstation.
5.4 Microchip Advanced Part Selector
(MAPS)
MAPS is a software tool that helps semiconductor pro-
fessionals efficiently identify Microchip devices that fit a
particular design requirement. Available at no cost from
the Microchip web site at www.microchip.com/maps,
the MAPS is an overall selection tool for Microchip’s
product portfolio, that includes analog, memory, MCUs
and DSCs. Using this tool you can define a filter to sort
features for a parametric search of devices and export
side-by-side technical comparison reports. Helpful links
are also provided for data sheets, purchasing and
sampling of Microchip parts.
5.5 Analog Demonstration and
Evaluation Boards
Microchip offers a broad spectrum of analog demon-
stration and evaluation boards that are designed to
help you achieve faster time to market. For a complete
listing of these boards, and their corresponding user’s
guides and technical information, visit the Microchip
web site at www.microchip.com/analogtools.
Some boards that are especially useful are:
• MCP6XXX Amplifier Evaluation Board 1
• MCP6XXX Amplifier Evaluation Board 2
• MCP6XXX Amplifier Evaluation Board 3
• MCP6XXX Amplifier Evaluation Board 4
• Active Filter Demo Board Kit
•8-Pin SOIC/MSOP/TSSOP/DIP Evaluation Board,
P/N: SOIC8EV
•14-Pin SOIC/TSSOP/DIP Evaluation Board,
P/N: SOIC14EV
5.6 Application Notes
The following Microchip Application Notes are
available on the Microchip web site at www.microchip.
com/appnotes and are recommended as supplemental
reference resources.
• ADN003, “Select the Right Opera tio nal Amplifie r
for your Filtering Circuits” (DS21821)
•AN722, “Operational A mplifier Topologies an d DC
Specifications” (DS00722)
•AN723, “Operational A mp lif ier AC Spec if ications
and Applications” (DS00723)
•AN884, “Driving Capa citive Load s With O p Amps”
(DS00884)
•AN990, “Analog Sensor Conditio ni ng Circu it s –
An Overview” (DS00990)
• AN1177, “Op Amp Precision Design: DC Error s ”
(DS01177)
• AN1228, “Op Amp Precision Design: Random
Noise” (DS01228)
These application notes and others are listed in the
design guide: “Signal Chain Design Guide” (DS21825).
MCP6021/1R/2/3/4
DS20001685E-page 24 2001-2017 Microchip Technology Inc.
NOTES:
2001-2017 Microchip Technology Inc. DS20001685E-page 25
MCP6021/1R/2/3/4
6.0 PACKAGING INFORMATION
6.1 Package Marking Information
8-Lead PDIP (300 mil) Example:
8-Lead SOIC (150 mil) Example:
5-Lead SOT-23 (MCP6021/MCP6021R) Example:
Legend: XX...X Customer-specific information
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Pb-free JEDEC
®
designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
3
e
3
e
EY25
Device E-Temp Code
MCP6021 EYNN
MCP6021R EZNN
Note: Applies to 5-Lead SOT-23.
OR
OR
3
e
MCP6021
I/SN1603
256
MCP6021
I/P256
1603
3
e
MCP6021
E/P 256
1603
MCP6021E
SN 1603
256
MCP6021/1R/2/3/4
DS20001685E-page 26 2001-2017 Microchip Technology Inc.
Package Marking Information (Continued)
8-Lead TSSOP Example:
8-Lead MSOP Example:
6021E
903256
6021
E903
256
14-Lead PDIP (300 mil) (MCP6024) Example:
MCP6024-I/P
0903256
OR
MCP6024-E/P
0903256
3
e
2001-2017 Microchip Technology Inc. DS20001685E-page 27
MCP6021/1R/2/3/4
Package Marking Information (Continued)
14-Lead TSSOP (MCP6024) Example:
14-Lead SOIC (150 mil) (MCP6024) Example:
MCP6024-I/SL
1603256
OR
MCP6024
E/SL
1603256
3
e
6024E
1603
256
MCP6021/1R/2/3/4
DS20001685E-page 28 2001-2017 Microchip Technology Inc.
0.15 C D
2X
NOTE 1 12
N
TOP VIEW
SIDE VIEW
Microchip Technology Drawing C04-028D [OT] Sheet 1 of
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
0.20 C
C
SEATING PLANE
AA2
A1
e
NX bB
0.20 C A-B D
e1
D
E1
E1/2
E/2
E
D
A
0.20 C2X
(DATUM D)
(DATUM A-B)
A
A
SEE SHEET 2
5-Lead Plastic Small Outline Transistor (OT) [SOT23]
2001-2017 Microchip Technology Inc. DS20001685E-page 29
MCP6021/1R/2/3/4
Microchip Technology Drawing C04-091D [OT] Sheet 2 of
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
c
L
L1
T
VIEW A-A
SHEET 1
5-Lead Plastic Small Outline Transistor (OT) [SOT23]
protrusions shall not exceed 0.25mm per side.
1.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
2.
Foot Angle
Number of Pins
Pitch
Outside lead pitch
Overall Height
Molded Package Thickness
Standoff
Overall Width
Molded Package Width
Overall Length
Foot Length
Footprint
Lead Thickness
Lead Width
Notes:
L1
I
b
c
Dimension Limits
E
E1
D
L
e1
A
A2
A1
Units
N
e
0°
0.08
0.20 -
-
-
10°
0.26
0.51
MILLIMETERS
0.95 BSC
1.90 BSC
0.30
0.90
0.89
-
0.60 REF
2.90 BSC
-
2.80 BSC
1.60 BSC
-
-
-
MIN
6
NOM
1.45
1.30
0.15
0.60
MAX
REF: Reference Dimension, usually without tolerance, for information purposes only.
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or
Dimensioning and tolerancing per ASME Y14.5M
MCP6021/1R/2/3/4
DS20001685E-page 30 2001-2017 Microchip Technology Inc.
RECOMMENDED LAND PATTERN
5-Lead Plastic Small Outline Transistor (OT) [SOT23]
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
Microchip Technology Drawing No. C04-2091A [OT]
Dimension Limits
Contact Pad Length (X5)
Overall Width
Distance Between Pads
Contact Pad Width (X5)
Contact Pitch
Contact Pad Spacing
3.90
1.10
G
Z
Y
1.70
0.60
MAXMIN
C
X
E
Units
NOM
0.95 BSC
2.80
MILLIMETERS
Distance Between Pads GX 0.35
1
5
X
Y
ZC
E
GX
G
2
SILK SCREEN
2001-2017 Microchip Technology Inc. DS20001685E-page 31
MCP6021/1R/2/3/4
B
A
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
Microchip Technology Drawing No. C04-018D Sheet 1 of 2
8-Lead Plastic Dual In-Line (P) - 300 mil Body [PDIP]
eB
E
A
A1
A2
L
8X b
8X b1
D
E1
c
C
PLANE
.010 C
12
N
NOTE 1
TOP VIEW
END VIEWSIDE VIEW
e
MCP6021/1R/2/3/4
DS20001685E-page 32 2001-2017 Microchip Technology Inc.
Microchip Technology Drawing No. C04-018D Sheet 2 of 2
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
8-Lead Plastic Dual In-Line (P) - 300 mil Body [PDIP]
Units INCHES
Dimension Limits MIN NOM MAX
Number of Pins N 8
Pitch e.100 BSC
Top to Seating Plane A - - .210
Molded Package Thickness A2 .115 .130 .195
Base to Seating Plane A1 .015
Shoulder to Shoulder Width E .290 .310 .325
Molded Package Width E1 .240 .250 .280
Overall Length D .348 .365 .400
Tip to Seating Plane L .115 .130 .150
Lead Thickness c.008 .010 .015
Upper Lead Width b1 .040 .060 .070
Lower Lead Width b.014 .018 .022
Overall Row Spacing eB - - .430
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
3.
1.
protrusions shall not exceed .010" per side.
2.
4.
Notes:
§
--
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or
Pin 1 visual index feature may vary, but must be located within the hatched area.
§ Significant Characteristic
Dimensioning and tolerancing per ASME Y14.5M
e
DATUM A DATUM A
e
b
e
2
b
e
2
ALTERNATE LEAD DESIGN
(VENDOR DEPENDENT)
2001-2017 Microchip Technology Inc. DS20001685E-page 33
MCP6021/1R/2/3/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
MCP6021/1R/2/3/4
DS20001685E-page 34 2001-2017 Microchip Technology Inc.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2001-2017 Microchip Technology Inc. DS20001685E-page 35
MCP6021/1R/2/3/4
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DS20001685E-page 36 2001-2017 Microchip Technology Inc.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2001-2017 Microchip Technology Inc. DS20001685E-page 37
MCP6021/1R/2/3/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
MCP6021/1R/2/3/4
DS20001685E-page 38 2001-2017 Microchip Technology Inc.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2001-2017 Microchip Technology Inc. DS20001685E-page 39
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MCP6021/1R/2/3/4
DS20001685E-page 40 2001-2017 Microchip Technology Inc.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2001-2017 Microchip Technology Inc. DS20001685E-page 41
MCP6021/1R/2/3/4
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N
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L
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MCP6021/1R/2/3/4
DS20001685E-page 42 2001-2017 Microchip Technology Inc.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2001-2017 Microchip Technology Inc. DS20001685E-page 43
MCP6021/1R/2/3/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
MCP6021/1R/2/3/4
DS20001685E-page 44 2001-2017 Microchip Technology Inc.
& !"#$%&"'""($)%
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2001-2017 Microchip Technology Inc. DS20001685E-page 45
MCP6021/1R/2/3/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
MCP6021/1R/2/3/4
DS20001685E-page 46 2001-2017 Microchip Technology Inc.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2001-2017 Microchip Technology Inc. DS20001685E-page 47
MCP6021/1R/2/3/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
MCP6021/1R/2/3/4
DS20001685E-page 48 2001-2017 Microchip Technology Inc.
NOTES:
2001-2017 Microchip Technology Inc. DS20001685E-page 49
MCP6021/1R/2/3/4
APPENDIX A: REVISION HISTORY
Revision E (January 2017)
The following is the list of modifications:
1. Updated the AC Electrical Characteristics table.
2. Added Section 4.1.2, Input Voltage Limits and
Section 4.1.3, Input Current Limits.
3. Added package information for 8-pin TSSOP.
4. Various typographical edits.
Revision D (February 2009)
The following is the list of modifications:
1. Changed all references to 6.0V back to 5.5V
throughout document.
2. Design Aids: Name change for Mindi Simulation
Tool.
3. Section 1.0, Electrical Characteristics, Section
“”: Corrected “Maximum Output Voltage Swing”
condition from 0.9V Input Overdrive to 0.5V
Input Overdrive.
4. Section 1.0, Electrical Characteristics, Section
“AC Electrical Characteristics”: Changed
Phase Margin condition from G = +1 to G= +1 V/V.
5. Section 1.0, Electrical Characteristics, Section
“AC Electrical Characteristics”: Changed
Settling Time, 0.2% condition from G = +1 to
G=+1 V/V.
6. Section 1.0, Electrical Characteristics: Added
Section 1.1, Test Circuits
7. Section 5.0, Design Aids: Name change for
Mindi Simulation Tool. Added new boards to
Section 5.5, Analog Demonstration and Evalua-
tion Boards and new application notes to
Section 5.6, Application Notes.
8. Updates Appendix A: “Revision History”
Revision C (December 2005)
The following is the list of modifications:
1. Added SOT-23-5 package option for single op
amps MCP6021 and MCP6021R (E-temp only).
2. Added MSOP-8 package option for E-temp
single op amp (MCP6021).
3. Corrected package drawing on front page for
dual op amp (MCP6022).
4. Clarified spec conditions (I
SC
, PM and THD+N)
in Section 2.0, Typical Performance Curves.
5. Added Section 3.0, Pin Descriptions.
6. Updated Section 4.0, Applications Information
for THD+N, unused op amps, and gain peaking
discussions.
7. Corrected and updated package marking infor-
mation in Section 6.0, Packaging Information.
8. Added Appendix A: “Revision History”.
Revision B (November 2003)
• Second Release of this Document
Revision A (November 2001)
• Original Release of this Document
MCP6021/1R/2/3/4
DS20001685E-page 50 2001-2017 Microchip Technology Inc.
NOTES:
2001-2017 Microchip Technology Inc. DS20001685E-page 51
MCP6021/1R/2/3/4
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office
.
PART NO. X/XX
PackageTemperature
Range
Device
Device: MCP6021 Single Op Amp
MCP6021T Single Op Amp
(Tape and Reel for SOT-23, SOIC, TSSOP,
MSOP)
MCP6021R Single Op Amp
MCP6021RT Single Op Amp
(Tape and Reel for SOT-23)
MCP6022 Dual Op Amp
MCP6022T Dual Op Amp
(Tape and Reel for SOIC and TSSOP)
MCP6023 Single Op Amp w/CS
MCP6023T Single Op Amp w/CS
(Tape and Reel for SOIC and TSSOP)
MCP6024 Quad Op Amp
MCP6024T Quad Op Amp
(Tape and Reel for SOIC and TSSOP)
Tape a nd Reel
Option: Blank = Standard packaging (tube or tray)
T = Tape and Reel(1)
Temperature
Range: I= -40C to +85C (Industrial)
E= -40C to +125C (Extended)
Package: OT = Plastic Small Outline Transistor (SOT-23), 5-Lead
(MCP6021, E-Temp; MCP6021R, E-Temp)
MS = Plastic MSOP, 8-Lead (MCP6021, E-Temp)
P = Plastic DIP (300 mil Body), 8-Lead, 14-Lead
SN = Plastic SOIC (150 mil Body), 8-Lead
SL = Plastic SOIC (150 mil Body), 14-Lead
ST = Plastic TSSOP, 8-Lead (MCP6021, I-Temp; MCP6022,
I-Temp, E-Temp; MCP6023, I-Temp, E-Temp)
ST = Plastic TSSOP, 14-Lead
Examples:
a) MCP6021T-E/OT: Tape and Reel,
Extended temperature,
5LD SOT-23.
b) MCP6021-E/P: Extended temperature,
8LD PDIP.
c) MCP6021-E/SN: Extended temperature,
8LD SOIC.
a)
MCP6021RT-E/OT: Tape and Reel,
Extended temperature,
5LD SOT-23.
a) MCP6022-I/P: Industrial temperature,
8LD PDIP.
b) MCP6022-E/P: Extended temperature,
8LD PDIP.
c) MCP6022T-E/ST: Tape and Reel,
Extended temperature,
8LD TSSOP.
a) MCP6023-I/P: Industrial temperature,
8LD PDIP.
b) MCP6023-E/P: Extended temperature,
8LD PDIP.
c) MCP6023-E/SN: Extended temperature,
8LD SOIC.
a) MCP6024-I/SL: Industrial temperature,
14LD SOIC.
b) MCP6024-E/SL: Extended temperature,
14LD SOIC.
c) MCP6024T-E/ST: Tape and Reel,
Extended temperature,
14LD TSSOP.
Note 1:
Tape and Reel identifier only appears in the
catalog part number description. This identi-
fier is used for ordering purposes and is not
printed on the device package. Check with
your Microchip Sales Office for package
availability with the Tape and Reel option.
[X]
(1)
Tape and Reel
Option
MCP6021/1R/2/3/4
DS20001685E-page 52 2001-2017 Microchip Technology Inc.
NOTES:
2001-2017 Microchip Technology Inc. DS20001685E-page 53
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate, AVR,
AVR logo, AVR Freaks, BeaconThings, BitCloud, CryptoMemory,
CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, K
EE
L
OQ
,
K
EE
L
OQ
logo, Kleer, LANCheck, LINK MD, maXStylus,
maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip
Designer, QTouch, RightTouch, SAM-BA, SpyNIC, SST, SST
Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
and other countries.
ClockWorks, The Embedded Control Solutions Company,
EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS,
mTouch, Precision Edge, and Quiet-Wire are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo,
CodeGuard, CryptoAuthentication, CryptoCompanion,
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, Inter-Chip Connectivity, JitterBlocker,
KleerNet, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF,
MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,
PICtail, PureSilicon, QMatrix, RightTouch logo, REAL ICE, Ripple
Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI,
SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC,
USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and
ZENA are trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
Silicon Storage Technology is a registered trademark of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip Technology
Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2001-2017, Microchip Technology Incorporated, All Rights
Reserved.
ISBN: 978-1-5224-1278-6
Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microch ip rece iv ed ISO/T S -16 94 9:20 09 certifi cat i on for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC
®
MCUs and dsPI C
®
DSCs, KEELOQ
®
code hoppi ng
devices, Serial EEPROMs, microperiph erals, nonvolat ile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
QUALITY MANAGEMENT S
YSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
DS20001685E-page 54 2001-2017 Microchip Technology Inc.
AMERICAS
Corporate Office
2355 West Chandler Blvd.
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Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
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China - Chengdu
Tel: 86-28-8665-5511
Fax: 86-28-8665-7889
China - Chongqing
Tel: 86-23-8980-9588
Fax: 86-23-8980-9500
China - Dongguan
Tel: 86-769-8702-9880
China - Guangzhou
Tel: 86-20-8755-8029
China - Hangzhou
Tel: 86-571-8792-8115
Fax: 86-571-8792-8116
China - Hong Kong SAR
Tel: 852-2943-5100
Fax: 852-2401-3431
China - Nanjing
Tel: 86-25-8473-2460
Fax: 86-25-8473-2470
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
China - Shanghai
Tel: 86-21-3326-8000
Fax: 86-21-3326-8021
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
China - Shenzhen
Tel: 86-755-8864-2200
Fax: 86-755-8203-1760
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
ASIA/PACIFIC
China - Xiamen
Tel: 86-592-2388138
Fax: 86-592-2388130
China - Zhu ha i
Tel: 86-756-3210040
Fax: 86-756-3210049
India - Bangalore
Tel: 91-80-3090-4444
Fax: 91-80-3090-4123
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
India - Pune
Tel: 91-20-3019-1500
Japan - Osaka
Tel: 81-6-6152-7160
Fax: 81-6-6152-9310
Japan - Tokyo
Tel: 81-3-6880- 3770
Fax: 81-3-6880-3771
Korea - Daegu
Tel: 82-53-744-4301
Fax: 82-53-744-4302
Korea - Seoul
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
Malaysia - Kuala Lumpur
Tel: 60-3-6201-9857
Fax: 60-3-6201-9859
Malaysia - Penang
Tel: 60-4-227-8870
Fax: 60-4-227-4068
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
Taiwan - Hsin Chu
Tel: 886-3-5778-366
Fax: 886-3-5770-955
Taiwa n - Ka ohs iung
Tel: 886-7-213-7830
Taiwan - Taipei
Tel: 886-2-2508-8600
Fax: 886-2-2508-0102
Thail a nd - Ba ngk ok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
EUROPE
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
Denmark - Cop e nha ge n
Tel: 45-4450-2828
Fax: 45-4485-2829
Finland - Es poo
Tel: 358-9-4520-820
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
France - Saint Cloud
Tel: 33-1-30-60-70-00
Germany - Garching
Tel: 49-8931-9700
Germany - Haan
Tel: 49-2129-3766400
Germany - Heilbronn
Tel: 49-7131-67-3636
Germany - Karlsruhe
Tel: 49-721-625370
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Germany - Rosenheim
Tel: 49-8031-354-560
Israel - Ra’anana
Tel: 972-9-744-7705
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Italy - Padova
Tel: 39-049-7625286
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Norway - Trondheim
Tel: 47-7289-7561
Poland - Warsaw
Tel: 48-22-3325737
Romania - Bucharest
Tel: 40-21-407-87-50
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
Sweden - Gothenberg
Tel: 46-31-704-60-40
Sweden - Stockholm
Tel: 46-8-5090-4654
UK - Wokingham
Tel: 44-118-921-5800
Fax: 44-118-921-5820
Worldwide Sales and Service
11/07/16