19-2419; Rev 4; 7/05 7.6A, 12ns, SOT23/TDFN, MOSFET Driver Features The MAX5048A/MAX5048B are high-speed MOSFET drivers capable of sinking/sourcing 7.6A/1.3A peak currents. These devices take logic input signals and drive a large external MOSFET. The MAX5048A/MAX5048B have inverting and noninverting inputs that give the user greater flexibility in controlling the MOSFET. They feature two separate outputs working in complementary mode, offering flexibility in controlling both turn-on and turn-off switching speeds. The MAX5048A/MAX5048B have internal logic circuitry, which prevents shoot-through during output state changes. The logic inputs are protected against voltage spikes up to +14V, regardless of V+ voltage. Propagation delay time is minimized and matched between the inverting and noninverting inputs. The MAX5048A/MAX5048B have very fast switching times combined with very short propagation delays (12ns typ), making them ideal for high-frequency circuits. Independent Source-and-Sink Outputs for Controllable Rise and Fall Times The MAX5048A/MAX5048B operate from a +4V to +12.6V single power supply and typically consume 0.95mA of supply current. The MAX5048A has CMOS input logic levels, while the MAX5048B has standard TTL input logic levels. These devices are available in space-saving 6-pin SOT23 and TDFN packages. Low Input Capacitance: 2.5pF (typ) Applications +4V to +12.6V Single Power Supply 7.6A/1.3A Peak Sink/Source Drive Current 0.23 Open-Drain n-Channel Sink Output 2 Open-Drain p-Channel Source Output 12ns (typ) Propagation Delay Matching Delay Time Between Inverting and Noninverting Inputs VCC/2 CMOS (MAX5048A)/TTL (MAX5048B) Logic Inputs 1.6V Input Hysteresis Up to +14V Logic Inputs (Regardless of V+ Voltage) -40C to +125C Operating Temperature Range 6-Pin SOT23 and TDFN Packages Ordering Information PART TEMP RANGE Power MOSFET Switching Switch-Mode Power Supplies PINLOGIC TOP PACKAGE INPUT MARK MAX5048AAUT-T -40C to +125C 6 SOT23-6 DC-DC Converters MAX5048BAUT-T -40C to +125C 6 SOT23-6 Motor Control MAX5048AATT-T -40C to +125C 6 TDFN-6 Power-Supply Modules MAX5048BATT-T -40C to +125C 6 TDFN-6 Typical Operating Circuit VCC/2 ABEC CMOS TTL ABED VCC/2 AKV CMOS TTL AKW Pin Configurations TOP VIEW V+ V+ P_OUT V+ 1 MAX5048A MAX5048B IN+ N_OUT P_OUT 2 N MAX5048A MAX5048B N_OUT 3 IN- 6 IN+ 5 IN- 4 GND GND SOT23 Pin Configurations continued at end of data sheet. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com. 1 MAX5048 General Description MAX5048 7.6A, 12ns, SOT23/TDFN, MOSFET Driver ABSOLUTE MAXIMUM RATINGS Junction to Case Thermal Resistance, JC (SOT23)....75C/W 6-Pin TDFN (derate 18.2mW/C above +70C) .........1454mW Junction to Case Thermal Resistance, JC (TDFN) ....8.5C/W Operating Temperature Range .........................-40C to +125C Storage Temperature Range .............................-65C to +150C Junction Temperature ......................................................+150C Lead Temperature (soldering, 10s) .................................+300C Voltages Referenced to GND V+ ...........................................................................-0.3V to +13V IN+, IN-...................................................................-0.3V to +14V N_OUT, P_OUT ............................................-0.3V to (V+ + 0.3V) N_OUT Continuous Output Current (Note 1) ....................390mA P_OUT Continuous Output Current (Note 1).....................100mA Continuous Power Dissipation* (TA = +70C) 6-Pin SOT23 (derate 9.1mW/C above +70C)............727mW Note 1: Continuous output current is limited by the power dissipation of the package. *As per JEDEC51 standard. Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (V+ = +12V, TA = -40C to +125C, unless otherwise noted. Typical values are at TA = +25C.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 12.6 V 4.00 V POWER SUPPLY V+ Operating Range V+ Undervoltage Lockout V+ UVLO 4.0 V+ rising 3.25 V+ Undervoltage Lockout Hysteresis V+ Undervoltage Lockout to Output Delay Time V+ Supply Current I+ 3.6 400 mV V+ rising 300 ns IN+ = IN- = V+ 0.95 1.5 mA n-CHANNEL OUTPUT Driver Output Resistance-- Pulling Down (MAX5048AAUT/ MAX5048BAUT) Driver Output Resistance-- Pulling Down (MAX5048AATT/ MAX5048BATT) RON-N RON-N V+ = +10V, IN-OUT = -100mA V+ = +4.5V, IN-OUT = -100mA TA = +25C 0.23 0.26 TA = +125C 0.38 0.43 TA = +25C 0.24 0.28 TA = +125C 0.40 0.47 V+ = +10V, IN-OUT = -100mA TA = +25C 0.31 0.34 TA = +125C 0.46 0.51 V+ = +4.5V, IN-OUT = -100mA TA = +25C 0.32 0.36 TA = +125C 0.48 0.55 Power-Off Pulldown Resistance V+ = 0 or floating, IN-OUT = -10mA, TA = +25C 3.3 10 Power-Off Pulldown Clamp Voltage V+ = 0 or floating, IN-OUT = -10mA, TA = +25C 0.85 1.0 V 20 A Output Leakage Current ILK-N N_OUT = V+ 6.85 Peak Output Current (Sinking) IPK-N CL = 10,000pF 7.6 A p-CHANNEL OUTPUT Driver Output Resistance-- Pulling Up (MAX5048AAUT/ MAX5048BAUT) 2 RON-P V+ = +10V, IP-OUT = 50mA TA = +25C 2.00 3.00 TA = +125C 2.85 4.30 V+ = +4.5V, IP-OUT = 50mA TA = +25C 2.20 3.30 TA = +125C 3.10 4.70 _______________________________________________________________________________________ 7.6A, 12ns, SOT23/TDFN, MOSFET Driver (V+ = +12V, TA = -40C to +125C, unless otherwise noted. Typical values are at TA = +25C.) (Note 2) PARAMETER Driver Output Resistance-- Pulling Up (MAX5048AATT/ MAX5048BATT) SYMBOL RON-P TYP MAX V+ = +10V, IP-OUT = 50mA CONDITIONS TA = +25C 2.08 3.08 TA = +125C 2.93 4.38 V+ = +4.5V, IP-OUT = 50mA TA = +25C 2.28 3.38 3.18 4.78 0.001 10 Output Leakage Current ILK-P P_OUT = 0 Peak Output Current (Sourcing) IPK-P CL = 10,000pF MIN TA = +125C UNITS 1.3 A A LOGIC INPUT Logic 1 Input Voltage VIH Logic 0 Input Voltage VIL Logic-Input Hysteresis VHYS Logic-Input Current Input Capacitance MAX5048A MAX5048B 0.67 x V+ V 2.4 MAX5048A 0.33 x V+ MAX5048B 0.8 MAX5048A 1.6 MAX5048B 0.68 VIN_ = V+ or 0 0.001 CIN V V 10 2.5 A pF SWITCHING CHARACTERISTICS FOR V+ = +10V Rise Time tR Fall Time tF CL = 1000pF 8 CL = 5000pF 45 CL = 10,000pF 82 CL = 1000pF 3.2 CL = 5000pF 7.5 CL = 10,000pF 12.5 ns ns Turn-On Propagation Delay Time tD-ON Figure 1, CL = 1000pF (Note 3) 7 12 25 ns Turn-Off Propagation Delay Time tD-OFF Figure 1, CL = 1000pF (Note 3) 7 12 25 ns Break-Before-Make Time 2.5 ns SWITCHING CHARACTERISTICS FOR V+ = +4.5V Rise Time tR Fall Time tF CL = 1000pF 12 CL = 5000pF 41 CL = 10,000pF 74 CL = 1000pF 3.0 CL = 5000pF 7.0 CL = 10,000pF ns ns 11.3 Turn-On Propagation Delay Time tD-ON Figure 1, CL = 1000pF (Note 3) 8 14 27 ns Turn-Off Propagation Delay Time tD-OFF Figure 1, CL = 1000pF (Note 3) 8 14 27 ns Break-Before-Make Time 4.2 ns Note 2: All DC specifications are 100% tested at TA = +25C. Specifications over -40C to +125C are guaranteed by design. Note 3: Guaranteed by design, not production tested. _______________________________________________________________________________________ 3 MAX5048 ELECTRICAL CHARACTERISTICS (continued) Typical Operating Characteristics (CL = 1000pF, TA = +25C, unless otherwise noted.) 5.0 TA = +85C TA = 0C TA = +25C TA = -40C 11 4.5 4.0 TA = +25C TA = 0C TA = -40C 3.5 3.0 8 MAX5048 toc03 5.5 20 TA = +125C PROPAGATION DELAY (ns) TA = +85C TA = +125C FALL TIME (ns) RISE TIME (ns) TA = +125C 14 6.0 MAX5048 toc01 20 17 PROPAGATION DELAY TIME, LOW-TO-HIGH vs. SUPPLY VOLTAGE FALL TIME vs. SUPPLY VOLTAGE MAX5048 toc02 RISE TIME vs. SUPPLY VOLTAGE 18 TA = +85C TA = +25C TA = -40C TA = 0C 16 14 12 2.5 2.0 8 12 10 10 4 6 8 SUPPLY VOLTAGE (V) SUPPLY CURRENT vs. SUPPLY VOLTAGE MAX5048 toc04 TA = +125C TA = +85C 16 TA = 0C TA = -40C 14 DUTY CYCLE = 50% V+ = +10V, CL = 0 10 8 1MHz 6 500kHz 4 100kHz 12 6 8 12 10 8 12 10 SUPPLY CURRENT vs. LOAD CAPACITANCE V+ = +10V f = 100kHz DUTY CYCLE = 50% 3.5 3.0 2.5 2.0 1.5 1.0 75kHz 40kHz 0.5 0 4 6 4.0 2 10 0 4 6 8 10 12 0 400 800 1200 1600 2000 LOAD CAPACITANCE (pF) SUPPLY CURRENT vs. TEMPERATURE MAX5048A INPUT THRESHOLD VOLTAGE vs. SUPPLY VOLTAGE MAX5048A SUPPLY CURRENT vs. INPUT VOLTAGE 1.5 1.4 1.3 7 6 RISING 5 4 3 FALLING 2 -25 0 25 50 75 TEMPERATURE (C) 100 125 INPUT LOW-TO-HIGH 1.5 1.4 1.3 1.2 1.1 0.9 0.8 0 -50 INPUT HIGH-TO-LOW 1.6 1.0 1 1.2 1.7 SUPPLY CURRENT (mA) 1.6 1.8 MAX5048 toc08 1.7 8 INPUT THRESHOLD VOLTAGE (V) V+ = +10V f = 100kHz, CL = 0 DUTY CYCLE = 50% MAX5048 toc09 SUPPLY VOLTAGE (V) MAX5048 toc07 SUPPLY VOLTAGE (V) 1.8 4 4 SUPPLY VOLTAGE (V) 12 SUPPLY CURRENT (mA) PROPAGATION DELAY (ns) 20 TA = +25C 12 SUPPLY VOLTAGE (V) PROPAGATION DELAY TIME, HIGH-TO-LOW vs. SUPPLY VOLTAGE 18 10 SUPPLY CURRENT (mA) 6 MAX5048 toc05 4 MAX5048 toc06 5 SUPPLY CURRENT (mA) MAX5048 7.6A, 12ns, SOT23/TDFN, MOSFET Driver 4 6 8 SUPPLY VOLTAGE (V) 10 12 0 2 4 6 8 INPUT VOLTAGE (V) _______________________________________________________________________________________ 10 12 7.6A, 12ns, SOT23/TDFN, MOSFET Driver INPUT VOLTAGE vs. OUTPUT VOLTAGE (V+ = +4V, CL = 5000pF) INPUT VOLTAGE vs. OUTPUT VOLTAGE (V+ = +4V, CL = 10,000pF) MAX5048 toc10 INPUT VOLTAGE vs. OUTPUT VOLTAGE (V+ = +4V, CL = 5000pF) MAX5048 toc11 IN+ 2V/div MAX5048 toc12 IN+ 2V/div IN+ 2V/div OUTPUT 2V/div OUTPUT 2V/div OUTPUT 2V/div 20ns/div 20ns/div 20ns/div INPUT VOLTAGE vs. OUTPUT VOLTAGE (V+ = +4V, CL = 10,000pF) INPUT VOLTAGE vs. OUTPUT VOLTAGE (V+ = +12V, CL = 5000pF) INPUT VOLTAGE vs. OUTPUT VOLTAGE (V+ = +12V, CL = 10,000pF) MAX5048 toc13 MAX5048 toc14 MAX5048 toc15 IN+ 5V/div IN+ 5V/div OUTPUT 5V/div OUTPUT 5V/div IN+ 2V/div OUTPUT 2V/div 20ns/div 20ns/div 20ns/div INPUT VOLTAGE vs. OUTPUT VOLTAGE (V+ = +12V, CL = 5000pF) INPUT VOLTAGE vs. OUTPUT VOLTAGE (V+ = +12V, CL = 10,000pF) MAX5048 toc16 MAX5048 toc17 20ns/div IN+ 5V/div IN+ 5V/div OUTPUT 5V/div OUTPUT 5V/div 20ns/div _______________________________________________________________________________________ 5 MAX5048 Typical Operating Characteristics (continued) (CL = 1000pF, TA = +25C, unless otherwise noted.) 7.6A, 12ns, SOT23/TDFN, MOSFET Driver MAX5048 Pin Description PIN NAME 1 V+ 2 P_OUT p-Channel Open-Drain Output. Sources current for MOSFET turn-on. 3 N_OUT n-Channel Open-Drain Output. Sinks current for MOSFET turn-off. 4 GND 5 IN- Inverting Logic Input Terminal. Connect to GND when not used. 6 IN+ Noninverting Logic Input Terminal. Connect to V+ when not used. EP Exposed paddle. Connect to GND. Solder EP to the GND plane for improved thermal performance. -- FUNCTION Power Supply. Bypass to GND with a 0.1F ceramic capacitor. Ground Detailed Description Logic Inputs The MAX5048A/MAX5048Bs' logic inputs are protected against voltage spikes up to +14V, regardless of the V+ voltage. The low 2.5pF input capacitance of the inputs reduces loading and increases switching speed. These devices have two inputs that give the user greater flexibility in controlling the MOSFET. Table 1 shows all possible input combinations. The difference between the MAX5048A and the MAX5048B is the input threshold voltage. The MAX5048A has VCC/2 CMOS logic-level thresholds, while the MAX5048B has TTL logic-level thresholds (see the Electrical Characteristics). For V+ above 5.5V, VIH (typ) = 0.5x(V+) + 0.8V and VIL (typ) = 0.5x(V+) - 0.8V. As V+ is reduced from 5.5V to 4V, VIH and VIL gradually approach VIH (typ) = 0.5x(V+) + 0.65V and VIL (typ) = 0.5x(V+) - 0.65V. Connect IN+ to V+ or IN- to GND when not used. Alternatively, the unused input can be used as an ON/OFF pin (see Table 1). Table 1. Truth Table IN+ IN- p-CHANNEL n-CHANNEL L L OFF ON L H OFF ON H L ON OFF H H OFF ON L = Logic low H = Logic high 6 Undervoltage Lockout (UVLO) When V+ is below the UVLO threshold, the N-channel is ON and the P-channel is OFF, independent of the state of the inputs. The UVLO is typically 3.6V with 400mV typical hysteresis to avoid chattering. Driver Outputs The MAX5048A/MAX5048B provide two separate outputs. One is an open-drain P-channel, the other an open-drain N-channel. They have distinct current sourcing/sinking capabilities to independently control the rise and fall times of the MOSFET gate. Add a resistor in series with P_OUT/N_OUT to slow the corresponding rise/fall time of the MOSFET gate. Applications Information Supply Bypassing, Device Grounding, and Placement Ample supply bypassing and device grounding are extremely important because when large external capacitive loads are driven, the peak current at the V+ pin can approach 1.3A, while at the GND pin the peak current can approach 7.6A. V CC drops and ground shifts are forms of negative feedback for inverters and, if excessive, can cause multiple switching when the INinput is used and the input slew rate is low. The device driving the input should be referenced to the MAX5048A/MAX5048B GND pin especially when the INinput is used. Ground shifts due to insufficient device grounding may disturb other circuits sharing the same AC ground return path. Any series inductance in the V+, P_OUT, N_OUT and/or GND paths can cause oscillations due to the very high di/dt that results when the MAX5048A/MAX5048B are switched with any capacitive load. A 0.1F or larger value ceramic capacitor is recommended bypassing V+ to GND and placed as close to the pins as possible. When driving very large loads (e.g., 10nF) at minimum rise time, 10F or more of parallel storage capacitance is recommended. A ground plane is highly recommended to minimize ground return resistance and series inductance. Care should be taken to place the MAX5048A/MAX5048B as close as possible to the external MOSFET being driven to further minimize board inductance and AC path resistance. Power Dissipation Power dissipation of the MAX5048A/MAX5048B consists of three components, caused by the quiescent current, capacitive charge and discharge of internal nodes, and the output current (either capacitive or resistive load). The sum of these components must be kept below the maximum power-dissipation limit. _______________________________________________________________________________________ 7.6A, 12ns, SOT23/TDFN, MOSFET Driver MAX5048 IN+ VIH VIL P_OUT AND N_OUT TIED TOGETHER 90% 10% tD-OFF tF tD-ON tR TIMING DIAGRAM V+ V+ MAX5048A MAX5048B INPUT P_OUT IN+ OUTPUT N_OUT INGND CL TEST CIRCUIT Figure 1. Timing Diagram and Test Circuit The quiescent current is 0.95mA typical. The current required to charge and discharge the internal nodes is frequency dependent (see the Typical Operating Characteristics). The MAX5048A/MAX5048B power dissipation when driving a ground referenced resistive load is: P = D x RON(MAX) x ILOAD2 where D is the fraction of the period the MAX5048A/ MAX5048Bs' output pulls high, RON (MAX) is the maximum on-resistance of the device with the output high (P-channel), and ILOAD is the output load current of the MAX5048A/MAX5048B. For capacitive loads, the power dissipation is: P = CLOAD x (V+)2 x FREQ where CLOAD is the capacitive load, V+ is the supply voltage, and FREQ is the switching frequency. Layout Information The MOSFET drivers MAX5048A/MAX5048B sourceand-sink large currents to create very fast rise and fall edges at the gate of the switching MOSFET. The high di/dt can cause unacceptable ringing if the trace lengths and impedances are not well controlled. The following PC board layout guidelines are recommended when designing with the MAX5048A/MAX5048B: * Place one or more 0.1F decoupling ceramic capacitor(s) from V+ to GND as close to the device as possible. At least one storage capacitor of 10F (min) should be located on the PC board with a low resistance path to the V+ pin of the MAX5048A/MAX5048B. * There are two AC current loops formed between the device and the gate of the MOSFET being driven. The MOSFET looks like a large capacitance from gate to source when the gate is being pulled low. The active current loop is from N_OUT of the MAX5048A/MAX5048B to the MOSFET gate to the MOSFET source and to GND of the MAX5048A/ MAX5048B. When the gate of the MOSFET is being pulled high, the active current loop is from P_OUT of the MAX5048A/MAX5048B to the MOSFET gate to the MOSFET source to the GND terminal of the decoupling capacitor to the V+ terminal of the decoupling capacitor and to the V+ terminal of the MAX5048A/MAX5048B. While the charging current loop is important, the discharging current loop is critical. It is important to minimize the physical distance and the impedance in these AC current paths. _______________________________________________________________________________________ 7 MAX5048 7.6A, 12ns, SOT23/TDFN, MOSFET Driver * In a multilayer PC board, the component surface layer surrounding the MAX5048A/MAX5048B should consist of a GND plane containing the discharging and charging current loops. Chip Information TRANSISTOR COUNT: 676 PROCESS: BiCMOS VS V+ MAX5048A MAX5048B V+ (4V TO 12.6V) P BREAKBEFOREMAKE CONTROL IN- V+ P_OUT P_OUT MAX5048A MAX5048B N_OUT IN+ N IN+ IN- GND Figure 2. MAX5048A/MAX5048B Functional Diagram N_OUT GND Figure 3. Noninverting Application 4V TO 12V VS IN+ V+ P_OUT P MAX5048A/ MAX5048B V+ (4V TO 12.6V) FROM PWM CONTROLLER (BOOST) N_OUT V+ P_OUT MAX5048A MAX5048B IN+ N_OUT IN- VOUT GND FROM PWM CONTROLLER (BUCK) VOUT IN+ V+ P_OUT MAX5048A MAX5048B INGND N_OUT N INGND Figure 4. Boost Converter 8 Figure 5. MAX5048A/MAX5048B in High-Power Synchronous Buck Converter _______________________________________________________________________________________ 7.6A, 12ns, SOT23/TDFN, MOSFET Driver MAX5048 Pin Configurations (continued) TOP VIEW V+ 1 P_OUT 2 N_OUT 3 MAX5048A MAX5048B 6 IN+ 5 IN- 4 GND EXPOSED PAD TDFN 3mm x 3mm Package Information 6LSOT.EPS (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) PACKAGE OUTLINE, SOT 6L BODY 21-0058 G 1 1 _______________________________________________________________________________________ 9 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) 6, 8, &10L, DFN THIN.EPS MAX5048 7.6A, 12ns, SOT23/TDFN, MOSFET Driver D2 D A2 PIN 1 ID N 0.35x0.35 b PIN 1 INDEX AREA E [(N/2)-1] x e REF. E2 DETAIL A e k A1 CL CL A L L e e PACKAGE OUTLINE, 6,8,10 & 14L, TDFN, EXPOSED PAD, 3x3x0.80 mm -DRAWING NOT TO SCALE- 10 21-0137 ______________________________________________________________________________________ G 1 2 7.6A, 12ns, SOT23/TDFN, MOSFET Driver COMMON DIMENSIONS MIN. MAX. D 0.70 2.90 0.80 3.10 E A1 2.90 0.00 3.10 0.05 L k 0.20 0.40 0.25 MIN. A2 0.20 REF. SYMBOL A PACKAGE VARIATIONS PKG. CODE N D2 E2 e JEDEC SPEC b [(N/2)-1] x e DOWNBONDS ALLOWED T633-1 6 1.500.10 2.300.10 0.95 BSC MO229 / WEEA 0.400.05 1.90 REF NO T633-2 6 1.500.10 2.300.10 0.95 BSC MO229 / WEEA 0.400.05 1.90 REF NO T833-1 8 1.500.10 2.300.10 0.65 BSC MO229 / WEEC 0.300.05 1.95 REF NO T833-2 8 1.500.10 2.300.10 0.65 BSC MO229 / WEEC 0.300.05 1.95 REF NO T833-3 8 1.500.10 2.300.10 0.65 BSC MO229 / WEEC 0.300.05 1.95 REF YES T1033-1 10 1.500.10 2.300.10 0.50 BSC MO229 / WEED-3 0.250.05 2.00 REF NO T1433-1 14 1.700.10 2.300.10 0.40 BSC ---- 0.200.05 2.40 REF YES T1433-2 14 1.700.10 2.300.10 0.40 BSC ---- 0.200.05 2.40 REF NO PACKAGE OUTLINE, 6,8,10 & 14L, TDFN, EXPOSED PAD, 3x3x0.80 mm -DRAWING NOT TO SCALE- 21-0137 G 2 2 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 11 (c) 2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc. MAX5048 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) ENGLISH * ???? * ??? * ??? WHAT'S NEW PRODUCTS SOLUTIONS DESIGN APPNOTES SUPPORT BUY COMPANY MEMBERS M axim > P roduc ts > P ower and Battery M anagement A utomotive MAX5048 7.6A, 12ns, SOT23/TDFN MOSFET Driver QuickView Technical Documents Ordering Info More Information All Ordering Information Notes: 1. Other options and links for purchasing parts are listed at: http://www.maxim-ic.com/sales. 2. Didn't Find What You Need? Ask our applications engineers. Expert assistance in finding parts, usually within one business day. 3. Part number suffixes: T or T&R = tape and reel; + = RoHS/lead-free; # = RoHS/lead-exempt. More: SeeFull Data Sheet or Part Naming C onventions. 4. * Some packages have variations, listed on the drawing. "PkgC ode/Variation" tells which variation the product uses. Devices: 1-16 of 16 M AX5048 Fre e Sam ple Buy Pack age : TYPE PINS FOOTPRINT DRAWING CODE/VAR * Tem p RoHS/Le ad-Free ? M aterials Analys is MAX5048BAUT#G16 SOT-23;6 pin;9 mm -40C to +125C RoHS/Lead-Free: RoHS Qualified Dwg: 21-0058I (PDF) Materials Analysis Use pkgcode/variation: U6FH-6* MAX5048AAUT#G16 SOT-23;6 pin;9 mm -40C to +125C RoHS/Lead-Free: RoHS Qualified Dwg: 21-0058I (PDF) Materials Analysis Use pkgcode/variation: U6FH-6* MAX5048AAUT#TG16 SOT-23;6 pin;9 mm -40C to +125C RoHS/Lead-Free: RoHS Qualified Dwg: 21-0058I (PDF) Materials Analysis Use pkgcode/variation: U6FH-6* MAX5048BAUT#TG16 SOT-23;6 pin;9 mm -40C to +125C RoHS/Lead-Free: RoHS Qualified Dwg: 21-0058I (PDF) Materials Analysis Use pkgcode/variation: U6FH-6* MAX5048BAUT SOT-23;6 pin;9 mm Dwg: 21-0058I (PDF) Use pkgcode/variation: U6F-6* -40C to +125C RoHS/Lead-Free: No Materials Analysis MAX5048AAUT SOT-23;6 pin;9 mm Dwg: 21-0058I (PDF) Use pkgcode/variation: U6F-6* -40C to +125C RoHS/Lead-Free: No Materials Analysis MAX5048AAUT-T SOT-23;6 pin;9 mm Dwg: 21-0058I (PDF) Use pkgcode/variation: U6F-6* -40C to +125C RoHS/Lead-Free: No Materials Analysis MAX5048BAUT-T SOT-23;6 pin;9 mm Dwg: 21-0058I (PDF) Use pkgcode/variation: U6F-6* -40C to +125C RoHS/Lead-Free: No Materials Analysis MAX5048AATT+ THIN QFN (Dual);6 pin;10 mm -40C to +125C RoHS/Lead-Free: Lead Free Dwg: 21-0137I (PDF) Materials Analysis Use pkgcode/variation: T633+2* MAX5048BATT THIN QFN (Dual);6 pin;10 mm Dwg: 21-0137I (PDF) Use pkgcode/variation: T633-2* MAX5048BATT+ THIN QFN (Dual);6 pin;10 mm -40C to +125C RoHS/Lead-Free: Lead Free Dwg: 21-0137I (PDF) Materials Analysis Use pkgcode/variation: T633+2* MAX5048AATT THIN QFN (Dual);6 pin;10 mm Dwg: 21-0137I (PDF) Use pkgcode/variation: T633-2* MAX5048BATT+T THIN QFN (Dual);6 pin;10 mm -40C to +125C RoHS/Lead-Free: Lead Free Dwg: 21-0137I (PDF) Materials Analysis Use pkgcode/variation: T633+2* -40C to +125C RoHS/Lead-Free: No Materials Analysis -40C to +125C RoHS/Lead-Free: No Materials Analysis MAX5048BATT-T THIN QFN (Dual);6 pin;10 mm Dwg: 21-0137I (PDF) Use pkgcode/variation: T633-2* -40C to +125C RoHS/Lead-Free: No Materials Analysis MAX5048AATT-T THIN QFN (Dual);6 pin;10 mm Dwg: 21-0137I (PDF) Use pkgcode/variation: T633-2* -40C to +125C RoHS/Lead-Free: No Materials Analysis MAX5048AATT+T THIN QFN (Dual);6 pin;10 mm -40C to +125C RoHS/Lead-Free: Lead Free Dwg: 21-0137I (PDF) Materials Analysis Use pkgcode/variation: T633+2* Didn't Find What You Need? Next Day Product Selection Assistance from Applications Engineers Parametric Search Applications Help QuickView Technical Documents Ordering Info More Information Des c ription Key Features A pplic ations /U s es Key Spec ific ations Diagram Data Sheet A pplic ation N otes Des ign Guides E ngineering Journals Reliability Reports Software/M odels E valuation Kits P ric e and A vailability Samples Buy O nline P ac kage I nformation Lead-Free I nformation Related P roduc ts N otes and C omments E valuation Kits Doc ument Ref.: 1 9 -2 4 1 9 ; Rev 4 ; 2 0 0 5 -0 9 -2 7 T his page las t modified: 2 0 0 7 -0 7 -2 7 C ONTAC T US: SEND US AN EMAIL C opyright 2 0 0 7 by M axim I ntegrated P roduc ts , Dallas Semic onduc tor * Legal N otic es * P rivac y P olic y