LM48410 www.ti.com LM48410 SNAS403E - FEBRUARY 2007 - REVISED MAY 2013 Low EMI, Filterless, 2.3W Stereo Class D Audio Power Amplifier with 3D Enhancement Check for Samples: LM48410 FEATURES DESCRIPTION * The LM48410 is a single supply, high efficiency, 2.3W/channel, filterless switching audio amplifier. A low noise PWM architecture eliminates the output filter, reducing external component count, board area consumption, system cost, and simplifying design. A selectable spread spectrum modulation scheme suppresses RF emissions, further reducing the need for output filters. 1 2 * * * * * * * * * * Selectable Spread Spectrum Mode Reduces EMI Output Short Circuit Protection Stereo Class D Operation No Output Filter Required 3D Enhancement Logic Selectable Gain Independent Channel Shutdown Controls Minimum External Components Click and Pop Suppression Micro-Power Shutdown Available in Space-Saving 4mm x 4mm WQFN Package APPLICATIONS * * * Mobile Phones PDAs Laptops KEY SPECIFICATIONS * * * * * * * Quiescent Power Supply Current at 3.6V supply 4mA Power Output at VDD = 5V, RL = 4, THD 10% 2.3W (typ) Power Output at VDD = 5V, RL = 8, THD 10% 1.5W (typ) Shutdown current 0.03A (typ) Efficiency at 3.6V, 100mW into 8 80% (typ) Efficiency at 3.6V, 500mW into 8 85% (typ) Efficiency at 5V, 1W into 8 86% (typ) The LM48410 is designed to meet the demands of mobile phones and other portable communication devices. Operating from a single 5V supply, the device is capable of delivering 2.3W/channel of continuous output power to a 4 load with less than 10% THD+N. Flexible power supply requirements allow operation from 2.4V to 5.5V. The LM48410 offers two logic selectable modulation schemes, fixed frequency mode, and an EMI reducing spread spectrum mode. The LM48410 features high efficiency compared with conventional Class AB amplifiers. When driving an 8 speaker from a 3.6V supply, the device operates with 85% efficiency at PO = 500mW/Ch. Four gain options are pin selectable through the G0 and G1 pins. The LM48410 also includes 3D audio enhancement that improves stereo sound quality. In devices where the left and right speakers are in close proximity, 3D enhancement affects channel specialization, widening the perceived soundstage. Output short circuit protection prevents the device from being damaged during fault conditions. Superior click and pop suppression eliminates audible transients on power-up/down and during shutdown. Independent left/right shutdown controls maximizes power savings in mixed mono/stereo applications. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2007-2013, Texas Instruments Incorporated LM48410 SNAS403E - FEBRUARY 2007 - REVISED MAY 2013 www.ti.com EMI Plot Typical Application +2.5V to +5.5V C3D+ R3D+ 3DL+ 3DR+ CS CS VDD PVDD PVDD CIN OUTRA INR+ INR- GAIN MODULATOR HBRIDGE OUTRB CIN SDR G0 3D G1 OSCILLATOR SDL CIN OUTLA INL+ INLCIN GAIN MODULATOR HBRIDGE OUTLB 3DEN SS/FF 3DL- R3D- 3DR- GND PGND C3D- Figure 1. Typical Audio Amplifier Application Circuit 2 Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48410 LM48410 www.ti.com SNAS403E - FEBRUARY 2007 - REVISED MAY 2013 3DR- G0 VDD PVDD OUTRA OUTRB Connection Diagram 24 23 22 21 20 19 17 GND INR- 3 16 SDR 3DEN 4 15 SS/FF INL- 5 14 SDL INL+ 6 13 PGND 7 8 9 10 11 12 OUTLB 2 OUTLA INR+ PVDD PGND G1 18 3DL- 1 3DL+ 3DR+ Figure 2. 24-Lead WQFN 4mm x 4mm x 0.8mm - Top View See RTW0024A Package PIN DESCRIPTIONS Pin Name Description 1 3DR+ Right Channel non-inverting 3D connection. Connect to 3DL+ through C3D+ and R3D+ 2 INR+ Right Channel Non-Inverting Input 3 INR- Right Channel Inverting Input 4 3DEN 3D Enable Input 5 INL- Left Channel Inverting Input 6 INL+ Left Channel Non-Inverting Input 7 3DL+ Left Channel non-inverting 3D connection. Connect to 3DR+ through C3D+ and R3D+ 8 3DL- Left Channel inverting 3D connection. Connect to 3DR- through C3D-and R3D- 9 G1 Gain Select Input 1 10, 21 PVDD 11 OUTLA Speaker Power Supply Left Channel Non-Inverting Output 12 OUTLB Left Channel Inverting Output 13, 18 PGND Power Ground 14 SDL 15 SS/FF 16 SDR Right Channel Active Low Shutdown. Connect to VDD for normal operation. Connect to GND to disable the right channel. 17 GND Ground 19 OUTRB Left Channel Active Low Shutdown. Connect to VDD for normal operation. Connect to GND to disable the left channel. Modulation Mode Select. Connect to VDD for spread spectrum mode. Connect to GND for fixed frequency mode Right Channel Inverting Output Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48410 3 LM48410 SNAS403E - FEBRUARY 2007 - REVISED MAY 2013 www.ti.com PIN DESCRIPTIONS (continued) Pin Name 20 OUTRA Description 22 VDD Power Supply 23 G0 Gain Select Input 0 24 3DR- Right Channel Non-Inverting Output Right Channel inverting 3D connection. Connect to 3DL- through C3D-and R3D- These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) (3) Supply Voltage (1) 6.0V -65C to +150C Storage Temperature Input Voltage -0.3V to VDD +0.3V Power Dissipation (4) Internally Limited (5) 2000V ESD Susceptibility ESD Susceptibility (6) 200V Junction Temperature 150C Thermal Resistance (1) (2) (3) (4) (5) (6) JC 5.3C/W JA 36.5C/W All voltages are measured with respect to the ground pin, unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. a The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, JA, and the ambient temperature, TA. The maximum allowable power dissipation is PDMAX = (TJMAX - TA)/ JA or the number given in Absolute Maximum Ratings, whichever is lower. Human body model, 100pF discharged through a 1.5k resistor. Machine Model, 220pF-240pF discharged through all pins. Operating Ratings (1) (2) Temperature Range TMIN TA TMAX -40C TA 85C 2.4V VDD 5.5V Supply Voltage (VDD, PVDD) (1) (2) 4 All voltages are measured with respect to the ground pin, unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48410 LM48410 www.ti.com SNAS403E - FEBRUARY 2007 - REVISED MAY 2013 Electrical Characteristics VDD = PVDD = 3.6V (1) (2) The following specifications apply for AV = 6dB, RL = 15H + 8 + 15H, SS/FF = VDD = (Spread Spectrum mode), f = 1kHz, unless otherwise specified. Limits apply for TA = 25C. Symbol VOS Parameter Differential Output Offset Voltage Conditions VIN = 0, VDD = 2.4V to 5.0V LM48410 Typical (3) Limit (4) (5) 5 Units (Limits) mV VIN = 0, No Load IDD Quiescent Power Supply Current Both channels active, VDD = 3.6V 4 6.5 mA (max) VDD = 5V 5 8.5 mA (max) 1 A (max) ISD Shutdown Current VIH Logic Input High Voltage 1.4 V (min) VIL Logic Input Low Voltage 0.4 V (max) TWU Wake Up Time fSW Switching Frequency VSDL = VSDR = GND 4 SS/FF = VDD (Spread Spectrum) 300 SS/FF = GND (Fixed Frequency) 300 G0, G1 = GND, RL = AV RIN (1) (2) (3) (4) (5) 0.03 6 kHz (max) kHz 5.5 dB (min) 6.5 dB (max) 11.5 dB (min) 12.5 dB (max) G0 = VDD, G1 = GND 12 G0 = GND, G1 = VDD 18 G0, G1 = VDD 24 AV = 6dB 160 k AV = 12dB 80 k AV = 18dB 40 k AV = 24dB 20 k Gain Input Resistance ms 390 17.5 dB (min) 18.5 dB (max) 23.5 dB (min) 24.5 dB (max) All voltages are measured with respect to the ground pin, unless otherwise specified. Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication of device performance. Typicals are measured at 25C and represent the parametric norm. Limits are specified to TI's AOQL (Average Outgoing Quality Level). Datasheet min/max specification limits are specified by design, test, or statistical analysis. Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48410 5 LM48410 SNAS403E - FEBRUARY 2007 - REVISED MAY 2013 www.ti.com Electrical Characteristics VDD = PVDD = 3.6V(1)(2) (continued) The following specifications apply for AV = 6dB, RL = 15H + 8 + 15H, SS/FF = VDD = (Spread Spectrum mode), f = 1kHz, unless otherwise specified. Limits apply for TA = 25C. Symbol Parameter Conditions LM48410 Typical (3) Limit (4) (5) Units (Limits) RL = 15H + 4 + 15H, THD 10% f = 1kHz, 22kHz BW VDD = 5V 2.3 W VDD = 3.6V 1.14 W VDD = 2.5V 490 mW RL = 15H + 8 + 15H, THD 10% f = 1kHz, 22kHz BW PO Output Power (Per Channel) VDD = 5V 1.5 VDD = 3.6V 740 VDD = 2.5V 330 W 600 mW (min) mW RL = 15H + 4 + 15H, THD 1% f = 1kHz, 22kHz BW VDD = 5V 1.85 W VDD = 3.6V 940 mW V DD = 2.5V 400 mW VDD = 5V 1.18 W VDD = 3.6V 580 mW VDD = 2.5V 270 mW PO = 500mW/Ch, f = 1kHz, RL = 8 0.025 % PO = 300mW/Ch, f = 1kHz, RL = 8 0.07 % 70 68 dB dB RL = 15H + 8 + 15H, THD = 1% f = 1kHz, 22kHz BW THD+N PSRR Total Harmonic Distortion Power Supply Rejection Ratio VRIPPLE = 200mVP-P Sine, Inputs AC GND, CIN = 1F, input referred fRipple = 217Hz fRipple = 1kHz, CMRR Common Mode Rejection Ratio VRIPPLE = 1VP-P fRIPPLE = 217Hz 65 dB Efficiency PO = 1W/Ch, f = 1kHz, RL = 8, VDD = 5V 86 % Xtalk Crosstalk PO = 500mW/Ch, f = 1kHz 82 dB SNR Signal to Noise Ratio VDD = 5V, PO = 1W Fixed Frequency Mode 88 dB OS Output Noise Input referred, Fixed Frequency Mode A-Weighted Filter 28 V 6 Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48410 LM48410 www.ti.com SNAS403E - FEBRUARY 2007 - REVISED MAY 2013 Typical Performance Characteristics THD+N vs Output Power f = 1kHz, AV = 6dB, RL = 8 100 THD+N vs Output Power f = 1kHz, AV = 6dB, RL = 4 100 VDD = 5V V DD = 5V 10 VDD = 3.6V THD+N (%) THD+N (%) 10 VDD = 2.5V 1 VDD = 3.6V 1 V DD = 2.5V 0.1 0.1 0.01 0.001 0.01 0.1 1 0.01 0.001 10 0.1 1 10 OUTPUT POWER (W) Figure 4. THD+N vs Frequency VDD = 2.5V, POUT = 100mW, RL = 8 THD+N vs Frequency VDD = 3.6V, POUT = 250mW, RL = 8 100 100 10 10 1 0.1 0.01 1 0.1 0.01 0.001 20 100 1k 10k 20k 0.001 20 100 1k 10k 20k FREQUENCY (Hz) FREQUENCY (Hz) Figure 5. Figure 6. THD+N vs Frequency VDD = 5V, POUT = 375mW, RL = 8 THD+N vs Frequency VDD = 2.5V, POUT = 100mW, RL = 4 100 100 10 10 THD+N (%) THD+N (%) 0.01 Figure 3. THD+N (%) THD+N (%) OUTPUT POWER (W) 1 0.1 0.01 0.001 20 1 0.1 0.01 100 1k 10k 20k 0.001 20 100 1k FREQUENCY (Hz) FREQUENCY (Hz) Figure 7. Figure 8. 10k 20k Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48410 7 LM48410 SNAS403E - FEBRUARY 2007 - REVISED MAY 2013 www.ti.com Typical Performance Characteristics (continued) THD+N vs Frequency VDD = 5V, POUT = 375mW, RL = 4 100 100 10 10 THD+N (%) THD+N (%) THD+N vs Frequency VDD = 3.6V, POUT = 250mW, RL = 4 1 0.1 0.01 1 0.1 0.01 0.001 20 100 1k 0.001 20 10k 20k 1k 10k 20k FREQUENCY (Hz) Figure 9. Figure 10. Efficiency vs Output Power RL = 4, f = 1kHz Efficiency vs Output Power RL = 8, f = 1kHz 100 100 VDD = 5V 90 90 80 EFFICIENCY (%) 80 EFFICIENCY (%) 100 FREQUENCY (Hz) 70 VDD = 3.6V 60 VDD = 2.5V 50 40 50 40 30 20 20 10 10 0 0 500 1000 1500 VDD = 3.6V 60 30 0 VDD = 5V 70 2000 VDD = 2.5V 0 300 600 900 1200 1500 OUTPUT POWER (mW) OUTPUT POWER (mW) Figure 11. Figure 12. Power Dissipation vs Output Power RL = 4, f = 1kHz Power Dissipation vs Output Power RL = 8, f = 1kHz 1500 500 1200 VDD = 5V VDD = 2.5V 900 VDD = 3.6V 600 300 0 8 POWER DISSIPATION (mW) POWER DISSIPATION (mW) 450 400 1000 2000 3000 VDD = 2.5V 300 VDD = 3.6V 250 200 150 100 50 POUT = POUTL + POUTR 0 VDD = 5V 350 4000 POUT = POUTL + POUTR 0 0 500 1000 1500 2000 2500 OUTPUT POWER (mW) OUTPUT POWER (mW) Figure 13. Figure 14. Submit Documentation Feedback 3000 Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48410 LM48410 www.ti.com SNAS403E - FEBRUARY 2007 - REVISED MAY 2013 Typical Performance Characteristics (continued) Output Power vs Supply Voltage RL = 4, f = 1kHz Output Power vs Supply Voltage RL = 8, f = 1kHz 2000 3000 OUTPUT POWER (mW) OUTPUT POWER (mW) 2500 2000 THD+N = 10% 1500 THD+N = 1% 1000 1500 THD+N = 10% 1000 THD+N = 1% 500 500 0 2.5 0 3 3.5 4 4.5 5 2.5 5.5 3 4 4.5 5 5.5 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) Figure 15. Figure 16. PSRR vs Frequency VDD = 3.6V, VRIPPLE= 200mVP-P, RL = 8 Crosstalk vs Frequency VDD = 3.6V, VRIPPLE = 1VP-P, RL = 8 0 0 -10 -10 -20 CROSSTALK (dB) -20 PSRR(dB) 3.5 -30 -40 -50 -60 -30 -40 -50 -60 -70 -80 -70 -80 20 -90 100 1k -100 20 10k 20k 100 FREQUENCY (Hz) Figure 17. Figure 18. CMRR vs Frequency VDD = 3.6V, VCM = 1VP-P, RL = 8 Supply Current vs Supply Voltage No Load -10 7 SUPPLY CURRENT (mA) 8 -20 CMRR (dB) 10k 20k FREQUENCY (Hz) 0 -30 -40 -50 -60 6 5 4 3 2 1 -70 -80 20 1k 100 1k 10k 20k 0 2.5 3 3.5 4 4.5 FREQUENCY (Hz) SUPPLY VOLTAGE (V) Figure 19. Figure 20. 5 5.5 Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48410 9 LM48410 SNAS403E - FEBRUARY 2007 - REVISED MAY 2013 www.ti.com Typical Performance Characteristics (continued) Fixed Frequency FFT VDD = 3.6V 0 dB Spread Spectrum FFT VDD = 3.6V 0 0 dB -10 -10 -20 -20 -30 -30 -40 -40 -50 -50 -60 -60 -70 -70 -80 -80 -90 -90 -100 20 Hz 10 MHz -100 20 Hz Figure 21. 10 0 10 MHz Figure 22. Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48410 LM48410 www.ti.com SNAS403E - FEBRUARY 2007 - REVISED MAY 2013 APPLICATION INFORMATION GENERAL AMPLIFIER FUNCTION The LM48410 stereo Class D audio power amplifier features a filterless modulation scheme that reduces external component count, conserving board space and reducing system cost. The outputs of the device transition from VDD to GND with a 300kHz switching frequency. With no signal applied, the outputs switch with a 50% duty cycle, in phase, causing the two outputs to cancel. This cancellation results in no net voltage across the speaker, thus there is no current to the load in the idle state. When an input signal is applied, the duty cycle (pulse width) of the LM48410 output's change. For increasing output voltage, the duty cycle of one side of each output increases, while the duty cycle of the other side of each output decreases. For decreasing output voltages, the converse occurs. The difference between the two pulse widths yields the differential output voltage. FIXED FREQUENCY MODE The LM48410 features two modulations schemes, a fixed frequency mode and a spread spectrum mode. Select the fixed frequency mode by setting SS/FF = GND. In fixed frequency mode, the amplifier outputs switch at a constant 300kHz. In fixed frequency mode, the output spectrum consists of the fundamental and its associated harmonics (see Typical Performance Characteristics). SPREAD SPECTRUM The logic selectable spread spectrum mode eliminates the need for output filters, ferrite beads or chokes. In spread spectrum mode, the switching frequency varies randomly by 30% about a 300kHz center frequency, reducing the wideband spectral content and improving EMI emissions radiated by the speaker and associated cables and traces. A fixed frequency class D exhibits large amounts of spectral energy at multiples of the switching frequency. The spread spectrum architecture of the LM48410 spreads the same energy over a larger bandwidth (See Typical Performance Characteristics). The cycle-to-cycle variation of the switching period does not affect the audio reproduction, efficiency, or PSRR. Set SS/FF = VDD for spread spectrum mode. DIFFERENTIAL AMPLIFIER EXPLANATION As logic supplies continue to shrink, system designers are increasingly turning to differential analog signal handling to preserve signal to noise ratios with restricted voltage swings. The LM48410 features two fully differential speaker amplifiers. A differential amplifier amplifies the difference between the two input signals. Traditional audio power amplifiers have typically offered only single-ended inputs resulting in a 6dB reduction of SNR relative to differential inputs. The LM48410 also offers the possibility of DC input coupling which eliminates the input coupling capacitors. A major benefit of the fully differential amplifier is the improved common mode rejection ratio (CMRR) over single-ended input amplifiers. The increased CMRR of the differential amplifier reduces sensitivity to ground offset related noise injection, especially important in noisy systems. POWER DISSIPATION AND EFFICIENCY The major benefit of a Class D amplifier is increased efficiency versus a Class AB. The efficiency of the LM48410 is attributed to the region of operation of the transistors in the output stage. The Class D output stage acts as current steering switches, consuming negligible amounts of power compared to a Class AB amplifier. Most of the power loss associated with the output stage is due to the IR loss of the MOSFET on-resistance, along with switching losses due to gate charge. SHUTDOWN FUNCTION The LM48410 features independent left and right channel shutdown controls, allowing each channel to be disabled independently. SDR controls the right channel, while SDL controls the left channel. Driving either low disables the corresponding channel, reducing supply current to 0.1A. It is best to switch between ground and VDD for minimum current consumption while in shutdown. The LM48410 may be disabled with shutdown voltages in between GND and VDD, the idle current will be greater than the typical 0.1A value. Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48410 11 LM48410 SNAS403E - FEBRUARY 2007 - REVISED MAY 2013 www.ti.com The LM48410 shutdown inputs have internal pulldown resistors. The purpose of these resistors is to eliminate any unwanted state changes when SD is floating. To minimize shutdown current, SD should be driven to GND or left floating. If SD is not driven to GND or floating, an increase in shutdown supply current will be noticed. PROPER SELECTION OF EXTERNAL COMPONENTS Power Supply Bypassing/Filtering Proper power supply bypassing is important for low noise performance and high PSRR. Place the supply bypass capacitor as close to the device as possible. Typical applications employ a voltage regulator with 10F and 0.1F bypass capacitors that increase supply stability. These capacitors do not eliminate the need for bypassing of the LM48410 supply pins. A 1F capacitor is recommended. Input Capacitor Slection Input capacitors may be required for some applications, or when the audio source is single-ended. Input capacitors block the DC component of the audio signal, eliminating any conflict between the DC component of the audio source and the bias voltage of the LM48410. The input capacitors create a high-pass filter with the input resistance RIN. The -3dB point of the high-pass filter is found using Equation 1 below. f = 1 / 2RINCIN (1) The values for RIN can be found in the Electrical Characteristics table for each gain setting. The input capacitors can also be used to remove low frequency content from the audio signal. Small speakers cannot reproduce, and may even be damaged by low frequencies. High-pass filtering the audio signal helps protect the speakers. When the LM48410 is using a single-ended source, power supply noise on the ground is seen as an input signal. Setting the high-pass filter point above the power supply noise frequencies, 217 Hz in a GSM phone, for example, filters out the noise such that it is not amplified and heard on the output. Capacitors with a tolerance of 10% or better are recommended for impedance matching and improved CMRR and PSRR. 3D Enhancement The LM48410 features TI's 3D enhancement effect that widens the perceived soundstage of a stereo audio signal. The 3D enhancement increases the apparent stereo channel separation, improving audio reproduction whenever the left and right speakers are too close to one another. An external RC network shown in Figure 1 is required to enable the 3D effect. Because the LM48410 is a fully differential amplifier, there are two separate RC networks, one for each stereo input pair (INL+ and INR+, and INL- and INR-). Set 3DEN high to enable the 3D effect. Set 3DEN low to disable the 3D effect. The 3D RC network acts as a high pass filter. The amount of the 3D effect is set by the R3D resistor. Decreasing the value of R3D increases the 3D effect. The C3D capacitor sets the frequency at which the 3D effect occurs. Increasing the value of C3D decreases the low frequency cutoff point, extending the 3D effect over a wider bandwidth. The low frequency cutoff point is given by: f3D(-3dB) = 1 / 2(R3D)(C3D) (2) Enabling the 3D effect increase the gain by a factor of (1+20k/R3D). Setting R3D to 20k results in a gain increase of 6dB whenever the 3D effect is enabled. In fully differential configuration, the component values of the two RC networks must be identical. Any component variations can affect the sound quality of the 3D effect. In single-ended configuration, only the RC network of the input pairs being driven by the audio source needs to be connected. For instance, if audio is applied to INR+ and INL+, then a 3D network must be connected between 3DL+ and 3DR+. 3DL- and 3DR- can be left unconnected. 12 Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48410 LM48410 www.ti.com SNAS403E - FEBRUARY 2007 - REVISED MAY 2013 AUDIO AMPLIFIER GAIN SETTING The LM48410 features four internally configured gain settings. The device gain is selected through the two logic inputs, G0 and G1. The gain settings are as shown in the following table. LOGIC INPUT GAIN G1 G0 V/V dB 0 0 2 6 0 1 4 12 1 0 8 18 1 1 16 24 SINGLE-ENDED AUDIO AMPLIFIER CONFIGURATION The LM48410 is compatible with single-ended sources. When configured for single-ended inputs, input capacitors must be used to block and DC component at the input of the device. Figure 23 shows the typical single-ended applications circuit. INL+ INL- GAIN CONTROL INR+ INR- Figure 23. Single-Ended Circuit Diagram PCB LAYOUT GUIDELINES As output power increases, interconnect resistance (PCB traces and wires) between the amplifier, load and power supply create a voltage drop. The voltage loss due to the traces between the LM48410 and the load results in lower output power and decreased efficiency. Higher trace resistance between the supply and the LM48410 has the same effect as a poorly regulated supply, increasing ripple on the supply line, and reducing peak output power. The effects of residual trace resistance increases as output current increases due to higher output power, decreased load impedance or both. To maintain the highest output voltage swing and corresponding peak output power, the PCB traces that connect the output pins to the load and the supply pins to the power supply should be as wide as possible to minimize trace resistance. The use of power and ground planes will give the best THD+N performance. In addition to reducing trace resistance, the use of power planes creates parasitic capacitors that help to filter the power supply line. Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48410 13 LM48410 SNAS403E - FEBRUARY 2007 - REVISED MAY 2013 www.ti.com The inductive nature of the transducer load can also result in overshoot on one or both edges, clamped by the parasitic diodes to GND and VDD in each case. From an EMI standpoint, this is an aggressive waveform that can radiate or conduct to other components in the system and cause interference. In is essential to keep the power and output traces short and well shielded if possible. Use of ground planes beads and micros-strip layout techniques are all useful in preventing unwanted interference. As the distance from the LM48410 and the speaker increases, the amount of EMI radiation increases due to the output wires or traces acting as antennas. An antenna becomes a more efficient radiator with lenth. Ferrite chip inductors places close to the LM48410 outputs may be needed to reduce EMI radiation. EXPOSED-DAP MOUNTING CONSIDERATIONS The LM48410 WQFN package features an exposed thermal pad on its underside (DAP, or die attach paddle). The exposed DAP lowers the package's thermal resistance by providing a direct heat conduction path from the die to the printed circuit board. Connect the exposed thermal pad to GND though a large pad and multiple vias to a GND plane on the bottom of the PCB. Bill of Materials Table 1. LM48410SQ Demo Board Bill of Materials Qty C1-C4 4 1F10%, 16V X7R ceramic capacitors (1206) Panasonic ECJ-3YB1C105K C5-C9 5 1F10%, 16V X7R ceramic capacitors (603) Panasonic ECJ-1VB1C105K C10 1 1F10%, 16V X7R tantalum capacitors (B-case)) AVX R1, R2 2 82k5% resistor (603) R3, R4 2 100k potentiometer T1, T2 2 Common mode choke, A1, 800 at 100HHz JU1-JU6 6 3-pin header U1 14 Description Recommended Manufacturer Designation LM48410SQ (24-pin SQA, 4mm x 4mm x 0.8mm) Part Number TPSB106K016R0800 ST4B104CT TDK ACM4532-801 Texas Instruments Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48410 LM48410 www.ti.com SNAS403E - FEBRUARY 2007 - REVISED MAY 2013 LM48410 Demonstration Board Schematic Diagram Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48410 15 LM48410 SNAS403E - FEBRUARY 2007 - REVISED MAY 2013 www.ti.com Demoboard PCB Layout 16 Figure 24. Top Silkscreen Figure 25. Top Soldermask Figure 26. Top Layer Figure 27. Layer 2 Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48410 LM48410 www.ti.com SNAS403E - FEBRUARY 2007 - REVISED MAY 2013 Figure 28. Layer 3 Figure 29. Bottom Layer Figure 30. Bottom Silkscreen Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48410 17 LM48410 SNAS403E - FEBRUARY 2007 - REVISED MAY 2013 www.ti.com REVISION HISTORY Rev Date 1.0 02/21/07 Initial release. Description 1.1 03/19/07 Text edits. 1.2 07/11/07 Added the demo boards and schematic diagram. 1.3 02/22/08 Fixed the PID (product folder). 1.4 04/29/08 Text edits. 1.5 07/03/08 Text edits (under SHUTDOWN FUNCTION). Changes from Revision D (May 2013) to Revision E * 18 Page Changed layout of National Data Sheet to TI format .......................................................................................................... 17 Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48410 PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2014 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) LM48410SQ/NOPB ACTIVE WQFN RTW 24 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 L48410 LM48410SQX/NOPB ACTIVE WQFN RTW 24 4500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 L48410 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2014 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 18-Aug-2014 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM48410SQ/NOPB WQFN RTW 24 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 LM48410SQX/NOPB WQFN RTW 24 4500 330.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 18-Aug-2014 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM48410SQ/NOPB WQFN RTW 24 1000 210.0 185.0 35.0 LM48410SQX/NOPB WQFN RTW 24 4500 367.0 367.0 35.0 Pack Materials-Page 2 PACKAGE OUTLINE RTW0024A WQFN - 0.8 mm max height SCALE 3.000 PLASTIC QUAD FLATPACK - NO LEAD 4.1 3.9 A B PIN 1 INDEX AREA 4.1 3.9 C 0.8 MAX SEATING PLANE 0.05 0.00 0.08 C 2X 2.5 7 20X 0.5 6 13 2X 2.5 25 2.6 0.1 1 PIN 1 ID (OPTIONAL) (0.1) TYP EXPOSED THERMAL PAD 12 18 24 19 0.5 24X 0.3 24X 0.3 0.2 0.1 0.05 C A B C 4222815/A 03/2016 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. www.ti.com EXAMPLE BOARD LAYOUT RTW0024A WQFN - 0.8 mm max height PLASTIC QUAD FLATPACK - NO LEAD ( 2.6) SYMM 24 19 24X (0.6) 1 18 24X (0.25) (1.05) 25 SYMM (3.8) 20X (0.5) (R0.05) TYP 13 6 ( 0.2) TYP VIA 7 12 (1.05) (3.8) LAND PATTERN EXAMPLE SCALE:15X 0.07 MIN ALL AROUND 0.07 MAX ALL AROUND SOLDER MASK OPENING METAL SOLDER MASK OPENING METAL UNDER SOLDER MASK NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED SOLDER MASK DETAILS 4222815/A 03/2016 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). www.ti.com EXAMPLE STENCIL DESIGN RTW0024A WQFN - 0.8 mm max height PLASTIC QUAD FLATPACK - NO LEAD 4X ( 1.15) (0.675) TYP (R0.05) TYP 24 19 24X (0.6) 1 18 24X (0.25) (0.675) TYP 25 20X (0.5) SYMM (3.8) 13 6 METAL TYP 7 SYMM 12 (3.8) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD 25: 78% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE SCALE:20X 4222815/A 03/2016 NOTES: (continued) 5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. TI's published terms of sale for semiconductor products (http://www.ti.com/sc/docs/stdterms.htm) apply to the sale of packaged integrated circuit products that TI has qualified and released to market. Additional terms may apply to the use or sale of other types of TI products and services. Reproduction of significant portions of TI information in TI data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such reproduced documentation. Information of third parties may be subject to additional restrictions. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Buyers and others who are developing systems that incorporate TI products (collectively, "Designers") understand and agree that Designers remain responsible for using their independent analysis, evaluation and judgment in designing their applications and that Designers have full and exclusive responsibility to assure the safety of Designers' applications and compliance of their applications (and of all TI products used in or for Designers' applications) with all applicable regulations, laws and other applicable requirements. Designer represents that, with respect to their applications, Designer has all the necessary expertise to create and implement safeguards that (1) anticipate dangerous consequences of failures, (2) monitor failures and their consequences, and (3) lessen the likelihood of failures that might cause harm and take appropriate actions. Designer agrees that prior to using or distributing any applications that include TI products, Designer will thoroughly test such applications and the functionality of such TI products as used in such applications. TI's provision of technical, application or other design advice, quality characterization, reliability data or other services or information, including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, "TI Resources") are intended to assist designers who are developing applications that incorporate TI products; by downloading, accessing or using TI Resources in any way, Designer (individually or, if Designer is acting on behalf of a company, Designer's company) agrees to use any particular TI Resource solely for this purpose and subject to the terms of this Notice. TI's provision of TI Resources does not expand or otherwise alter TI's applicable published warranties or warranty disclaimers for TI products, and no additional obligations or liabilities arise from TI providing such TI Resources. TI reserves the right to make corrections, enhancements, improvements and other changes to its TI Resources. TI has not conducted any testing other than that specifically described in the published documentation for a particular TI Resource. Designer is authorized to use, copy and modify any individual TI Resource only in connection with the development of applications that include the TI product(s) identified in such TI Resource. NO OTHER LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHT, AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTY RIGHT OF TI OR ANY THIRD PARTY IS GRANTED HEREIN, including but not limited to any patent right, copyright, mask work right, or other intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information regarding or referencing third-party products or services does not constitute a license to use such products or services, or a warranty or endorsement thereof. Use of TI Resources may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. TI RESOURCES ARE PROVIDED "AS IS" AND WITH ALL FAULTS. TI DISCLAIMS ALL OTHER WARRANTIES OR REPRESENTATIONS, EXPRESS OR IMPLIED, REGARDING RESOURCES OR USE THEREOF, INCLUDING BUT NOT LIMITED TO ACCURACY OR COMPLETENESS, TITLE, ANY EPIDEMIC FAILURE WARRANTY AND ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF ANY THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. TI SHALL NOT BE LIABLE FOR AND SHALL NOT DEFEND OR INDEMNIFY DESIGNER AGAINST ANY CLAIM, INCLUDING BUT NOT LIMITED TO ANY INFRINGEMENT CLAIM THAT RELATES TO OR IS BASED ON ANY COMBINATION OF PRODUCTS EVEN IF DESCRIBED IN TI RESOURCES OR OTHERWISE. IN NO EVENT SHALL TI BE LIABLE FOR ANY ACTUAL, DIRECT, SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF TI RESOURCES OR USE THEREOF, AND REGARDLESS OF WHETHER TI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Unless TI has explicitly designated an individual product as meeting the requirements of a particular industry standard (e.g., ISO/TS 16949 and ISO 26262), TI is not responsible for any failure to meet such industry standard requirements. Where TI specifically promotes products as facilitating functional safety or as compliant with industry functional safety standards, such products are intended to help enable customers to design and create their own applications that meet applicable functional safety standards and requirements. Using products in an application does not by itself establish any safety features in the application. Designers must ensure compliance with safety-related requirements and standards applicable to their applications. Designer may not use any TI products in life-critical medical equipment unless authorized officers of the parties have executed a special contract specifically governing such use. Life-critical medical equipment is medical equipment where failure of such equipment would cause serious bodily injury or death (e.g., life support, pacemakers, defibrillators, heart pumps, neurostimulators, and implantables). Such equipment includes, without limitation, all medical devices identified by the U.S. Food and Drug Administration as Class III devices and equivalent classifications outside the U.S. TI may expressly designate certain products as completing a particular qualification (e.g., Q100, Military Grade, or Enhanced Product). Designers agree that it has the necessary expertise to select the product with the appropriate qualification designation for their applications and that proper product selection is at Designers' own risk. Designers are solely responsible for compliance with all legal and regulatory requirements in connection with such selection. Designer will fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of Designer's noncompliance with the terms and provisions of this Notice. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright (c) 2018, Texas Instruments Incorporated Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Texas Instruments: LM48410SQ/NOPB LM48410SQBD LM48410SQE/NOPB LM48410SQX/NOPB