IRFE9110SCV - International Rectifier

Absolute Maximum Ratings

Parameter Units

ID @ VGS = -10V, TC = 25°C Continuous Drain Current -2.5

ID @ VGS = -10V, TC = 100°C Continuous Drain Current -1.6

IDM Pulsed Drain Current ➀-10

PD @ TC = 25°C Max. Power Dissipation 15 W

Linear Derating Factor 0.12 W/°C

VGS Gate-to-Source Voltage ±20 V

EAS Single Pulse Avalanche Energy ➁102 mJ

IAR A valanche Current ➀-A

EAR Repetitive Avalanche Energy ➀-mJ

dv/dt Peak Diode Recovery dv/dt ➂-14 V/ns

TJOperating Junction -55 to 150

TSTG Storage T emperature Range

Pckg. Mounting Surface Temp. 300 (for 5 S)

Weight 0.42(typical) g

PD - 91721C

The leadless chip carrier (LCC) package represents the

logical next step in the continual evolution of surface

mount technology. Desinged to be a close replacement

for the TO-39 package, the LCC will give designers the

extra flexibility they need to increase circuit board den-

sity. International Rectifier has engineered the LCC pack-

age to meet the specific needs of the power market by

increasing the size of the bottom source pad, thereby

enhancing the thermal and electrical performance. The

lid of the package is grounded to the source to reduce

RF interference.

10/03/01

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LCC-18

Product Summary

Part Number BVDSS RDS(on) ID

IRFE9110 -100V 1.2Ω -2.5A

Features:

nSurface Mount

nSmall Footprint

nAlternative to TO-39 Package

nHermetically Sealed

nDynamic dv/dt Rating

nAvalanche Energy Rating

nSimple Drive Requirements

nLight Weight

For footnotes refer to the last page

REPETITIVE A VALANCHE AND dv/dt RA TED IRFE9110

HEXFETTRANSISTORS

SURFACE MOUNT (LCC-18)

100V, P-CHANNEL

IRFE9110

2www.irf.com

Thermal Resistance

Parameter Min Typ Max Units T est Conditions

RthJC Junction to Case — — 8.3

RthJ-PCB Junction to PC Board — — 27 Soldered to a copper clad PC board

°C/W

Source-Drain Diode Ratings and Characteristics

Parameter Min Typ Max Units T est Conditions

ISContinuous Source Current (Body Diode) — — -2.5

ISM Pulse Source Current (Body Diode) ➀— — -10

VSD Diode F orward V oltage — — -5.5 V Tj = 25°C, IS = -2.5A, VGS = 0V ➃

trr Reverse Recovery Time — — 200 nS Tj = 25°C, IF = -2.5A, di/dt ≤-100A/µs

QRR Reverse Recovery Charge — — 380 µ c VDD ≤ -50V ➃

ton Forward Turn-On Time Intrinsic tur n-on time is negligible. Tu rn-on speed is substantially controlled by LS + LD.

For footnotes refer to the last page

Electrical Characteristics @ Tj = 25°C (Unless Otherwise Specified)

Parameter Min Typ Max Units T est Conditions

BVDSS Drain-to-Source Breakdown V oltage -100 — — V VGS = 0V, ID = -1.0mA

∆BVDSS/∆TJTemperature Coefficient of Breakdown — -0.08 — V/°C Ref ere nce to 2 5°C, ID = -1.0mA

Voltage

RDS(on) Static Drain-to-Source On-State — — 1.2 VGS = -10V, ID = -1.6A➃

Resistance — — 1.38 VGS = -10V, ID = -2.5A ➃

VGS(th) Gate Threshold V oltage -2.0 — -4.0 V VDS = VGS, ID = -250µA

gfs Forward Transconductance 0.9 — — S ( ) V

DS > -15V, IDS = -1.6A➃

IDSS Zero Gate V oltage Drain Current — — -25 VDS= -80V, VGS= 0V

— — -250 VDS =-80V

VGS = 0V, TJ = 125°C

IGSS Gate-to-Source Leakage Forward — — -100 VGS =-20V

IGSS Gate-to-Source Leakage Reverse — — 100 VGS =20V

QgTotal Gate Charge — — 15 VGS =-10V, ID= -2.5A

Qgs Gate-to-Source Charge — — 7.0 nC VDS =-50V

Qgd Gate-to-Drain (‘Miller’) Charge — — 8.0

td(on) Turn-On Delay Time — — 30 VDD =-50V, ID = -2.5A,

trRise Time — — 60 VGS =-10V, RG =7.5Ω

td(off) Turn-Off Delay Time — — 40

tfFall Time — — 40

LS + LDTotal Inductance — 6.1 —

Ciss Input Capacitance — 214 VGS = 0V, VDS = -25V

Coss Output Capacitance — 100 — pF f = 1.0MHz

Crss Reverse Transfer Capacitance — 20 —

Ω

µA

Ω

Measured from the center of

drain pad to center of source

pad

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IRFE9110

Fig 4. Normalized On-Resistance

Vs. Temperature

Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics

Fig 3. Typical Transfer Characteristics

0.1

100

0.1 1 10 100



20µs PULSE WIDTH

T = 25 C

J°



TOP

BOTTOM

VGS

-15V

-10V

-8.0V

-7.0V

-6.0V

-5.5V

-5.0V

-4.5V

-V , Drain-to-Source Voltage (V)

-I , Drain-to-Source Current (A)

-4.5V

0.1

100

0.1 1 10 100



20µs PULSE WIDTH

T = 150 C

J°



TOP

BOTTOM

VGS

-15V

-10V

-8.0V

-7.0V

-6.0V

-5.5V

-5.0V

-4.5V

-V , Drain-to-Source Volta

e (V)

-I , Drain-to-Source Current (A)

-4.5V

-60 -40 -20 020 40 60 80 100 120 140 160

0.0

0.5

1.0

1.5

2.0

2.5

T , Junction Temperature ( C)

R , Drain-to-Source On Resistance

(Normalized)

DS(on)



V =

I =

-10V

-2.6A

0.1

45678910



V = -50V

20µs PULSE WIDTH

-V , Gate-to-Source Voltage (V)

-I , Drain-to-Source Current (A)



T = 25 C

J°



T = 150 C

J°

IRFE9110

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Fig 8. Maximum Safe Operating Area

Fig 6. Typical Gate Charge Vs.

Gate-to-Source Voltage

Fig 5. Typical Capacitance Vs.

Drain-to-Source Voltage

Fig 7. Typical Source-Drain Diode

Forward Voltage

0 4 8 12

Q , Total Gate Charge (nC)

-V , Gate-to-Source Voltage (V)



FOR TEST CIRCUIT

SEE FIGURE

I =

-2.5 A



V = 20V

V = 50V

V = 80V

0.1

100

1 10 100 1000



OPERATION IN THIS AREA LIMITED

BY RDS(on)



Single Pulse

T = 150 C

= 25 C

°°

-V , Drain-to-Source Voltage (V)

-I , Drain Current (A)I , Drain Current (A)



100us



1ms



10ms

0.1

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5

-V ,Source-to-Drain Voltage (V)

-I , Reverse Drain Current (A)



V = 0 V



T = 150 C

J°



T = 25 C

J°

1 10 100

100

200

300

400

V , Drain-to-Source Voltage (V)

C, Capacitance (pF)



0V,

f = 1MHz

+ C

C SHORTED

iss gs gd , ds

rss gd

oss ds gd



Ciss



Coss



Crss

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IRFE9110

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

Fig 9. Maximum Drain Current Vs.

Case Temperature

Fig 10a. Switching Time Test Circuit

Fig 10b. Switching Time Waveforms

VDS

Pulse Width ≤ 1 µs

Duty Factor ≤ 0.1 %

VGS

VDD

RGD.U.T.

90%

10%

d(on)

d(off)

0.01

0.1

0.00001 0.0001 0.001 0.01 0.1 1



Notes:

1. Duty factor D = t / t

2. Peak T =P x Z + T

1 2

JDM thJC C



t , Rectangular Pulse Duration (sec)

Thermal Response(Z )

thJC

0.01

0.02

0.05

0.10

0.20

D = 0.50



SINGLE PULSE

(THERMAL RESPONSE)

25 50 75 100 125 150

0.0

1.0

2.0

3.0

T , Case Temperature( C)

-I , Drain Current (A)

0.01

0.1

0.00001 0.0001 0.001 0.01 0.1 1



Notes:

1. Duty factor D = t / t

2. Peak T = P x Z + T

1 2

JDM thJC C



t , Rectangular Pulse Duration (sec)

Thermal Response (Z )

thJC

0.01

0.02

0.05

0.10

0.20

D = 0.50



SINGLE PULSE

(THERMAL RESPONSE)

VGS

IRFE9110

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Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

Fig 12b. Unclamped Inductive Waveforms

Fig 12a. Unclamped Inductive Test Circuit

tpV

(

)

DSS

Fig 13b. Gate Charge Test Circuit

Fig 13a. Basic Gate Charge Waveform

Charge

-12V

D.U.T. VDS

-3mA

VGS

.3µF

50KΩ

.2µF

12V

Current Regulator

Same Type as D.U.T.

Current Sampling Resistors

-12V

25 50 75 100 125 150

100

200

300

Startin

T , Junction Temperature ( C)

E , Single Pulse Avalanche Energy (mJ)



TOP

BOTTOM

1.1A

1.6A

2.5A

-10V

0.01

Ω

D.U.T

DRIVER A

15V

-20V

VGS

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IRFE9110

Foot Notes: ➂ ISD ≤ -2.5A, di/dt ≤− 285A/µs,

VDD≤ -100V, TJ ≤ 150°C

Suggested RG =7.5 Ω

➀ Repetitive Rating; Pulse width limited by

maximum junction temperature.

➁ VDD =-25V, starting TJ = 25°C,

Peak IL = -2.5A, VGS =- 10V ➃ Pulse width ≤ 300 µs; Duty Cycle ≤ 2%

Case Outline and Dimensions — LCC-18

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information.

Data and specifications subject to change without notice. 10/01