FUJITSU MICROELECTRONICS
DATA SHEET
Copyright©2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2008.7
ASSP for Power Management Applications
1 ch DC/DC Converter IC Built-in
Switching FET, Synchronous Rectification,
and Down Conversion Support
MB39C014
DESCRIPTION
The MB39C014 is a current mode type 1-channel DC/DC converter IC built-in switching FET, synchronous
rectification, and down conversion support. The device is integrated with a switching FET, oscillator, error amplifier,
PWM control circuit, reference voltage source, and POWERGOOD circuit.
External inductor and decoupling capacitor are needed only for the external component.
As combining with external parts enables a DC/DC converter with a compact and high load response characteristic,
this is suitable as the built-in power supply for such as mobile phone/PDA, DVDs, and HDDs.
FEATURES
High efficiency : 96% (Max)
Output current (DC/DC) : 800 mA (Max)
Input voltage range : 2.5 V to 5.5 V
Operating frequency : 2.0/3.2 MHz (Typ)
No flyback diode needed
Low dropout operation : For 100% on duty
Built-in high-precision reference voltage generator : 1.20 V ± 2%
Consumption current in shutdown mode : 1 µA or less
Built-in switching FET : P-ch MOS 0.3 (Typ) N-ch MOS 0.2 (Typ)
High speed for input and load transient response in the current mode
Over temperature protection
Packaged in a compact package : SON10
APPLICATIONS
•Flash ROMs
MP3 players
Electronic dictionary devices
Surveillance cameras
Portable GPS navigators
Mobile phones
DS04-27253-1E
MB39C014
2DS04-27253-1E
PIN ASSIGNMENT
PIN DESCRIPTIONS
Pin No Pin name I/O Description
1 LX O Inductor connection output pin. High impedance during shut down.
2GNDGround pin.
3 CTL I Control input pin. (L : Shut down / H : Normal operation)
4 VREF O Reference voltage output pin.
5 POWERGOOD O POWERGOOD circuit output pin. Internally connected to an N-ch MOS open
drain circuit.
6 FSEL I Frequency switch pin.
(L (open) : 2.0 MHz, H : 3.2 MHz)
7 VREFIN I Error amplifier (Error Amp) non-inverted input pin.
8 MODE I Use pin at L level or leave open.
9 OUT I Output voltage feedback pin.
10 VDD Power supply pin.
(Top View)
(LCC-10P-M04)
POWERGOODVREFCTLGNDLX
VDD OUT MODE VREFIN FSEL
12345
109876
MB39C014
DS04-27253-1E 3
I/O PIN EQUIVALENT CIRCUIT DIAGRAM
GND
VDD
GND
VDD
LX VREF
POWER
GOOD
GND
FSEL
GND
VDD
MODE
GND
VDD
GND
VDD
CTL
GND
VDD
VREFIN OUT
* : ESD Protection device
MB39C014
4DS04-27253-1E
BLOCK DIAGRAM
VDD
ERR
×3Amplifier
I
OUT
Comparator
1.20 V VREF PWM
Logic
Control
ON/OFF
CTL
OUT
POWERGOOD
POWER
GOOD
VREF
VREFIN
DAC
MODE
FSEL GND
GND
LX VOUT
VDD
VIN
10
3
9
5
4
7
8
+
6 2
1
MB39C014
DS04-27253-1E 5
Current mode
Original voltage mode type:
Stabilize the output voltage by comparing two items below and on-duty control.
- Voltage (VC) obtained through negative feedback of the output voltage by Error Amp
- Reference triangular wave (VTRI)
Current mode type:
Instead of the triangular wave (VTRI), the voltage (VIDET) obtained through I-V conversion of the sum of currents
that flow in the oscillator (rectangular wave generation circuit) and SW FET is used.
Stabilize the output voltage by comparing two items below and on-duty control.
- Voltage (VC) obtained through negative feedback of the output voltage by Error Amp
- Voltage (VIDET) obtained through I-V conversion of the sum of current that flow in the oscillator (rectangular
wave generation circuit) and SW FET
VIN
ton
toff
VTRI
Vc
Vc
VTRI
VIN
toff
Vc
Vc
VIDET
S
R
ton
SR-FF
VIDET
Q
Voltage mode type model Current mode type model
Oscillator
Note : The above models illustrate the general operation and an actual operation will be preferred in the IC.
MB39C014
6DS04-27253-1E
FUNCTION OF EACH BLOCK
PWM Logic control circuit
The built-in P-ch and N-ch MOS FETs are controlled for synchronization rectification according to the frequency
(2.0 MHz/3.2 MHz) oscillated from the built-in oscillator (square wave oscillation circuit).
IOUT comparator circuit
This circuit detects the current (ILX) which flows to the external inductor from the built-in P-ch MOS FET.
By comparing VIDET obtained through I-V conversion of peak current IPK of ILX with the Error Amp output, the built-
in P-ch MOS FET is turned off via the PWM Logic Control circuit.
Error Amp phase compensation circuit
This circuit compares the output voltage to reference voltages such as VREF. This IC has a built-in phase
compensation circuit that is designed to optimize the operation of this IC. This needs neither to be considered
nor addition of a phase compensation circuit and an external phase compensation device.
VREF circuit
A high accuracy reference voltage is generated with BGR (bandgap reference) circuit. The output voltage is
1.20 V (Typ).
POWERGOOD circuit
The POWERGOOD circuit monitors the voltage at the OUT pin. Normally, use the POWERGOOD pin through
pull-up with an external resistor. When the OUT pin voltage reaches the output set voltage, it reaches the H level.
Timing chart example : (POWERGOOD pin pulled up to VIN)
Protection circuit
This IC has a built-in over-temperature protection circuit.
The over-temperature protection circuit turns off both N-ch and P-ch switching FETs when the junction
temperature reaches +135 °C. When the junction temperature comes down to + 110 °C, the switching FET is
returned to the normal operation.
Since the PWM control circuit of this IC is in the control method in current mode, the current peak value is also
monitored and controlled as required.
VIN
CTL
t
DLYPG
or less
t
DLYPG
t
DLYPG
VOUT
POWERGOOD
V
UVLO
V
OUT
×
97%
VUVLO : UVLO threshold voltage
tDLYPG : POWERGOOD delay time
MB39C014
DS04-27253-1E 7
FUNCTION TABLE
* : Don't care
MODE
Input Output
Switching
frequency CTL FSEL OUTPUT pin
voltage VREF POWERGOOD
Shutdown mode L * Output stop Output
stop Function stop
Operation mode 2.0 MHz H L VOUT voltage output 1.2 V Operation
3.2 MHz H H
MB39C014
8DS04-27253-1E
ABSOLUTE MAXIMUM RATINGS
*1 : Power dissipation value between + 25 °C and + 85 °C is obtained by connecting these two points with a straight
line
*2 : When mounted on a four- layer epoxy board of 11.7 cm × 8.4 cm
*3 : Connection at exposure pad with thermal via. (Thermal via 4 holes)
*4 : Connection at exposure pad, without a thermal via.
Notes The use of negative voltages below 0.3 V to the GND pin may create parasitic transistors on LSI lines,
which can cause abnormal operation.
This device can be damaged if the LX pin is short-circuited to VDD or GND.
Take measures not to keep the FSEL pin falling below the GND potential of this IC as much as possible.
In addition to erroneous operation, the IC may latch up and destroy itself if 110 mA or more current flows
from this pin.
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
Parameter Symbol Condition Rating Unit
Min Max
Power supply voltage VDD VDD pin 0.3 + 6.0 V
Signal input voltage VISIG
OUT pin 0.3 VDD + 0.3
VCTL, MODE, FSEL pins 0.3 VDD + 0.3
VREFIN pin 0.3 VDD + 0.3
POWERGOOD pull-up voltage VIPG POWERGOOD pin 0.3 + 6.0 V
LX voltage VLX LX pin 0.3 VDD + 0.3 V
LX peak current IPK ILX 1.8 A
Power dissipation PD
Ta + 25 °C2632*1, *2, *3
mW
980*1, *2, *4
Ta = + 85 °C1053*1, *2, *3
mW
392*1, *2, *4
Operating ambient temperature Ta 40 + 85 °C
Storage temperature TSTG 55 + 125 °C
MB39C014
DS04-27253-1E 9
RECOMMENDED OPERATING CONDITIONS
Note : The output current from this device has a situation to decrease if the power supply voltage (VIN) and the DC/DC
converter output voltage (VOUT) differ only by a small amount. This is a result of slope compensation and will
not damage this device.
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
representatives beforehand.
Parameter Symbol Condition Value Unit
Min Typ Max
Power supply voltage VDD 2.5 3.7 5.5 V
VREFIN voltage VREFIN 0.15 1.20 V
CTL voltage VCTL 05.0 V
LX current ILX ⎯⎯800 mA
POWERGOOD current IPG ⎯⎯1mA
VREF output current IROUT
2.5 V VDD 3.0 V ⎯⎯0.5 mA
3.0 V VDD 5.5 V ⎯⎯ 1
Inductor value L 2.0 MHz (FSEL = L) 2.2 µH
3.2 MHz (FSEL = H) 1.5
MB39C014
10 DS04-27253-1E
ELECTRICAL CHARACTERISTICS
(Ta = + 25 °C, VDD = 3.7 V, VOUT setting value = 2.5 V, MODE = 0 V)
* : Standard design value
(Continued)
Parameter Symbol Pin
No. Condition Value Unit
Min Typ Max
DC/DC
converter
block
Input current
IREFINM
7
VREFIN = 0.833 V 100 0 + 100 nA
IREFINLVREFIN = 0.15 V 100 0 + 100 nA
IREFINHVREFIN = 1.20 V 100 0 + 100 nA
Output voltage VOUT
9
VREFIN = 0.833 V,
OUT = 100 mA 2.45 2.50 2.55 V
Input stability LINE 2.5 V VDD 5.5 V *110 mV
Load stability LOAD 100 mA OUT
800 mA 10 mV
Out pin input
impedance ROUT OUT = 2.0 V 0.6 1.0 1.5 M
LX peak current IPK
1
Output shorted to GND 0.9 1.2 1.7 A
Oscillation
frequency
fOSC1 FSEL = 0 V 1.6 2.0 2.4 MHz
fOSC2 FSEL = 3.7 V 2.56 3.20 3.84 MHz
Rise delay time tPG 3, 9 C1 = 4.7 µF, OUT = 0 A,
VOUT = 90% 45 80 µs
SW NMOS FET
OFF voltage VNOFF
1
⎯−40* 20* 0* mV
SW PMOS FET
ON resistance RONP LX = 100 mA 0.30 0.47
SW NMOS FET
ON resistance RONN LX = 100 mA 0.20 0.36
LX leak current ILEAKM0 LX VDD*21.0 + 8.0 µA
ILEAKHVDD = 5.5 V, 0 LX VDD*22.0 + 16.0 µA
Protection
circuit block
Over temperature
protection
(Junction Temp.)
TOTPH
⎯⎯
+ 120* + 135* + 155* °C
TOTPL + 95* + 110* + 130* °C
UVLO threshold
voltage
VTHH
10
2.07 2.20 2.33 V
VTHL 1.92 2.05 2.18 V
UVLO hysteresis
width VHYS 0.08 0.15 0.25 V
MB39C014
DS04-27253-1E 11
(Continued)
(Ta = + 25 °C, VDD = 3.7 V, VOUT setting value = 2.5 V, MODE = 0 V)
*1 : The minimum value of VDD is the 2.5 V or VOUT setting value + 0.6 V, whichever is higher.
*2 : The + leak at the LX pin includes the current of the internal circuit.
*3 : Detected with respect to the output voltage setting value of VREFIN
*4 : Current consumption based on 100% ON-duty (High side FET in full ON state). The SW FET gate drive current
is not included because the device is in full ON state (no switching operation). Also the load current is not
included.
Parameter Symbol Pin
No. Condition Value Unit
Min Typ Max
POWER-
GOOD
block
POWERGOOD
threshold
voltage
VTHPG
5
*3
VREFIN ×
3
× 0.93
VREFIN ×
3
× 0.97
VREFIN ×
3
× 0.99
V
POWERGOOD
delay time
tDLYPG1 FSEL = 0 V 250 ⎯µs
tDLYPG2 FSEL = 3.7 V 170 ⎯µs
POWERGOOD
output voltage VOL POWERGOOD = 250 µA⎯⎯0.1 V
POWERGOOD
output current IOH POWERGOOD = 5.5 V ⎯⎯1.0 µA
Control
block
CTL threshold
voltage
VTHHCT
3
0.55 0.95 1.45 V
VTHLCT 0.40 0.80 1.30
CTL pin
input current IICTL CTL = 3.7 V ⎯⎯1.0 µA
FSEL threshold
voltage
VTHHFS 62.96 ⎯⎯
V
VTHLFS ⎯⎯0.74
Reference
voltage
block
VREF voltage VREF
4
VREF = 2.7 µA,
OUT = 100 mA 1.176 1.200 1.224 V
VREF load
stability LOADREF VREF = 1.0 mA ⎯⎯20 mV
General
Shut down
power supply
current
IVDD1
10
CTL = 0 V,
All circuits in OFF state ⎯⎯1.0 µA
IVDD1H CTL = 0 V, VDD = 5.5 V ⎯⎯1.0 µA
Standby power
supply current
(DC/DC)
IVDD2 CTL = 3.7 V, OUT = 0 A,
FSEL = 0 V 4.0 8.0 mA
Power-on
invalid current IVDD CTL = 3.7 V,
VOUT = 90%*4800 1500 µA
MB39C014
12 DS04-27253-1E
TEST CIRCUIT FOR MEASURING TYPICAL OPERATING CHARACTERISTICS
Note : These components are recommended based on the operating tests authorized.
TDK : TDK Corporation
SSM : SUSUMU Co., Ltd
KOA : KOA Corporation
Component Specification Vendor Part Number Remark
R1 1 MKOA RK73G1JTTD D 1 M
R3-1
R3-2
7.5 k
120 k
SSM
SSM
RR0816-752-D
RR0816-124-D At VOUT = 2.5 V setting
R4 300 kSSM RR0816-304-D
R5 1 MKOA RK73G1JTTD D 1 M
C1 4.7 µF TDK C2012JB1A475K
C2 4.7 µF TDK C2012JB1A475K
C6 0.1 µF TDK C1608JB1H104K For adjusting slow start
time
L1 2.2 µH TDK VLF4012AT-2R2M 2.0 MHz operation
1.5 µH TDK VLF4012AT-1R5M 3.2 MHz operation
VIN
VOUT
L1
C1 IOUT
C2
SW
CTL
MODE
VREF
VREFIN GND
OUT
LX
VDD
GND
R5
VDD VDD
MB39C014
POWER
GOOD
FSEL
R1
R4
R3-1
R3-2
SW
SW
C6
103
8
4
6
7
1
9
5
2
Output voltage = VREFIN × 2.97
MB39C014
DS04-27253-1E 13
APPLICATION NOTES
[1] Selection of components
Selection of an external inductor
Basically it dose not need to design inductor. This IC is designed to operate efficiently with a 2.2 µH (2.0 MHz
operation) or 1.5 µH (3.2 MHz operation) inductor.
The inductor should be rated for a saturation current higher than the LX peak current value during normal
operating conditions, and should have a minimal DC resistance. (100 m or less is recommended.)
LX peak current value IPK is obtained by the following formula.
L : External inductor value
IOUT : Load current
VIN : Power supply voltage
VOUT : Output setting voltage
D : ON- duty to be switched( = VOUT/VIN)
fosc : Switching frequency (2.0 MHz or 3.2 MHz)
ex) At VIN = 3.7 V, VOUT = 2.5 V, IOUT = 0.8 A, L = 2.2 µH, fosc = 2.0 MHz
The maximum peak current value IPK;
I/O capacitor selection
Select a low equivalent series resistance (ESR) for the VDD input capacitor to suppress dissipation from ripple
currents.
Also select a low equivalent series resistance (ESR) for the output capacitor. The variation in the inductor
current causes ripple currents on the output capacitor which, in turn, causes ripple voltages an output equal
to the amount of variation multiplied by the ESR value. The output capacitor value has a significant impact on
the operating stability of the device when used as a DC/DC converter. Therefore, FUJITSU MICROELEC-
TRONICS generally recommends a 4.7 µF capacitor, or a larger capacitor value can be used if ripple voltages
are not suitable. If the VIN/VOUT voltage difference is within 0.6 V, the use of a 10 µF output capacitor value is
recommended.
Types of capacitors
Ceramic capacitors are effective for reducing the ESR and afford smaller DC/DC converter circuit. However,
power supply functions as a heat generator, therefore avoid to use capacitor with the F-temperature rating
( 80% to + 20%) . FUJITSU MICROELECTRONICS recommends capacitors with the B-temperature rating
( ± 10% to ± 20%).
Normal electrolytic capacitors are not recommended due to their high ESR.
Tantalum capacitor will reduce ESR, however, it is dangerous to use because it turns into short mode when
damaged. If you insist on using a tantalum capacitor, FUJITSU MICROELECTRONICS recommends the type
with an internal fuse.
IPK = IOUT +VIN VOUT × D × 1 = IOUT + (VIN VOUT) × VOUT
L fosc 2 2 × L × fosc × VIN
IPK = IOUT + (VIN VOUT) × VOUT = 0.8 A + (3.7 V 2.5 V) × 2.5 V := 0.89 A
2 × L × fosc × VIN 2 × 2.2 µH × 2 MHz × 3.7 V
MB39C014
14 DS04-27253-1E
[2] Output voltage setting
The output voltage VOUT of this IC is defined by the voltage input to VREFIN. Supply the voltage for inputting to
VREFIN from an external power supply, or set the VREF output by dividing it with resistors.
The output voltage when the VREFIN voltage is set by dividing the VREF voltage with resistors is shown in the
following formula.
Note : Refer to “ APPLICATIN CIRCUIT EXAMPLES” for an example of this circuit.
Although the output voltage is defined according to the dividing ratio of resistance, select the resistance value
so that the current flowing through the resistance does not exceed the VREF current rating (1 mA) .
[3] About conversion efficiency
The conversion efficiency can be improved by reducing the loss of the DC/DC converter circuit.
The total loss (PLOSS) of the DC/DC converter is roughly divided as follows :
PLOSS = PCONT + PSW + PC
PCONT : Control system circuit loss (The power used for this IC to operate, including the the gate driving
power for internal SW FETs)
PSW : Switching loss (The loss caused during switching of the IC's internal SW FETs)
PC : Continuity loss (The loss caused when currents flow through the IC's internal SW FETs and external
circuits )
The IC's control circuit loss (PCONT) is extremely small, less than 100 mW with no load.
As the IC contains FETs which can switch faster with less power, the continuity loss (PC) is more predominant
as the loss during heavy-load operation than the control circuit loss (PCONT) and switching loss (PSW) .
VOUT = 2.97 × VREFIN, VREFIN = R4 × VREF
R3 + R4
(VREF = 1.20 V)
R4
R3
VREF
VREFIN
VREF
VREFIN
MB39C014
4
7
MB39C014
DS04-27253-1E 15
Furthermore, the continuity loss (PC) is divided roughly into the loss by internal SW FET ON-resistance and by
external inductor series resistance.
PC = IOUT2 × (RDC + D × RONP + (1 D) × RONN)
D : Switching ON-duty cycle ( = VOUT / VIN)
RONP : Internal P-ch SW FET ON resistance
RONN : Internal N-ch SW FET ON resistance
RDC : External inductor series resistance
IOUT : Load current
The above formula indicates that it is important to reduce RDC as much as possible to improve efficiency by
selecting components.
[4] Power dissipation and heat considerations
The IC is so efficient that no consideration is required in most of the cases. However, if the IC is used at a low
power supply voltage, heavy load, high output voltage, or high temperature, it requires further consideration for
higher efficiency.
The internal loss (P) is roughly obtained from the following formula :
P = IOUT2 × (D × RONP + (1 D) × RONN)
D : Switching ON-duty cycle ( = VOUT / VIN)
RONP : Internal P-ch SW FET ON resistance
RONN : Internal N-ch SW FET ON resistance
IOUT : Output current
The loss expressed by the above formula is mainly continuity loss. The internal loss includes the switching loss
and the control circuit loss as well but they are so small compared to the continuity loss they can be ignored.
In this IC with RONP greater than RONN, the larger the on-duty cycle, the greater the loss.
When assuming VIN = 3.7 V, Ta = + 70 °C for example, RONP = 0.42 and RONN = 0.36 according to the graph
“MOS FET ON resistance vs. Operating ambient temperature”. The IC's internal loss P is 144 mW at VOUT = 2.5
V and IOUT = 0.6 A. According to the graph “Power dissipation vs. Operating ambient temperature”, the power
dissipation at an operating ambient temperature Ta of + 70 °C is 539 mW and the internal loss is smaller than
the power dissipation.
MB39C014
16 DS04-27253-1E
[5] Transient response
Normally, IOUT is suddenly changed while VIN and VOUT are maintained constant, responsiveness including the
response time and overshoot/undershoot voltage is checked. As this IC has built-in Error Amp with an optimized
design, it shows good transient response characteristics. However, if ringing upon sudden change of the load
is high due to the operating conditions, add capacitor C6 (e.g. 0.1 µF). (Since this capacitor C6 changes the
start time, check the start waveform as well.) This action is not required for DAC input.
[6] Board layout, design example
The board layout needs to be designed to ensure the stable operation of this IC.
Follow the procedure below for designing the layout.
Arrange the input capacitor (Cin) as close as possible to both the VDD and GND pins. Make a thru-hole (TH)
near the pins of this capacitor if the board has planes for power and GND.
Large AC currents flow between this IC and the input capacitor (Cin), output capacitor (CO), and external
inductor (L). Group these components as close as possible to this IC to reduce the overall loop area occupied
by this group. Also try to mount these components on the same surface and arrange wiring without thru-hole
wiring. Use thick, short, and straight routes to wire the net (The layout by planes is recommended.).
The feedback wiring to the OUT should be wired from the voltage output pin closest to the output capacitor
(CO). The OUT pin is extremely sensitive and should thus be kept wired away from the LX pin of this IC as far
as possible.
If applying voltage to the VREFIN pin through dividing resistors, arrange the resistors so that the wiring can
be kept as short as possible. Also arrange them so that the GND pin of the VREFIN resistor is close to the
IC's GND pin. Further, provide a GND exclusively for the control line so that the resistor can be connected via
a path that does not carry current. If installing a bypass capacitor for the VREFIN, put it close to the VREFIN pin.
Try to make a GND plane on the surface to which this IC will be mounted. For efficient heat dissipation when
using the SON-10 package, FUJITSU MICROELECTRONICS recommends providing a thermal via in the
footprint of the thermal pad.
Layout Example of IC SW components
R4
C6
R3
VREF
VREFIN
VREF
VREFIN
MB39C014
4
7
Co Cin
Vo L
GND
1 Pin VIN
Feedback line
MB39C014
DS04-27253-1E 17
Notes for Circuit Design
The switching operation of this IC works by monitoring and controlling the peak current which, incidentally,
serves as form of short-circuit protection. However, do not leave the output short-circuited for long periods of
time. If the output is short-circuited where VIN < 2.9 V, the current limit value (peak current to the inductor)
tends to rise. Leaving in the short-circuit state, the temperature of this IC will continue rising and activate the
thermal protection.
Once the thermal protection stops the output, the temperature of the IC will go down and operation will resume,
after which the output will repeat the starting and stopping.
Although this effect will not destroy the IC, the thermal exposure to the IC over prolonged hours may affect the
peripherals surrounding it.
MB39C014
18 DS04-27253-1E
EXAMPLE OF STANDARD OPERATION CHARACTERISTICS
(Shown below is an example of characteristics for connection according to“TEST CIRCUIT FOR MEASURING
TYPICAL OPERATING CHARACTERISTICS”.)
(Continued)
0
10
20
30
40
50
60
70
80
90
100
1 10 100 1000
VIN = 3.7 V
VIN = 4.2 V
VIN = 3.0 V
Ta
= +
25
°C
V
OUT
=
2.5 V
FSEL
=
L
VIN = 5.0 V
0
10
20
30
40
50
60
70
80
90
100
1 10 100 1000
Ta
= +
25
°C
V
OUT
=
1.2 V
FSEL
=
L
VIN = 3.7 V
VIN = 3.0 V
VIN = 4.2 V
VIN = 5.0 V
Ta
= +
25
°C
V
OUT
=
1.8 V
FSEL
=
L
0
10
20
30
40
50
60
70
80
90
100
1 10 100 1000
VIN = 3.7 V
VIN = 3.0 V
VIN = 4.2 V
VIN = 5.0 V
Ta
= +
25
°C
V
OUT
=
3.3 V
FSEL
=
L
0
10
20
30
40
50
60
70
80
90
100
1 10 100 1000
VIN = 3.7 V
VIN = 4.2 V
VIN = 5.0 V
Load current IOUT (mA)
Conversion efficiency η (%)
Load current IOUT (mA)
Conversion efficiency η (%)
Load current IOUT (mA)
Conversion efficiency η (%)
Load current IOUT (mA)
Conversion efficiency η (%)
Conversion efficiency vs. Load current
(2.0 MHz)
Conversion efficiency vs. Load current
(2.0 MHz)
Conversion efficiency vs. Load current
(2.0 MHz)
Conversion efficiency vs. Load current
(2.0 MHz)
MB39C014
DS04-27253-1E 19
(Continued)
10
20
30
40
50
60
70
80
90
100
1 10 100 1000
0
VIN = 3.7 V
VIN = 3.0 V
VIN = 4.2 V
VIN = 5.0 V
Ta
= +
25
°C
V
OUT
=
2.5 V
FSEL
=
H
10
20
30
40
50
60
70
80
90
100
1 10 100 1000
0
VIN = 3.7 V
VIN = 3.0 V
VIN = 4.2 V
VIN = 5.0 V
Ta
= +
25
°C
V
OUT
=
1.2 V
FSEL
=
H
10
20
30
40
50
60
70
80
90
100
1 10 100 1000
0
VIN = 3.7 V
VIN = 3.0 V
VIN = 4.2 V
VIN = 5.0 V
Ta
= +
25
°C
V
OUT
=
1.8 V
FSEL
=
H
10
20
30
40
50
60
70
80
90
100
1 10 100 1000
0
VIN = 4.2 V
VIN = 5.0 V
Ta
= +
25
°C
V
OUT
=
3.3 V
FSEL
=
H
VIN = 3.7 V
Load current IOUT (mA)
Conversion efficiency η (%)
Load current IOUT (mA)
Conversion efficiency η (%)
Load current IOUT (mA)
Conversion efficiency η (%)
Load current IOUT (mA)
Conversion efficiency η (%)
Conversion efficiency vs. Load current
(3.2 MHz)
Conversion efficiency vs. Load current
(3.2 MHz)
Conversion efficiency vs. Load current
(3.2 MHz)
Conversion efficiency vs. Load current
(3.2 MHz)
MB39C014
20 DS04-27253-1E
(Continued)
2.40
2.0 3.0 4.0 5.0 6.0
2.42
2.44
2.46
2.48
2.50
2.52
2.54
2.56
2.58
2.60
IOUT
=
0 A
IOUT
=
100 mA
2.40
2.0 3.0 4.0 5.0 6.0
2.42
2.44
2.46
2.48
2.50
2.52
2.54
2.56
2.58
2.60
IOUT
=
0 A
IOUT
=
100 mA
0 200 400 600 800
2.40
2.42
2.44
2.46
2.48
2.50
2.52
2.54
2.56
2.58
2.60
0 200 400 600 800
2.40
2.42
2.44
2.46
2.48
2.50
2.52
2.54
2.56
2.58
2.60
Input voltage VIN (V)
Output voltage VOUT (V)
Input voltage VIN (V)
Output voltage VOUT (V)
Load current IOUT (mA)
Output voltage VOUT (V)
Load current IOUT (mA)
Output voltage VOUT (V)
Output voltage vs. Input voltage
(2.0 MHz)
Output voltage vs. Input voltage
(3.2 MHz)
Output voltage vs. Load current
(2.0 MHz)
Output voltage vs. Load current
(3.2 MHz)
Ta = +25 °C
VOUT = 2.5 V setting
FSEL = L
Ta = +25 °C
VOUT = 2.5 V setting
FSEL = H
Ta = +25 °C
VIN = 3.7 V
VOUT = 2.5 V setting
FSEL = L
Ta = +25 °C
VIN = 3.7 V
VOUT = 2.5 V setting
FSEL = H
MB39C014
DS04-27253-1E 21
(Continued)
1.1
23456
1.12
1.14
1.16
1.18
1.2
1.22
1.24
1.26
1.28
1.3
Ta
= +
25
°C
V
OUT
=
2.5 V
V
IN
=
3.7 V
V
OUT
=
2.5 V
1.1
1.12
1.14
1.16
1.18
1.2
1.22
1.24
1.26
1.28
1.3
50 0 +50 +100
0
2.0 3.0 4.0 5.0 6.0
1
2
3
4
5
6
7
8
9
10
Ta
= +
25
°C
V
OUT
=
2.5 V
0
50 0 +50 +100
1
2
3
4
5
6
7
8
9
10
V
IN
=
3.7 V
V
OUT
=
2.5 V
Reference voltage vs. Input voltage
Reference voltage VREF (V)
Input current vs. Operating ambient
temperature
Input current IIN (mA)
Input current vs. Input voltage
Input current IIN (mA)
Reference voltage vs. Operating
ambient temperature
Reference voltage VREF (V)
Input voltage VIN (V)
Operating ambient temperature Ta ( °C)
Input voltage VIN (V)
Operating ambient temperature Ta ( °C)
MB39C014
22 DS04-27253-1E
(Continued)
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.0 3.0 4.0 5.0 6.0
Ta
= +
25
°C
I
OUT
=
200 mA
V
OUT
=
2.5 V
FSEL
=
L
2.4
2.6
2.8
3.0
3.2
3.4
3.6
2.0 3.0 4.0 5.0 6.0
Ta
= +
25
°C
I
OUT
=
200 mA
V
OUT
=
2.5 V
FSEL
=
H
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
50 0 +50 +100
V
IN
=
3.7 V
I
OUT
=
200 mA
V
OUT
=
2.5 V
FSEL
=
L
2.4
2.6
2.8
3.0
3.2
3.4
3.6
50
0
+50 +100
V
IN
=
3.7 V
I
OUT
=
200 mA
V
OUT
=
2.5 V
FSEL
=
H
Input voltage VIN (V)
Oscillation frequency fOSC1 (MHz)
Input voltage VIN (V)
Oscillation frequency fOSC2 (MHz)
Operating ambient temperature Ta ( °C)
Oscillation frequency fOSC1 (MHz)
Operating ambient temperature Ta ( °C)
Oscillation frequency fOSC2 (MHz)
Oscillation frequency vs. Input voltage
(2.0 MHz)
Oscillation frequency vs. Input voltage
(3.2 MHz)
Oscillation frequency vs. Operating
ambient temperature (2.0 MHz)
Oscillation frequency vs. Operating
ambient temperature (3.2 MHz)
MB39C014
DS04-27253-1E 23
(Continued)
0.0
0.1
0.2
0.3
0.4
0.5
0.6
2.0 3.0 4.0 5.0 6.0
P-ch
N-ch
Ta
= +
25
°C
0.0
0.1
0.2
0.3
0.4
0.5
0.6
50
0
+50 +100
V
IN
=
3.7 V
V
IN
=
5.5 V
0.0
0.1
0.2
0.3
0.4
0.5
0.6
50
0
+50 +100
V
IN
=
5.5 V
V
IN
=
3.7 V
0.0
0.4
0.2
0.6
0.8
1.0
1.2
1.4
2.0 3.0 4.0 5.0 6.0
Ta
= +
25
°C
V
THHCT
V
THLCT
V
OUT
=
2.5 V
Input voltage VIN (V)
MOS FET ON resistance RON ()
Operating ambient temperature Ta ( °C)
P-ch MOS FET ON resistance RONP ()
Operating ambient temperature Ta ( °C)
N-ch MOS FET ON resistance RONN ()
Input voltage VIN (V)
CTL threshold voltage VTH (V)
MOS FET ON resistance vs.
Input voltage
P-ch MOS FET ON resistance vs.
Operating ambient temperature
N-ch MOS FET ON resistance vs.
Operating ambient temperature
CTL threshold voltage VTH vs.
Input voltage
VTHHCT : OFF ON
VTHLCT : ON OFF
MB39C014
24 DS04-27253-1E
(Continued)
500
0
1000
1500
2000
2500
3000
50 0 +50 +100
2632
+85
1053
500
0
1000
1500
2000
2500
3000
50 0 +50 +100
980
+85
392
Operating ambient temperature Ta ( °C)
Power dissipation PD (mW)
Operating ambient temperature Ta ( °C)
Power dissipation PD (mW)
Power dissipation vs. Operating
ambient temperature
(With thermal via)
Power dissipation vs. Operating
ambient temperature
(without thermal via)
MB39C014
DS04-27253-1E 25
Switching waveforms
I
LX
: 500 mA/div
V
LX
: 2.0 V/div
V
OUT
: 20 mV/div
Ta = +25 °C
V
IN
= 3.7 V
V
OUT
= 2.5 V
I
OUT
= 800 mA
1 µs/div
MB39C014
26 DS04-27253-1E
•Startup waveform
V
CTL
: 5.0 V/div
I
LX
: 500 mA/div
V
OUT
: 1.0 V/div
10 ms/div
Ta = +25 °C
VIN = 3.7 V
VOUT = 2.5 V
IOUT = 0 A
VREFIN Capacitor value =
0.1 µF
Ta = +25 °C
V
IN
= 3.7 V
V
OUT
= 2.5 V
I
OUT
= 0 A
V
CTL
:
2.0 V/div
I
LX
:
500 mA/div
V
OUT
:
1.0 V/div
20 µs/div
No VREFIN Capacitor
MB39C014
DS04-27253-1E 27
Output waveforms at sudden load changes (0 mA 800 mA)
Output waveforms at sudden load changes (100 mA 800 mA)
Ta = +25 °C
VIN = 3.7 V
VOUT = 2.5 V
10 µs/div
V
OUT
: 100 mV/div
I
OUT
= 0 mA I
OUT
= 800 mA I
OUT
= 0 mA
VREFIN Capacitor value =
0.1 µF
Ta = +25°C
VIN = 3.7 V
VOUT = 2.5 V
I
OUT
= 100 mA I
OUT
= 800 mA I
OUT
= 100 mA
V
OUT
: 100 mV/div
10 µs/div
VREFIN Capacitor value =
0.1 µF
MB39C014
28 DS04-27253-1E
APPLICATION CIRCUIT EXAMPLES
APPLICATION CIRCUIT EXAMPLE 1
An external voltage is input to the reference voltage external input (VREFIN) , and the VOUT voltage is set to
2.97 times the VOUT setting gain.
APPLICATION CIRCUIT EXAMPLE 2
The voltage of VREF pin is input to the reference voltage external input (VREFIN) by the dividing resistors.
The VOUT voltage is set to 2.5 V.
V
OUT
= 2.97 × V
REFIN
V
IN
CPU V
OUT
APLI
C2
C1
L1
R5
DAC
4.7 µF
4.7 µF
2.2 µH
1 M
VDD
CTL
FSEL
VREF
VREFIN
GND
LX
OUT
POWER
GOOD
MODE
L (OPEN) = 2.0 MHz
H = 3.2 MHz
10
3
8
5
9
1
6
4
7
2
V
OUT = 2.97 × VREFIN
VOUT = 2.97 ×
(VREF = 1.20 V)
VREFIN = R4
R3 + R4
R4
300 k
VDD
CTL
FSEL
VREF
VREFIN GND
LX
OUT
POWER
GOOD
MODE
10
3
8
5
9
1
6
4
7
2
L (OPEN) = 2.0 MHz
R3 127.5 k
H = 3.2 MHz
VOUT
APLI
C1
L1
4.7 µF
2.2 µH
(120 kΩ + 7.5 kΩ)
CPU
R5
1 M
VIN
C2
4.7 µF
× VREF
× 1.20 V = 2.5 V
300 k
127.5 kΩ + 300 k
MB39C014
DS04-27253-1E 29
Application Circuit Example Components List
TDK : TDK Corporation
FDK : FDK Corporation
KOA : KOA Corporation
Component Item Part Number Specification Package Vendor
L1 Inductor VLF4012AT-2R2M 2.2 µH, RDC = 76 mSMD TDK
MIPW3226D2R2M 2.2 µH, RDC = 100 mSMD FDK
C1 Ceramic
capacitor C2012JB1A475K 4.7 µF (10 V) 2012 TDK
C2 Ceramic
capacitor C2012JB1A475K 4.7 µF (10 V) 2012 TDK
R3 Resistor RK73G1JTTD D 7.5 k
RK73G1JTTD D 120 k
7.5 k
120 k
1608
1608 KOA
R4 Resistor RK73G1JTTD D 300 k300 k1608 KOA
R5 Resistor RK73G1JTTD D 1 M ± 0.5%1608 KOA
MB39C014
30 DS04-27253-1E
USAGE PRECAUTIONS
1. Do not configure the IC over the maximum ratings
lf the lC is used over the maximum ratings, the LSl may be permanently damaged.
It is preferable for the device to normally operate within the recommended usage conditions. Usage outside of
these conditions can adversely affect reliability of the LSI.
2. Use the devices within recommended operating conditions
The recommended operating conditions are the conditions under which the LSl is guaranteed to operate.
The electrical ratings are guaranteed when the device is used within the recommended operating conditions
and under the conditions stated for each item.
3. Take appropriate static electricity measures.
Containers for semiconductor materials should have anti-static protection or be made of conductive material.
After mounting, printed circuit boards should be stored and shipped in conductive bags or containers.
Work platforms, tools, and instruments should be properly grounded.
Working personnel should be grounded with resistance of 250 k to 1 M between body and ground.
4. Do not apply negative voltages.
The use of negative voltages below 0.3 V may create parasitic transistors on LSI lines, which can cause
abnormal operation.
ORDERING INFORMATION
Part number Package
MB39C014PN 10-pin plastic SON
(LCC-10P-M04)
MB39C014
DS04-27253-1E 31
RoHS COMPLIANCE INFORMATION OF LEAD (Pb) FREE VERSION
The LSI products of FUJITSU MICROELECTRONICS with “E1” are compliant with RoHS Directive, and has
observed the standard of lead, cadmium, mercury, hexavalent chromium, polybrominated biphenyls (PBB), and
polybrominated diphenylethers (PBDE).
A product whose part number has trailing characters “E1” is RoHS compliant.
MARKING FORMAT (LEAD FREE VERSION)
LABELING SAMPLE (LEAD FREE VERSION)
INDEX
XXXXX
X
Lead-free version
Lead-free mark
JEITA logo JEDEC logo
The part number of a lead-free product has the trailing
characters “E1”.
MB39C014
32 DS04-27253-1E
EVALUATION BOARD SPECIFICATION
The MB39C014 Evaluation Board provides the proper environment for evaluating the efficiency and other
characteristics of the MB39C014.
Terminal information
Startup terminal information
Jumper information
Symbol Functions
VIN
Power supply terminal.
In standard condition 3.1 V to 5.5 V*.
* When the VIN/VOUT difference is to be held within 0.6 V or less, such as for devices
with a standard output voltage (VOUT = 2.5 V) when VIN < 3.1 V, FUJITSU MICRO-
ELECTRONICS recommends changing the output capacity (C1) to 10 µF.
VOUT Output terminal.
VCTL Power supply terminal for setting the CTL terminal.
Use this terminal by connecting with CTL.
CTL
Direct supply terminal of CTL.
CTL = 0 V to 0.80 V (Typ.) : Shutdown
CTL = 0.95 V (Typ.) to VIN : Normal operation
MODE TEST terminal
OPEN or GND
VREF Reference voltage output terminal.
VREF = 1.20 V (Typ.)
VREFIN External reference voltage input terminal.
When an external reference voltage is supplied, connect to this terminal.
FSEL
Operating frequency range setting terminal.
FSEL = 0 V : 2.0 MHz operation
FSEL = VIN : 3.2 MHz operation*
* FUJITSU MICROELECTRONICS recommends changing the inductor to 1.5 µH.
POWERGOOD POWERGOOD output terminal.
"High" level output when if OUT voltage reaches 97% or more of output setting voltage.
PGND Ground terminal.
Connect power supply GND to the PGND terminal next to the VOUT terminal.
AGND Ground terminal.
Terminal name Condition Functions
CTL L : Open
H : Connect to VCTL
ON/OFF switch for the IC.
L : Shutdown
H : Normal operation
FSEL L : Open
H : Connect to VCTL
Setting switch of FSEL terminal.
L : 2.0 MHz operation
H : 3.2 MHz operation.
JP Functions
JP1 Short-circuited in the layout pattern of the board (normally used shorted).
JP2 Normally used shorted (0 )
MB39C014
DS04-27253-1E 33
Setup and checkup
(1) Setup
(1) -1. Connect the CTL terminal to the VCTL terminal.
(1) -2. Connect the power supply terminal to the VIN terminal, and the power supply GND terminal to the
PGND terminal. (Example of setting power supply voltage : 3.7 V)
(2) Checkup
Supply power to VIN. The IC is operating normally if VOUT = 2.5 V (Typ).
MB39C014
34 DS04-27253-1E
Component layout on the evaluation board (Top View)
PGND
VOUT
VREFIN FSEL
FSEL
CTL
MODE
MODE
POWER_GOOD
VREF
AGND
MB39C014EVB-06
Rev.1.0
VIN
C2
C1
C6
R4
R1
R3-1
SW1
VCTL
CTL
R5
JP2
R3-2
M1
JP1
L1
Short
Open
Top Side (Component side )
Bottom Side (Soldering side)
MB39C014
DS04-27253-1E 35
Evaluation board layout (Top View)
Top Side(Layer1)
Inside GND(Layer3)
Inside GND(Layer2)
Bottom Side(Layer4)
MB39C014
36 DS04-27253-1E
Connection diagram
JP2
JP1
I
IN
VIN
VOUT
L1
R4
R3-1
C1
C6
VCTL
CTL
VREF
VREFIN
I
OUT
MB39C014
PGND
C2
MODE
SW1
R5
R3-2
CTL
MODE
VREF
VREFIN GND
OUT
POWER
GOOD
LX
VDD
R1
FSEL
SW1
FSEL
POWER
GOOD
SW1
AGND
5
9
1
10
3
8
6
4
7
2
*
*
*
* Not mounted
MB39C014
DS04-27253-1E 37
Component list
Note : These components are recommended based on the operating tests authorized.
FML : FUJITSU MICROELECTRONICS LIMITED
TDK : TDK Corporation
KOA : KOA Corporation
SSM : SUSUMU Co., Ltd
EV BOARD ORDERING INFORMATION
Component Part Name Model Number Specification Package Vendor Remark
M1 IC MB39C014PN SON10 FML
L1 Inductor VLF4012AT-2R2M 2.2 µH,
RDC = 76 mSMD TDK
C1 Ceramic
capacitor C2012JB1A475K 4.7 µF (10 V) 2012 TDK
C2 Ceramic
capacitor C2012JB1A475K 4.7 µF (10 V) 2012 TDK
C6 Ceramic
capacitor C1608JB1H104K 0.1 µF (50 V) 1608 TDK
R1 Resister RK73G1JTTD D 1 M1 M ± 0.5%1608 KOA
R3-1 Resister RR0816P-752-D 7.5 k ± 0.5%1608 SSM
R3-2 Resister RR0816P-124-D 120 k ± 0.5%1608 SSM
R4 Resister RR0816P-304-D 300 k ± 0.5%1608 SSM
R5 Resister RK73G1JTTD D 1 M1 M ± 0.5%1608 KOA
SW1 Switch ⎯⎯
Not
mounted
JP1 Jumper ⎯⎯
Pattern-
shorted
JP2 Jumper RK73Z1J (50 m, Max) 1 A 1608 KOA
EV Board Part No. EV Board Version No. Remarks
MB39C014EVB-06 MB39C014EVB-06 Rev.1.0 SON10
MB39C014
38 DS04-27253-1E
PACKAGE DIMENSION
10-pin plastic SON Lead pitch 0.50 mm
Package width ×
package length 3.00 mm × 3.00 mm
Sealing method Plastic mold
Mounting height 0.75 mm MAX
Weight 0.018 g
10-pin plastic SON
(LCC-10P-M04)
(LCC-10P-M04)
C
2008 FUJITSU MICROELECTRONICS LIMITED C10004S-c-1-2
INDEX AREA
(.118±.004)
3.00±0.10
(.067±.004)
3.00±0.10
(.118±.004)
1.70±0.10
2.40±0.10
(.094±.004)
0.50(.020)
TYP
1PIN CORNER
(C0.30(C.012))
MAX
0.75(.030)
0.15(.006)
(.016±.004)
0.40±0.10
(.010±.001)
0.25±0.03
1 5
10 6
0.05(.002)
(.000 )
0.00 –0.00
+0.05
–.000
+.002
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
MB39C014
DS04-27253-1E 39
MEMO
MB39C014
FUJITSU MICROELECTRONICS LIMITED
Shinjuku Dai-Ichi Seimei Bldg. 7-1, Nishishinjuku 2-chome, Shinjuku-ku,
Tokyo 163-0722, Japan Tel: +81-3-5322-3347 Fax: +81-3-5322-3387
http://jp.fujitsu.com/fml/en/
For further information please contact:
North and South America
FUJITSU MICROELECTRONICS AMERICA, INC.
1250 E. Arques Avenue, M/S 333
Sunnyvale, CA 94085-5401, U.S.A.
Tel: +1-408-737-5600 Fax: +1-408-737-5999
http://www.fma.fujitsu.com/
Europe
FUJITSU MICROELECTRONICS EUROPE GmbH
Pittlerstrasse 47, 63225 Langen,
Germany
Tel: +49-6103-690-0 Fax: +49-6103-690-122
http://emea.fujitsu.com/microelectronics/
Korea
FUJITSU MICROELECTRONICS KOREA LTD.
206 KOSMO TOWER, 1002 Daechi-Dong,
Kangnam-Gu,Seoul 135-280
Korea
Tel: +82-2-3484-7100 Fax: +82-2-3484-7111
http://www.fmk.fujitsu.com/
Asia Pacific
FUJITSU MICROELECTRONICS ASIA PTE LTD.
151 Lorong Chuan, #05-08 New Tech Park,
Singapore 556741
Tel: +65-6281-0770 Fax: +65-6281-0220
http://www.fujitsu.com/sg/services/micro/semiconductor/
FUJITSU MICROELECTRONICS SHANGHAI CO., LTD.
Rm.3102, Bund Center, No.222 Yan An Road(E),
Shanghai 200002, China
Tel: +86-21-6335-1560 Fax: +86-21-6335-1605
http://cn.fujitsu.com/fmc/
FUJITSU MICROELECTRONICS PACIFIC ASIA LTD.
10/F., World Commerce Centre, 11 Canton Road
Tsimshatsui, Kowloon
Hong Kong
Tel: +852-2377-0226 Fax: +852-2376-3269
http://cn.fujitsu.com/fmc/tw
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with sales representatives before ordering.
The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose
of reference to show examples of operations and uses of FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS
does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporat-
ing the device based on such information, you must assume any responsibility arising out of such use of the information.
FUJITSU MICROELECTRONICS assumes no liability for any damages whatsoever arising out of the use of the information.
Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use
or exercise of any intellectual property right, such as patent right or copyright, or any other right of FUJITSU MICROELECTRONICS
or any third party or does FUJITSU MICROELECTRONICS warrant non-infringement of any third-party's intellectual property right or
other right by using such information. FUJITSU MICROELECTRONICS assumes no liability for any infringement of the intellectual
property rights or other rights of third parties which would result from the use of information contained herein.
The products described in this document are designed, developed and manufactured as contemplated for general use, including without
limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured
as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect
to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in
nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in
weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite).
Please note that FUJITSU MICROELECTRONICS will not be liable against you and/or any third party for any claims or damages arising
in connection with above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current
levels and other abnormal operating conditions.
Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of
the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws.
The company names and brand names herein are the trademarks or registered trademarks of their respective owners.
Edited Strategic Business Development Dept.