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IDT74FCT162374AT/CT/ET
FAST CMOS 16-BIT REGISTER (3-STATE) INDUSTRIAL TEMPERATURE RANGE
SEPTEMBER 2009
IDT74FCT162374AT/CT/ET
INDUSTRIAL TEMPERATURE RANGE
FAST CMOS 16-BIT
REGISTER (3-STATE)
DESCRIPTION:
The FCT162374T 16-bit edge-triggered D-type registers are built using
advanced dual metal CMOS technology. These high-speed, low-power
registers are ideal for use as buffer registers for data synchronization and
storage. The Output Enable (xOE) and clock (xCLK) controls are organized to
operate each device as two 8-bit registers or one 16-bit register with common
clock. Flow-through organization of signal pins simplifies layout. All inputs are
designed with hysteresis for improved noise margin.
The FCT162374T has balanced output drive with current limiting resistors.
This offers low ground bounce, minimal undershoot, and controlled output fall
times–reducing the need for external series terminating resistors.The
FCT162374T are plug-in replacements for the FCT16374T and ABT16374 for
on-board bus interface applications.
2
O
1
2
OE
2
CLK
2
D
1
TO SEVEN OTHER CHANNELS
C
D
1
OE
1
CLK
1
O
1
1
D
1
TO SEVEN OTHER CHANNELS
C
D
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
© 2009 Integrated Device Technology, Inc. DSC-5453/7
FEATURES:
• 0.5 MICRON CMOS Technology
• High-speed, low-power CMOS replacement for ABT functions
• Typical tSK(o) (Output Skew) < 250ps
• Low input and output leakage ≤≤
≤≤
≤1µA (max.)
•VCC = 5V ±10%
• Balanced Output Drivers: ±24mA
• Reduced system switching noise
• Typical VOLP (Output Ground Bounce) < 0.6V at VCC = 5V,
TA = 25°C
• Available in SSOP and TSSOP packages
FUNCTIONAL BLOCK DIAGRAM
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INDUSTRIAL TEMPERATURE RANGE
IDT74FCT162374AT/CT/ET
FAST CMOS 16-BIT REGISTER (3-STATE)
SSOP/ TSSOP
TOP VIEW
PIN CONFIGURATION
1
O
1
GND
1
O
3
V
CC
1
OE
GND
2
O
2
GND
V
CC
GND
1
O
2
1
O
4
1
O
5
1
O
6
1
O
7
1
O
8
2
O
1
2
O
3
2
O
4
2
O
5
2
O
7
2
O
8
2
O
6
2
OE
1
CLK
1
D
1
1
D
2
GND
1
D
3
1
D
4
V
CC
1
D
5
1
D
6
1
D
7
1
D
8
2
D
1
2
D
2
2
D
3
2
D
4
V
CC
2
D
5
2
D
7
2
D
8
2
D
6
2
CLK
GND
GND
GND
39
29
30
31
32
33
34
35
36
37
38
25
26
27
28
48
47
41
42
43
44
45
46
40
1
2
3
4
5
6
7
8
9
10
12
13
14
15
16
17
18
19
20
11
21
22
23
24
Symbol Description Max Unit
VTERM(2) Terminal Voltage with Respect to GND –0.5 to 7 V
VTERM(3) Terminal Voltage with Respect to GND –0.5 to VCC+0.5 V
TSTG Storage Temperature –65 to +150 °C
IOUT DC Output Current –60 to 120 mA
ABSOLUTE MAXIMUM RATINGS(1)(1)
(1)(1)
(1)
NOTES:
1 . Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. All device terminals except FCT162XXX Output and I/O terminals.
3. Output and I/O terminals terminals for FCT162XXX.
Symbol Parameter(1) Conditions Typ. Max. Unit
CIN Input Capacitance VIN = 0V 3.5 6 pF
COUT Output Capacitance VOUT = 0V 3.5 8 pF
CAPACITANCE (TA = +25°C, F = 1.0MHz)
NOTE:
1. This parameter is measured at characterization but not tested.
Pin Names Description
xDx Data Inputs
xCLK Clock Inputs
xOx 3-State Outputs
xOE 3-State Outputs Enable Input (Active LOW)
PIN DESCRIPTION
NOTE:
1 . H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High-Impedance
↑ = LOW-to-HIGH transition
Inputs Outputs
Function xDx xCLK xOE xOx
Hi-Z X L H Z
XHHZ
Load L ↑LL
Register H ↑LH
L↑HZ
H↑HZ
FUNCTION TABLE(1)
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IDT74FCT162374AT/CT/ET
FAST CMOS 16-BIT REGISTER (3-STATE) INDUSTRIAL TEMPERATURE RANGE
Symbol Parameter Test Conditions(1) Min. Typ.(2) Max. Unit
VIH Input HIGH Level Guaranteed Logic HIGH Level 2 — — V
VIL Input LOW Level Guaranteed Logic LOW Level — — 0 .8 V
IIH Input HIGH Current (Input pins)(5) VCC = Max. VI = VCC ——±1µA
Input HIGH Current (I/O pins)(5) ——±1
IIL Input LOW Current (Input pins)(5) VI = GND — — ±1µA
Input LOW Current (I/O pins)(5) ——±1
IOZH High Impedance Output Current VCC = Max. VO = 2.7V — — ±1µA
IOZL (3-State Output pins)(5) VO = 0.5V — — ±1
VIK Clamp Diode Voltage VCC = Min., IIN = –18mA — –0.7 –1.2 V
IOS Short Circuit Current VCC = Max., VO = GND(3) –80 –140 –250 mA
VHInput Hysteresis — — 100 — mV
ICCL Quiescent Power Supply Current VCC = Max. — 5 500 µA
ICCH VIN = GND or VCC
ICCZ
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: TA = –40°C to +85°C, VCC = 5.0V ±10%
Symbol Parameter Test Conditions(1) Min Typ.(2) Max. Unit
IODL Output LOW Current VCC = 5V, VIN = VIH or VIL, VO = 1.5V(3) 60 115 200 mA
IODH Output HIGH Current VCC = 5V, VIN = VIH or VIL, VO = 1.5V(3) –60 –115 –200 mA
VOH Output HIGH Voltage VCC = Min IOH = –24mA 2 . 4 3 . 3 — V
VIN = VIH or VIL
VOL Output LOW Voltage VCC = Min IOL = 24mA — 0.3 0.55 V
VIN = VIH or VIL
OUTPUT DRIVE CHARACTERISTICS
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. Duration of the condition can not exceed one second.
5. The test limit for this parameter is ±5µA at TA = –55°C.
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INDUSTRIAL TEMPERATURE RANGE
IDT74FCT162374AT/CT/ET
FAST CMOS 16-BIT REGISTER (3-STATE)
Symbol Parameter Test Conditions(1) Min. Typ.(2) Max. Unit
ΔICC Quiescent Power Supply Current VCC = Max. — 0.5 1.5 mA
TTL Inputs HIGH VIN = 3.4V(3)
ICCD Dynamic Power Supply VCC = Max. VIN = VCC — 60 100 µA/
Current(4) Outputs Open VIN = GND M Hz
xOE = GND
One Input Togging
50% Duty Cycle
ICTotal Power Supply Current(6) VCC = Max. VIN = VCC — 0.6 1.5 mA
Outputs Open VIN = GND
fCP = 10MHz
50% Duty Cycle VIN = 3.4V — 1.1 3
xOE = GND VIN = GND
fi = 5MHz
50% Duty Cycle
One Bit Toggling
VCC = Max. VIN = VCC — 3 5.5(5)
Outputs Open VIN = GND
fCP = 10MHz
50% Duty Cycle
xOE = GND VIN = 3.4V — 7.5 19(5)
Sixteen BitsTogging VIN = GND
fi = 2.5MHz
50% Duty Cycle
POWER SUPPLY CHARACTERISTICS
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ΔICC DHNT + ICCD (fCPNCP/2 + fiNi)
ICC = Quiescent Current (ICCL, ICCH and ICCZ)
ΔICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
NCP = Number of Clock Inputs at fCP
fi = Input Frequency
Ni = Number of Inputs at fi
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IDT74FCT162374AT/CT/ET
FAST CMOS 16-BIT REGISTER (3-STATE) INDUSTRIAL TEMPERATURE RANGE
74FCT162374AT 74FCT162374CT 74FCT162374ET
Symbol Parameter Condition(1) Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit
tPLH Propagation Delay CL = 50pF 2 6.5 2 5.2 1.5 3.7 ns
tPHL xCLK to xOx RL = 500Ω
tPZH Output Enable Time 1.5 6.5 1.5 5.5 1.5 4.4 ns
tPZL
tPHZ Output Disable Time 1.5 5.5 1.5 5 1.5 3.6 ns
tPLZ
tSU Set-up Time HIGH or LOW, xDx to xCLK 2 — 2 — 1.5 — ns
tHHold Time HIGH or LOW, xDx to xCLK 1.5 — 1.5 — 0 — ns
tWxCLK Pulse Width HIGH or LOW 5 — 5 — 3(4) —ns
tSK(o) Output Skew(3) — 0.5 — 0.5 — 0.5 ns
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
4. This limit is guaranteed but not tested.
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INDUSTRIAL TEMPERATURE RANGE
IDT74FCT162374AT/CT/ET
FAST CMOS 16-BIT REGISTER (3-STATE)
Pulse
Generator
R
T
D.U.T.
V
CC
V
IN
C
L
V
OUT
50pF 500Ω
500Ω
7.0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
t
SU
t
H
t
REM
t
SU
t
H
PRESET
CLEAR
CLOCK ENABLE
ETC.
HIGH-LOW-HIGH
PULSE
LOW-HIGH-LOW
PULSE
t
W
1.5V
1.5V
SAME PHASE
INPUT TRANSITION
3V
1.5V
0V
1.5V
V
OH
t
PLH
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
3V
1.5V
0V
t
PLH
t
PHL
t
PHL
V
OL
CONTROL
INPUT
3V
1.5V
0V
3.5V
0V
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
CLOSED
SWITCH
OPEN
V
OL
0.3V
0.3V
t
PLZ
t
PZL
t
PZH
t
PHZ
3.5V
0V
1.5V
1.5V
ENABLE DISABLE
V
OH
TEST CIRCUITS AND WAVEFORMS
Propagation Delay
Test Circuit for All Outputs
Enable and Disable Times
Set-up, Hold and Release Times
Pulse Width
Test Switch
Open Drain
Disable Low Closed
Enable Low
All Other Tests Open
SWITCH POSITION
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
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IDT74FCT162374AT/CT/ET
FAST CMOS 16-BIT REGISTER (3-STATE) INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
XX
Temp. Range
XXXX
Device Type
XX
Package
PVG
PAG
Shrink Small Outline Package - Green
Thin Shrink Small Outline Packag - Green
16-Bit Register (3-State)
74 40C to +85C
162 Double-Density, 5 Volt, Balanced Drive
FCT XXX
Family
374AT
374CT
374ET
CORPORATE HEADQUARTERS for SALES: for Tech Support:
6024 Silver Creek Valley Road 800-345-7015 or 408-284-8200 logichelp@idt.com
San Jose, CA 95138 fax: 408-284-2775
www.idt.com
Datasheet Document History
09/06/09 Pg.6 Updated the ordering information by removing the "IDT" notation and non RoHS part.
