Rev. 2.0 August 2014 www.aosmd.com Page 1 of 15
AOZ1269QI-02
28V/12A Synchronous EZBuck
TM
Regulator
General Description
The AOZ1269-02 is a high-efficiency, easy-to-use DC/DC
synchronous buck regulator that operates up to 28V.
The device is capable of supplying 12A of continuous
output current with an output voltage adjustable down to
0.8V (±1.0%).
A proprietary constant on-time PWM control with input
feed-forward results in ultra-fast transient response while
maintaining relatively constant switching frequency over
the entire input voltage range. The switching frequency
can be externally programmed up to 1MHz.
The device features multiple protection functions such as
VCC under-voltage lockout, cycle-by-cycle current limit,
output over-voltage protection, short-circuit protection, as
well as thermal shutdown.
The AOZ1269-02 is available in a 4mm x 4mm QFN-23L
package and is rated over a -40°C to +85°C ambient
temperature range.
Features
Wide input voltage range
– 2.7V to 28V
12A continuous output current
Output voltage adjustable down to 0.8V (±1.0%)
Low RDS(ON) internal NFETs
– 18m high-side
– 8m low-side
Constant On-Time with input feed-forward
Programmable frequency up to 1MHz
Selectable PFM light load operation
Ceramic capacitor stable
Adjustable soft start
Power Good output
Integrated bootstrap diode
Cycle-by-cycle current limit
Short-circuit protection
Thermal shutdown
Thermally enhanced 4mm x 4mm QFN-23L package
Applications
Portable computers
Compact desktop PCs
Servers
Graphics cards
Set-top boxes
LCD TVs
Cable modems
Point-of-load DC/DC converters
Telecom/Networking/Datacom equipment
AOZ1269QI-02
Rev. 2.0 August 2014 www.aosmd.com Page 2 of 15
Typical Application
Ordering Information
AOS Green Products use reduced levels of Halogens, and are also RoHS compliant.
Please visit www.aosmd.com/media/AOSGreenPolicy.pdf for additional information.
Pin Configuration
Part Number Ambient Temperature Range Package Environmental
AOZ1269QI-02 -40°C to +85°C 23-Pin 4mm x 4mm QFN Green Product
AOZ1269-02
Input
2.7V to 28V
Output
1.05V, 12A
C3
88µF
R1
2.5kΩ
1%
R3
100kΩ
R2
8kΩ
1%
C2
20µF
C5
0.1µF
IN
Power Good
Off On
VCC
PGOOD
EN
PFM
SS
CSS
RTON
C4
1µF
BST
LX
FB
AGND
PGND
L1
1µH
TON
5V
1
23 21 20 19 18
789 1110
2
3
4
5
PGOOD
IN
IN
IN
LX
LX
SS
IN
VCC
BST
PGND
LX
EN
PFM
AGND
FB
23-Pin 4mm x 4mm QFN
(Top View)
17
16
15
13
12
LX
LX
PGND
PGND
PGND
PGND
LX
IN
14
6
TON
22
AOZ1269QI-02
Rev. 2.0 August 2014 www.aosmd.com Page 3 of 15
Pin Description
Pin Number Pin Name Pin Function
1 PGOOD
Power Good Signal Output. PGOOD is an open-drain output used to indicate the status
of the output voltage. It is internally pulled low when the output voltage is 18% lower than
the nominal regulation voltage for 50µs (typical time) or 20% higher than the nominal
regulation voltage. PGOOD is pulled low during soft-start and shut down.
2EN
Enable Input. The AOZ1269-02 is enabled when EN is pulled high. The device shuts
down when EN is pulled low.
3PFM
PFM Selection Input. Connect PFM pin to VCC/VIN for forced PWM operation. Connect
PFM pin to ground for PFM operation to improve light load efficiency.
4 AGND Analog Ground.
5FB
Feedback Input. Adjust the output voltage with a resistive voltage-divider between the
regulator’s output and AGND.
6 TON On-Time Setting Input. Connect a resistor between VIN and TON to set the on time.
7, 8, 9, 22 IN Supply Input. IN is the regulator input. All IN pins must be connected together.
12, 13, 14, 15, 19 PGND Power Ground.
10, 11, 16, 17, 18 LX Switching Node.
20 BST
Bootstrap Capacitor Connection. The AOZ1269-02 includes an internal bootstrap diode.
Connect an external capacitor between BST and LX as shown in the Typical Application
diagram.
21 VCC Supply Input for analog functions. Bypass VCC to AGND with a 1µF ceramic capacitor.
Place the capacitor close to VCC pin.
23 SS Soft-Start Time Setting Pin. Connect a capacitor between SS and AGND to set the
soft-start time.
AOZ1269QI-02
Rev. 2.0 August 2014 www.aosmd.com Page 4 of 15
Absolute Maximum Ratings
Exceeding the Absolute Maximum Ratings may damage the
device.
Note:
1. Devices are inherently ESD sensitive, handling precautions are
required. Human body model rating: 1.5kΩ in series with 100pF.
2. LX to PGND Transient (t<20ns) ------ -7V to VIN + 7V.
Maximum Operating Ratings
The device is not guaranteed to operate beyond the
Maximum Operating ratings.
Parameter Rating
IN, TON to AGND -0.3V to 30V
LX to AGND(2) -2V to 30V
BST to AGND -0.3V to 36V
SS, PGOOD, FB, EN, VCC, PFM to AGND -0.3V to 6V
PGND to AGND -0.3V to +0.3V
Junction Temperature (TJ) +150°C
Storage Temperature (TS) -65°C to +150°C
ESD Rating(1) 2kV
Parameter Rating
Supply Voltage (VIN) 2.7V to 28V
Output Voltage Range 0.8V to 0.85*VIN
Ambient Temperature (TA) -40°C to +85°C
Package Thermal Resistance
(θJA)40°C/W
(θJC) 4.5°C/W
Symbol Parameter Conditions Min. Typ. Max Units
VIN IN Supply Voltage 2.7 28 V
VUVLO Under-Voltage Lockout Threshold of VCC VCC rising
VCC falling 3.2 4.0
3.7 4.4 V
IqQuiescent Supply Current of VCC IOUT = 0, VFB = 1V, VEN > 2V 11.5mA
IOFF Shutdown Supply Current of VCC VEN = 0V 120A
VFB Feedback Voltage TA = 25°C
TA = 0°C to 85°C
0.792
0.788
0.800
0.800
0.808
0.812 V
Load Regulation 0.5 %
Line Regulation 1%
IFB FB Input Bias Current 200 nA
Enable
VEN EN Input Threshold Off threshold
On threshold 2.5
0.5 V
VEN_HYS EN Input Hysteresis 200 mV
PFM Control
VPFM PFM Input Threshold PFM Mode threshold
Force PWM threshold 2.5
0.5 V
VPFMHYS PFM Input Hysteresis 100 mV
Modulator
TON On Time RTON = 100k, VIN = 12V
RTON = 100k, VIN = 24V
200 250
150
300 ns
TON_MIN Minimum On Time 100 ns
TOFF_MIN Minimum Off Time 250 ns
Electrical Characteristics
TA = 25°C, VIN = 12V, VCC = 5V, EN = 5V, unless otherwise specified. Specifications in BOLD indicate a temperature range of
-40°C to +85°C.
AOZ1269QI-02
Rev. 2.0 August 2014 www.aosmd.com Page 5 of 15
Soft-Start
ISS_OUT SS Source Current VSS = 0
CSS = 0.001F to 0.1F71115A
Power Good Signal
VPG_LOW PGOOD Low Voltage IOL = 1mA 0.5 V
PGOOD Leakage Current ±1 A
VPGH PGOOD Threshold
(Low Level to High Level)
FB rising 82 85 88 %
VPGL PGOOD Threshold
(High Level to Low Level)
FB rising
FB falling
117
79
120
82
123
85 %
PGOOD Threshold Hysteresis 3 %
TPG_L PGOOD Fault Delay Time (FB falling) 50 s
Under Voltage and Over Voltage Protection
VPL Under Voltage Threshold FB falling 79 82 85 %
TPL Under Voltage Delay Time 128 s
VPH Over Voltage Threshold FB rising 117 120 123 %
TUV_LX Under Voltage Shutdown Blanking Time VIN = 12V, VEN = 0V, VCC = 5V 20 ms
Power Stage Outpu t
RDS(ON) High-Side NFET On-Resistance VIN = 12V, VCC = 5V 18 20 m
High-Side NFET Leakage VEN = 0V, VLX = 0V 10 A
RDS(ON) Low-Side NFET On-Resistance VLX = 12V, VCC = 5V 8 10 m
Low-Side NFET Leakage VEN = 0V 10 A
Over-current and Thermal Protection
ILIM Valley Current Limit VCC = 5V 13 A
Thermal Shutdown Threshold TJ rising
TJ falling
145
100 °C
Symbol Parameter Conditions Min. Typ. Max Units
Electrical Characteristics (Continued)
TA = 25°C, VIN = 12V, VCC = 5V, EN = 5V, unless otherwise specified. Specifications in BOLD indicate a temperature range of
-40°C to +85°C.
AOZ1269QI-02
Rev. 2.0 August 2014 www.aosmd.com Page 6 of 15
Functional Block Diagram
TON
Generator
ISENSE
ILIM_VALLEY
Error Comp
ILIM Comp
0.8V
ISENCE
(AC) FB
Decode
OTP
Reference
& Bias
BST
PG Logic
LX
AGNDPGND
ISENSE
ISENSE (AC)
Current
Information
Processing
Vcc
IN PGood
UVLO
TON
Timer
Q
TOFF_MIN
S
RQ
Timer
Q
TON
PFM
FB
SS
EN
VCC
Light Load
Threshold
ISENSE
Light Load
Comp
EN
Rev. 2.0 August 2014 www.aosmd.com Page 7 of 15
AOZ1269QI-02
Typical Performance Characteristics
Circuit of Typical Application. TA = 25°C, VIN = 19V, VOUT = 1.05V, fs = 450kHz unless otherwise specified.
Normal Operation
Vo ripple
10mV/div
VLX
10V/div
ILX
5A/div
5µs/div
Load Transient 1.2A to 10.8A
Vo ripple
50mV/div
ILX
5A/div
500µs/div
Full Load Start-up
LX
20V/div
EN
5V/div
Vo
1V/div
lLX
5A/div ILX
10A/div
Vo
500mV/div
LX
20V/div
500µs/div
Short Circuit Protection
100µs/div
AOZ1269QI-02
Rev. 2.0 August 2014 www.aosmd.com Page 8 of 15
Detailed Description
The AOZ1269-02 is a high-efficiency, easy-to-use,
synchronous buck regulator optimized for notebook
computers. The regulator is capable of supplying 10A of
continuous output current with an output voltage
adjustable down to 0.8V. The programmable operating
frequency range of 200kHz to 1MHz enables optimizing
the configuration for PCB area and efficiency.
The input voltage of AOZ1269-02 can be as low as 2.7V.
The highest input voltage of AOZ1269-02 can be 28V.
Constant on-time PWM with input feed-forward control
scheme results in ultra-fast transient response while
maintaining relatively constant switching frequency over
the entire input range. True AC current mode control
scheme guarantees the regulator can be stable with a
ceramic output capacitor. The switching frequency can
be externally programmed up to 1MHz. Protection
features include VCC under-voltage lockout, valley
current limit, output over voltage and under voltage
protection, short-circuit protection, and thermal
shutdown.
The AOZ1269-02 is available in 23-pin 4mm x 4mm QFN
package.
Enable and Soft Start
The AOZ1269-02 has external soft start feature to limit
in-rush current and ensure the output voltage ramps up
smoothly to regulation voltage. A soft start process
begins when VCC rises to 4.1V and voltage on EN pin is
HIGH. An internal current source charges the external
soft-start capacitor; the FB voltage follows the voltage of
soft-start pin (VSS) when it is lower than 0.8V. When VSS
is higher than 0.8V, the FB voltage is regulated by
internal precise band-gap voltage (0.8V). The soft-start
time can be calculated by the following formula:
TSS(
s) = 330 x CSS(nF)
If CSS is 1nF, the soft-start time will be 330µs; if CSS is
10nF, the soft-start time will be 3.3ms.
Constant-On-Time PWM Control with Input
Feed-Forward
The control algorithm of AOZ1269-02 is constant-on-time
PWM Control with input feed-forward.
The simplified control schematic is shown in Figure 1.
Figure 1. Simplified Control Schematic of AOZ1269-02
The high-side switch on-time is determined solely by a
one-shot whose pulse width can be programmed by one
external resistor and is inversely proportional to input
voltage (IN). The one-shot is triggered when the internal
0.8V is lower than the combined information of FB
voltage and the AC current information of inductor, which
is processed and obtained through the sensed lower-side
MOSFET current once it turns on. The added AC current
information can help the stability of constant-on time
control even with pure ceramic output capacitors, which
have very low ESR. The AC current information has no
DC offset, which does not cause offset with output load
change, which is fundamentally different from other V2
constant-on time control schemes.
The constant-on-time PWM control architecture is a
pseudo-fixed frequency with input voltage feed-forward.
The internal circuit of AOZ1269-02 sets the on-time of
high-side switch inversely proportional to the IN.
To achieve the flux balance of inductor, the buck
converter has the equation:
Once the product of VIN x TON is constant, the switching
frequency keeps constant and is independent with input
voltage.
An external resistor between the IN and TON pin sets the
switching frequency according to the following equation:
0.8V
FB Voltage/
AC Current
Information
Comp
Programmable
One-Shot
IN
PWM
+
–
TON
26.3 10 12–RTON
VIN V
----------------------------------------------------------------
=(1)
FSW VOUT
VIN TON
---------------------------
=(2)
FSW VOUT 1012
26.3 RTON
---------------------------------
=(3)
AOZ1269QI-02
Rev. 2.0 August 2014 www.aosmd.com Page 9 of 15
A further simplified equation will be:
If VOUT is 1.8V, RTON is 137k, the switching frequency
will be 500kHz.
This algorithm results in a nearly constant switching
frequency despite the lack of a fixed-frequency clock
generator.
True Current Mode Control
The constant-on-time control scheme is intrinsically
unstable if output capacitor’s ESR is not large enough as
an effective current-sense resistor. Ceramic capacitors
usually cannot be used as output capacitor.
The AOZ1269-02 senses the low-side MOSFET current
and processes it into DC and AC current information
using AOS proprietary technique. The AC current
information is decoded and added on the FB pin on
phase. With AC current information, the stability of
constant-on-time control is significantly improved even
without the help of output capacitor’s ESR, and thus the
pure ceramic capacitor solution can be applicable. The
pure ceramic capacitor solution can significantly reduce
the output ripple (no ESR caused overshoot and
undershoot) and less board area design.
Valley Current- Limit Protection
The AOZ1269-02 uses the valley current-limit protection
by using RDSON of the lower MOSFET current sensing.
To detect real current information, a minimum constant-
off (150ns typical) is implemented after a constant-on
time. If the current exceeds the valley current-limit
threshold, the PWM controller is not allowed to initiate a
new cycle. The actual peak current is greater than the
valley current-limit threshold by an amount equal to the
inductor ripple current. Therefore, the exact current-limit
characteristic and maximum load capability are a
function of the inductor value as well as input and output
voltages. The current limit will keep the low-side
MOSFET ON and will not allow another high-side on-
time, until the current in the low-side MOSFET reduces
below the current limit. Figure 2 shows the inductor
current during the current limit.
Figure 2. Inductor Current
After 128s (typical), the AOZ1269-02 considers this is a
true failed condition and therefore, turns-off both high-
side and low-side MOSFETs and latches off. When
triggered, only the enable can restart the AOZ1269-02
again.
Output Voltage Under-Voltage Protection
If the output voltage is lower than 18% by over-current or
short circuit, the AOZ1269-02 will wait for 128s (typical)
and turns-off both high-side and low-side MOSFETs and
latches off. When triggered, only the enable can restart
the AOZ1269-02 again.
Output Voltage Over-Voltage Protection
The threshold of OVP is set 20% higher than 800mV.
When the VFB voltage exceeds the OVP threshold, high-
side MOSFET is turned-off and low-side MOSFETs is
turned-on until VFB voltage is lower than 800mV.
Power Good Output
The power good (PGOOD) output, which is an open
drain output, requires the pull-up resistor. When the
output voltage is 18% below than the nominal regulation
voltage for 50s (typical), the PGOOD is pulled low.
When the output voltage is 20% higher than the nominal
regulation voltage, the PGOOD is also pulled low.
When combined with the under-voltage-protection circuit,
this current limit method is effective in almost every
circumstance.
FSW kHz
38000 VOUT
V
RTON k
-----------------------------------------------
=(4)
Inductor
Current
Time
Ilim
Rev. 2.0 August 2014 www.aosmd.com Page 10 of 15
AOZ1269QI-02
Application Information
The basic AOZ1269-02 application circuit is shown in
page 2. Component selection is explained below.
Input Capacitor
The input capacitor must be connected to the IN pins and
PGND pin of the AOZ1269-02 to maintain steady input
voltage and filter out the pulsing input current. A small
decoupling capacitor, usually 1F, should be connected
to the VCC pin and AGND pin for stable operation of the
AOZ1269-02. The voltage rating of input capacitor must
be greater than maximum input voltage plus ripple
voltage.
The input ripple voltage can be approximated by
equation below:
Since the input current is discontinuous in a buck
converter, the current stress on the input capacitor is
another concern when selecting the capacitor. For a buck
circuit, the RMS value of input capacitor current can be
calculated by:
if let m equal the conversion ratio:
The relation between the input capacitor RMS current
and voltage conversion ratio is calculated and shown in
Figure 3. It can be seen that when VO is half of VIN, CIN it
is under the worst current stress. The worst current
stress on CIN is 0.5 x IO.
Figure 3. ICIN vs. Voltage Conversion Ratio
For reliable operation and best performance, the input
capacitors must have current rating higher than ICIN-RMS
at worst operating conditions. Ceramic capacitors are
preferred for input capacitors because of their low ESR
and high ripple current rating. Depending on the
application circuits, other low ESR tantalum capacitor or
aluminum electrolytic capacitor may also be used. When
selecting ceramic capacitors, X5R or X7R type dielectric
ceramic capacitors are preferred for their better
temperature and voltage characteristics. Note that the
ripple current rating from capacitor manufactures is
based on certain amount of life time. Further de-rating
may be necessary for practical design requirement.
Inductor
The inductor is used to supply constant current to output
when it is driven by a switching voltage. For given input
and output voltage, inductance and switching frequency
together decide the inductor ripple current, which is:
The peak inductor current is:
High inductance gives low inductor ripple current but
requires a larger size inductor to avoid saturation. Low
ripple current reduces inductor core losses. It also
reduces RMS current through inductor and switches,
which results in less conduction loss. Usually, peak to
peak ripple current on inductor is designed to be 30% to
50% of output current.
When selecting the inductor, make sure it is able to
handle the peak current without saturation even at the
highest operating temperature.
The inductor takes the highest current in a buck circuit.
The conduction loss on the inductor needs to be checked
for thermal and efficiency requirements.
Surface mount inductors in different shapes and styles
are available from Coilcraft, Elytone and Murata.
Shielded inductors are small and radiate less EMI noise,
but they do cost more than unshielded inductors. The
choice depends on EMI requirement, price and size.
VIN IO
fC
IN
----------------- 1VO
VIN
---------
–
VO
VIN
---------
=
ICIN_RMS IOVO
VIN
---------1VO
VIN
---------
–
=
VO
VIN
---------m=
ILVO
fL
-----------1VO
VIN
---------
–
=
ILpeak IO
IL
2
--------
+=
0
0.1
0.2
0.3
0.4
0.5
0 0.5 1
m
I
CIN_RMS
(m)
I
O
AOZ1269QI-02
Rev. 2.0 August 2014 www.aosmd.com Page 11 of 15
Output Capacitor
The output capacitor is selected based on the DC output
voltage rating, output ripple voltage specification and
ripple current rating.
The selected output capacitor must have a higher rated
voltage specification than the maximum desired output
voltage including ripple. De-rating needs to be
considered for long term reliability.
Output ripple voltage specification is another important
factor for selecting the output capacitor. In a buck con-
verter circuit, output ripple voltage is determined by
inductor value, switching frequency, output capacitor
value and ESR. It can be calculated by the equation
below:
where,
CO is output capacitor value and
ESRCO is the Equivalent Series Resistor of output capacitor.
When a low ESR ceramic capacitor is used as output
capacitor, the impedance of the capacitor at the
switching frequency dominates. Output ripple is mainly
caused by capacitor value and inductor ripple current.
The output ripple voltage calculation can be simplified to:
If the impedance of ESR at switching frequency
dominates, the output ripple voltage is mainly decided by
capacitor ESR and inductor ripple current. The output
ripple voltage calculation can be further simplified to:
For lower output ripple voltage across the entire
operating temperature range, X5R or X7R dielectric type
of ceramic, or other low ESR tantalum are recommended
to be used as output capacitors.
In a buck converter, output capacitor current is
continuous. The RMS current of output capacitor is
decided by the peak to peak inductor ripple current.
It can be calculated by:
Usually, the ripple current rating of the output capacitor is
a smaller issue because of the low current stress. When
the buck inductor is selected to be very small and
inductor ripple current is high, the output capacitor could
be overstressed.
Thermal Management and Layout
Consideration
In the AOZ1269-02 buck regulator circuit, high pulsing
current flows through two circuit loops. The first loop
starts from the input capacitors, to the VIN pin, to the LX
pins, to the filter inductor, to the output capacitor and
load, and then returns to the input capacitor through
ground. Current flows in the first loop when the high side
switch is on. The second loop starts from the inductor, to
the output capacitors and load, to the low side switch.
Current flows in the second loop when the low side
switch is on.
In PCB layout, minimizing the two loops area reduces the
noise of this circuit and improves efficiency. A ground
plane is strongly recommended to connect the input
capacitor, output capacitor and PGND pin of the
AOZ1269-02.
In the AOZ1269-02 buck regulator circuit, the major
power dissipating components are the AOZ1269-02 and
output inductor. The total power dissipation of the con-
verter circuit can be measured by input power minus out-
put power.
The power dissipation of inductor can be approximately
calculated by output current and DCR of inductor and
output current.
The actual junction temperature can be calculated with
power dissipation in the AOZ1269-02 and thermal
impedance from junction to ambient.
The maximum junction temperature of AOZ1269-02 is
150ºC, which limits the maximum load current capability.
The thermal performance of the AOZ1269-02 is strongly
affected by the PCB layout. Extra care should be taken
by users during design process to ensure that the IC will
operate under the recommended environmental
conditions.
VOILESRCO 1
8fC
O
-------------------------
+
=
VOIL1
8fC
O
-------------------------
=
VOILESRCO
=
ICO_RMS
IL
12
----------
=
Ptotal_loss VIN IIN VOIO
–=
Pinductor_loss IO2Rinductor 1.1=
Tjunction Ptotal_loss Pinductor_loss
–
JA
=
AOZ1269QI-02
Rev. 2.0 August 2014 www.aosmd.com Page 12 of 15
Layout Considerations
Several layout tips are listed below for the best electric
and thermal performance.
1. The LX pins and pad are connected to internal low
side switch drain. They are low resistance thermal
conduction path and most noisy switching node.
Connect a large copper plane to LX pin to help
thermal dissipation.
2. The IN pins and pad are connected to internal high
side switch drain. They are also low resistance
thermal conduction path. Connect a large copper
plane to IN pins to help thermal dissipation.
3. Input capacitors should be connected to the IN pin
and the PGND pin as close as possible to reduce the
switching spikes.
4. Decoupling capacitor CVCC should be connected to
VCC and AGND as close as possible.
5. Voltage divider R1 and R2 should be placed as close
as possible to FB and AGND.
6. RTON should be put on PCB reverse side of feedback
network or away from FB pin and FB feedback resis-
tors to avoid unwanted touch to short Ton pin and FB
together to ground to cause improperly operation.
7. A ground plane is preferred; Pin 19 (PGND) must be
connected to the ground plane through via.
8. Keep sensitive signal traces such as feedback trace
far away from the LX pins.
9. Pour copper plane on all unused board area and
connect it to stable DC nodes, like VIN, GND or
VOUT.
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3*22'
(1
3)0
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)%
721
,1
,1
/;
3*1'
%67
9&&
,1
66
/;
/;
/;
3*1'
3*1'
,1
3*1'
,1
/;
/;
3*1'
/
;
/
;
/
;
/
;
/
;
/
;
,
1
,
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,
1
,
1
,
1
9LQ
/
;
9RXW
9
&&
9
9RXW
Rev. 2.0 August 2014 www.aosmd.com Page 13 of 15
AOZ1269QI-02
Package Dimensions, QFN 4x4B, 23 Lead EP2_S
TOP VIEW
SIDE VIEW
BOTTOM VIEW
D
Notes:
1. Controlling dimensions are in millimeters. Converted inch dimensions are not necessarily exact.
2. Tolerance: ± 0.05 unless otherwise specified.
3. Radius on all corners is 0.152 max., unless otherwise specified.
4. Package wrapage: 0.012 max.
5. No plastic flash allowed on the top and bottom lead surface.
6. Pad planarity: ± 0.102
7. Crack between plastic body and lead is not allowed.
RECOMMENDED LAND PATTERN Dimensions in millimeters Dimensions in inches
UNIT: MM
Pin #1 Dot
By Marking
E
Symbols Min. Typ. Max.
A
A1
A2
E
E1
E2
E3
D
D1
D2
D3
L
L1
L2
L3
L4
b
e
0.80
0.00
3.90
2.95
1.65
2.95
3.90
0.65
0.85
1.24
0.35
0.57
0.23
0.57
0.30
0.20
0.90
—
0.2 REF
4.00
3.05
1.75
3.05
4.00
0.75
0.95
1.34
0.40
0.62
0.28
0.62
0.35
0.25
0.50 BSC
1.00
0.05
4.10
3.15
1.85
3.15
4.10
0.85
1.05
1.44
0.45
0.67
0.33
0.67
0.40
0.30
Symbols Min. Typ. Max.
A
A1
A2
E
E1
E2
E3
D
D1
D2
D3
L
L1
L2
L3
L4
b
e
0.031
0.000
0.153
0.116
0.065
0.116
0.153
0.026
0.033
0.049
0.014
0.022
0.009
0.022
0.012
0.008
0.035
—
0.008 REF
0.157
0.120
0.069
0.120
0.157
0.030
0.037
0.053
0.016
0.024
0.011
0.024
0.014
0.010
0.020 BSC
0.039
0.002
0.161
0.124
0.073
0.124
0.161
0.034
0.041
0.057
0.018
0.026
0.013
0.026
0.016
0.012
D2 D3
L1
L
E1
e
bE3
L3
D1
D1
L2
L4
E2
A1
A
A2
0.37
0.50
0.45
0.25 0.25
0.22
3.10
2.75
3.10
3.43
0.37
0.75
0.95
0.25
0.75
1.34
0.04
AOZ1269QI-02
Rev. 2.0 August 2014 www.aosmd.com Page 14 of 15
Tape and Reel Dimensions, QFN 4x4, 23 Lead EP2_S
Carrier Tape
Reel
Tape Size
12mm
Reel Size
ø330
M
ø330.0
±2.0
N
ø79.0
±1.0
UNIT: mm
G
M
W1
S
K
H
N
W
V
R
Trailer Tape
300mm min.
Components Tape
Orientation in Pocket
Leader Tape
500mm min.
H
ø13.0
±0.5
W
12.4
+2.0/-0.0
W1
17.0
+2.6/-1.2
K
10.5
±0.2
S
2.0
±0.5
G
—
R
—
V
—
Leader/Trailer and Orientation
UNIT: mm
P1
D1 P2
B0
P0 D0
E2
E1
E
A0 Feeding Direction
Package A0 B0 K0 EE1E2
D0 D1 P0 P1 P2 T
4.35
±0.10 ±0.10
4.35
±0.10
1.10 1.50 1.50 12.00
±0.10
1.75
±0.05
5.50
±0.10
8.00
±0.10
4.00
±0.05
2.00
±0.05
0.30
±0.30
+0.10/-0Min.
QFN 4x4
(12mm)
T
K0
Rev. 2.0 August 2014 www.aosmd.com Page 15 of 15
AOZ1269QI-02
Part Marking
Part Number Code
Assembly Lot Code
Fab & Assembly Location
Year & Week Code
Z1269QI2
FAYWLT
AOZ1269QI-02
(QFN4x4)
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body or (b) support or sustain life, and (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of
the user.
2. A critical component in any component of a life
support, device, or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
LEGAL DISCLAIMER
Alpha and Omega Semiconductor makes no representations or warranties with respect to the accuracy or
completeness of the information provided herein and takes no liabilities for the consequences of use of such
information or any product described herein. Alpha and Omega Semiconductor reserves the right to make changes
to such information at any time without further notice. This document does not constitute the grant of any intellectual
property rights or representation of non-infringement of any third party’s intellectual property rights.
LIFE SUPPORT POLICY
ALPHA AND OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.
