DC1596A - Linear Technology

LTC3607

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RUN1 RUN2

SW2

LTC3607

VIN 12V

10µF

×2

10µF 121k 10µF121k

4.7µH 4.7µH

887k 549k

VOUT1

5V AT 600mA VOUT2

3.3V AT 600mA

3607 TA01a

SVIN

22pF 22pF

SW1

GND

VFB1 VFB2

PVIN2

PVIN1

Typical applicaTion

FeaTures DescripTion

Dual 600mA 15V Monolithic

Synchronous Step-Down

DC/DC Regulator

The LTC

3607 is a 15V dual 600mA monolithic synchro-

nous step-down regulator which has only 55µA quiescent

current. Intended for a variety of applications, including

dual lithium-ion battery products, it operates from a wide

4.5V to 15V input voltage range. It features a constant

2.25MHz switching frequency, enabling the use of tiny,

low cost capacitors and inductors 1mm or less in height.

Each output voltage is adjustable from 0.6V to VIN. The

internal synchronous power switches provide high ef-

ﬁciency without the need for external Schottky diodes.

A user selectable mode input is provided to allow the user

to trade off ripple noise for light load efﬁciency; Burst

Mode operation provides the highest efﬁciency at light

loads, while pulse-skipping mode provides the lowest

ripple noise.

To further the maximize battery run time, the P-channel

MOSFETs are turned on continuously in dropout (100%

duty cycle). In shutdown, the device draws <1µA.

applicaTions

n High Efﬁciency: Up to 96%

n Very Low Quiescent Current: 55µA Total

n 2.25MHz Constant Frequency Operation

n Low Dropout Operation: 100% Duty Cycle

n Low-Ripple (Typical 30mVP-P) Burst Mode

Operation

n Peak Current-Mode Control Architecture for Excellent

Line and Load Transient Response

n Wide Voltage Input Range: 4.5V to 15V

n 600mA/Channel Rated Output Current

n 0.6V Reference Allows Low Output Voltages

n ±1.5% Output Voltage Accuracy

n Ultralow Shutdown Current: IQ < 1µA

n Internal Compensation

n Power Good Outputs

n Externally Frequency Synchronization (1MHz to 4MHz)

n Independent Internal Soft-Start for Each Channel

n Small 16-Lead Thermally Enhanced Thin QFN

(3mm × 3mm) and MSE Packages

n Dual Lithium-Ion Battery Supplies

n Automotive Applications

n Servers

L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks

and Hot Swap is a trademark of Linear Technology Corporation. All other trademarks are the

property of their respective owners. Protected by U.S. Patents, including 5481178, 5847554,

6580258, 6304066, 6476589, 6774611.

Efﬁciency and Power Loss

vs Load Current

LOAD CURRENT (mA)

EFFICIENCY (%)

POWER LOSS (W)

3607 TA01b

100

0.1

0.01

0.001

01 100 100010

VIN = 12V

VOUT = 5V

VOUT = 3.3V

LTC3607

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pin conFiguraTion

absoluTe MaxiMuM raTings

PVIN, SVIN Voltages .................................... –0.3V to 15V

RUN1, RUN2 Voltages ................. –0.3V to (SVIN + 0.3V)

VFB1, VFB2 Voltages ................................... –0.3V to 3.6V

MODE/SYNC Voltage ................................. –0.3V to 3.6V

PGOOD1, PGOOD2 Voltages ...................... –0.3V to 15V

(Note 1)

16 15 14 13

5 6 7 8

TOP VIEW

UD PACKAGE

16-LEAD (3mm × 3mm) PLASTIC QFN

1MODE/SYNC

PGOOD1

SVIN

PGND1

SGND

PGOOD2

SGND

PGND2

RUN1

VFB1

VFB2

RUN2

SW1

PVIN1

PVIN2

SW2

PGND

TJMAX = 125°C, θJA = 68°C/W, θJC = 7.5°C/W

EXPOSED PAD (PIN 17) IS PGND, MUST BE SOLDERED TO PCB

SVIN

PGND1

SW1

PVIN1

PVIN2

SW2

PGND2

SGND

PGOOD1

MODE/SYNC

RUN1

VFB1

VFB2

RUN2

SGND

PGOOD2

TOP VIEW

PGND

MSE PACKAGE

16-LEAD PLASTIC MSOP

TJMAX = 125°C, θJA = 37°C/W, θJC = 10°C/W

EXPOSED PAD (PIN 17) IS PGND, MUST BE SOLDERED TO PCB

LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE

LTC3607EUD#PBF LTC3607EUD#TRPBF LFNB 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C (Note 2)

LTC3607IUD#PBF LTC3607IUD#TRPBF LFNB 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C (Note 2)

LTC3607EMSE#PBF LTC3607EMSE#TRPBF 3607 16-Lead Plastic MSOP –40°C to 125°C (Note 2)

LTC3607IMSE#PBF LTC3607IMSE#TRPBF 3607 16-Lead Plastic MSOP –40°C to 125°C (Note 2)

Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges. *The temperature grade is identiﬁed by a label on the shipping container.

Consult LTC Marketing for information on non-standard lead based ﬁnish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel speciﬁcations, go to: http://www.linear.com/tapeandreel/

Operating Junction Temperature Range

(Notes 2, 7) ............................................ –40°C to 125°C

Storage Temperature Range ................... –65°C to 150°C

Lead Temperature (Soldering, 10 sec)

MSOP Package .................................................300°C

orDer inForMaTion

LTC3607

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elecTrical characTerisTics

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

SVIN Operating Voltage Range l4.5 15 V

PVIN Operating Voltage Range l4.5 15 V

VOUT Output Voltage Range 0.6 PVIN V

VFB Feedback Voltage (Note 3)

0.591

0.588 0.6

0.6 0.609

0.612V

IFB Feedback Pin Input Current 30 nA

ΔVLINE REG Reference Voltage Line Regulation VIN = 4.5V to 15V (Note 3) 0.1 0.15 %/V

ΔVLOAD REG Output Voltage Load Regulation MODE/SYNC = 0V (Note 3) 0.5 %

ISInput DC Supply Current

Active Mode

Sleep Mode (Both Channels)

Sleep Mode (Single Channel)

Shutdown

(Note 4)

VFB1 = VFB2 = 0.5V

VFB1 = VFB2 = 0.64V

VFB(1 or 2) = 0.64V

RUN1 = RUN2 = 0V

3.2

0.1

µA

fOSC Oscillator Frequency VFB1, 2 = 0.6V l1.8 2.25 2.7 MHz

fSYNC Synchronization Frequency 1.0 4.0 MHz

ILIM Peak Switch Current Limit VFB1, 2 = 0.5V, Duty Cycle < 35% 0.75 11.25 A

RDS(ON) Top Switch On-Resistance

Bottom Switch On-Resistance (Note 6)

(Note 6) 0.6

0.25 Ω

UVLO SVIN Undervoltage Lockout Threshold SVIN Rising 3.4 4.3 V

PGOOD PGOOD1/2 Overvoltage Threshold VFB1, 2 Rising

VFB1, 2 Hysteresis

8.5

–3 11 %

PGOOD1/2 Undervoltage Threshold VFB1, 2 Ramping Down

VFB1, 2 Hysteresis –11 –8.5

PGOOD1/2 On-Resistance Channel 1 or Channel 2 Active

RUN1 = RUN2 = 0V 70

700 Ω

tPGOOD Power Good Blanking Time 64 Cycles

IPGOOD PGOOD Leakage 1 µA

VRUN RUN1/2 VIL

RUN1/2 VIH

0.55

3.0 V

IRUN RUN1/2 Leakage Current l0.01 1µA

VMODE/SYNC MODE/SYNC VIL

MODE/SYNC VIH

0.3

1.0 V

tSOFTSTART Internal Soft-Start Time VFB from 10% to 90% Full Scale

PVIN1 = PVIN2 = SVIN = 4.5V 0.35 ms

The l denotes the speciﬁcations which apply over the speciﬁed operating

junction temperature range, otherwise speciﬁcations are at TA = 25°C. VIN = 12V, unless otherwise speciﬁed. (Note 2)

Note 1. Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2. The LTC3607 is tested under pulsed load conditions such that

TJ ≈ TA. The LTC3607E is guaranteed to meet speciﬁcations from

0°C to 85°C junction temperature. Speciﬁcations over the –40°C to

125°C operating junction temperature range are assured by design,

characterization and correlation with statistical process controls. The

LTC3607I is guaranteed over the full –40°C to 125°C operating junction

temperature range.

The junction temperature (TJ) is calculated from the ambient temperature

(TA) and power dissipation (PD) according to the formula:

TJ = TA + (PD • θJA°C/W)

where θJA is the package thermal impedance. Note that the maximum

ambient temperature is consistent with these speciﬁcations determined by

speciﬁc operating conditions in conjunction with board layout, the rated

package thermal resistance and other environmental factors.

Note 3. The LTC3607 is tested in a proprietary test mode that connects

VFB to the output of the error ampliﬁer to an external servo loop.

Note 4. Dynamic supply current is higher due to the internal gate charge

being delivered at the switching frequency.

Note 5. TJ is calculated from the ambient TA and power dissipation PD

according to the following formula: TJ = TA + (PD • θJA).

Note 6. The QFN switch on-resistance is guaranteed by correlation to

wafer level measurements.

Note 7. This IC includes overtemperature protection that is intended

to protect the device during momentary overload conditions. Junction

temperature will exceed 125°C when overtemperature protection is active

Continuous operation above the speciﬁed maximum operating junction

temperature may impair device reliability.

LTC3607

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Typical perForMance characTerisTics

Efﬁciency vs Input Voltage

Burst Mode Operation Burst Mode Operation Pulse-Skipping Mode

Load Step in Burst Mode

Operation Start-Up (Burst Mode Operation)

VOUT Short to GND (Burst Mode

Operation)

Efﬁciency vs Load Current

Burst Mode Operation

Efﬁciency vs Load Current

Burst Mode Operation Efﬁciency vs Load Current

TA = 25°C, unless otherwise noted.

LOAD CURRENT (mA)

EFFICIENCY (%)

3607 G01

100

00.1 1 100

1000

VOUT = 2.5V

VIN = 5V

VIN = 8.4V

VIN = 12V

LOAD CURRENT (mA)

EFFICIENCY (%)

3607 G02

100

00.1 1 100

1000

VOUT = 3.3V

VIN = 5V

VIN = 8.4V

VIN = 12V

VIN = 8.4V

VOUT = 2.5V

ILOAD = 30mA TO 600mA

VOUT

100mV/DIV

200mA/DIV

3607 G07

20µs/DIV

VIN = 8.4V

VOUT = 2.5V

ILOAD = 20mA

RUN

2V/DIV

PGOOD

2V/DIV

VOUT

2V/DIV

0.5A/DIV

3607 G08

200µs/DIV

INPUT VOLTAGE (V)

EFFICIENCY (%)

3607 G04

100

50 4 6 12 14

108

ILOAD = 1mA

ILOAD = 10mA

ILOAD = 100mA

ILOAD = 600mA

VOUT = 3.3V

VIN = 8.4V

VOUT = 2.5V

LOAD

= 0A

PGOOD

2V/DIV

VOUT

1V/DIV

1A/DIV

3607 G09

100µs/DIV

VIN = 8.4V

VOUT = 2.5V

LOAD

= 100mA

5V/DIV

200mA/DIV

VOUT

50mV/DIV

3607 G05

2µs/DIV

VIN = 8.4V

VOUT = 2.5V

LOAD

= 20mA

5V/DIV

200mA/DIV

VOUT

50mV/DIV

3607 G06

2µs/DIV

LOAD CURRENT (mA)

EFFICIENCY (%)

3607 G03

100

00.1 1 100 100010

VIN = 8.4V

VOUT = 5V

Burst Mode OPERATION

PULSE SKIP

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Typical perForMance characTerisTics

RDS(ON) vs Input Voltage

RDS(ON) vs Temperature

Load Regulation

Line Regulation

Oscillator Frequency vs

Temperature

Reference Voltage vs

Temperature

TA = 25°C, unless otherwise noted.

TEMPERATURE (°C)

–50

FREQUENCY VARIATION (%)

–2

–4

–6

–8

–10

–12

3607 G10

1250 50–25 25 75 100

Switch Leakage vs Temperature

Peak Current Limit vs

Temperature

VIN (V)

∆V

OUT

ERROR (%)

0.4

0.3

0.2

0.1

–0.1

–0.2

–0.3

–0.4

3607 G15

8 106 12 14

TEMPERATURE (°C)

–50

(V)

0.605

0.603

0.601

0.599

0.597

0.595

3607 G11

125

0 50–25 25 75 100

VIN = 12V

TEMPERATURE (°C)

–50

PEAK CURRENT LIMIT (mA)

1200

1150

1100

1050

1000

950

900

3607 G16

125

0 25–25 50 75 100

VIN = 12V

TEMPERATURE (°C)

–50

LEAKAGE CURRENT (nA)

7000

6000

5000

4000

3000

2000

1000

3607 G14

150

250 50–25 75 100 125

TOP SWITCH

BOTTOM SWITCH

VIN = 12V

VIN (V)

RDS(ON) (Ω)

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

3607 G12

168 106 12 14

TOP SWITCH

BOTTOM SWITCH

TEMPERATURE (°C)

–50

RDS(ON) (Ω)

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

3607 G13

1250 50–25 75 100

VIN = 12V

TOP SWITCH

BOTTOM SWITCH

LOAD CURRENT (mA)

∆VOUT/VOUT (%)

3.5

3.0

2.5

2.0

1.5

1.0

0.5

–0.5

3607 G17

600200100 300 400 500

PULSE SKIP

Burst Mode OPERATION

VOUT = 3.3V

LTC3607

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pin FuncTions

PVIN1, PVIN2, SVIN (Pins 6, 7, 3/Pins 4, 5, 1): Main Power

Supply. Must be closely decoupled to GND. These inputs

may each be powered from different supply voltages.

Connect SVIN to either PVIN1 or PVIN2, whichever one

is higher. For applications where it’s not known which

PVIN(1 or 2) is higher, connect external diodes between SVIN

to both PVIN1 and PVIN2 to ensure that SVIN is less than a

diode drop from the higher of PVIN1 or PVIN2.

PGND1, PGND2, SGND, PGND (Pins 4, 9, 10, 12, Exposed

Pad Pin 17/Pins 2, 7, 8, 10, Exposed Pad Pin 17): Main

Ground. Connect to the (–) terminals of COUT1, COUT2, and

CIN. The exposed pad must be soldered to PCB ground for

electrical contact and rated thermal performance. All SGND

and PGND pins must be externally connected to ground.

VFB1 (Pin 15/Pin 13): Regulator 1 Output Feedback.

Receives the feedback voltage from the external resistor

divider across the regulator 1 output. Nominal voltage for

this pin is 0.6V.

SW1 (Pin 5/Pin 3): Regulator 1 Switch Node Connection

to the Inductor. This pin switches from PVIN1 to PGND1.

RUN1 (Pin 16/Pin 14): Regulator 1 Enable. Forcing this

pin high (above 3V) enables regulator 1, while forcing it

to SGND causes regulator 1 to shut down. It is possible

to use a 3.3V source to drive this pin, or tie it to SVIN.

An internal soft-start limits the rise time to a minimum

of 0.35ms.

PGOOD1 (Pin 2/Pin 16): Regulator 1 Power Good. This

common-drain logic output is pulled to SGND when the

channel 1 output voltage is not within ±8.5% of regulation.

VFB2 (Pin 14/Pin 12): Regulator 2 Output Feedback.

Receives the feedback voltage from the external resistor

divider across the regulator 2 output. Nominal voltage for

this pin is 0.6V.

SW2 (Pin 8/Pin 6): Regulator 2 Switch Node Connection

to the Inductor. This pin switches from PVIN2 to PGND2.

RUN2 (Pin 13/Pin 11): Regulator 2 Enable. Forcing this

pin high (above 3.0V) enables regulator 2, while forcing

it to SGND causes regulator 2 to shut down. It is possible

to use a 3.3V source to drive this pin, or tie it to SVIN.

An internal soft-start limits the rise time to a minimum

of 0.35ms.

PGOOD2 (Pin 11/Pin 9): Regulator 2 Power Good. This

common-drain logic output is pulled to SGND when the

channel 2 output voltage is not within ±8.5% of regulation.

MODE/SYNC (Pin 1/Pin 15): Combination Mode Selec-

tion and Oscillator Synchronization. This pin controls the

light-load behavior of the device. Forcing this pin to SGND

selects pulse-skipping mode. Floating this pin or forcing

it above 1V selects Burst Mode operation. The internal

oscillation frequency can be synchronized to an external

oscillator applied to this pin and pulse-skipping mode is

automatically selected.

(QFN/MSE)

LTC3607

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block DiagraM

CONTROL

LOGIC

–

LEVEL

SHIFT HV ICMP

PVIN1

SW1

PGND1

PGOOD1

PVIN2

SW2

PGND2

PGOOD2

3607 BD

MODE/SYNC

RCMP

LEVEL

SHIFT

OSC

LDO 3.3V

0.65V

BANDGAP

REFERENCE

0.55V

0.6V CLK

MODE 3.3V

3MΩ

PGOOD1

0.55V

RUN1

SGND

RUN2

VFB1

ITH

SVIN

VFB2

UVCOMP

OVCOMP

0.6V

0.65V

REGULATOR 1

REGULATOR 2 (IDENTICAL TO REGULATOR 1)

LTC3607

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operaTion

The LTC3607 uses a constant-frequency, peak current

mode architecture. The operating frequency is set at

2.25MHz and can be synchronized to an external oscillator

between 1MHz and 4MHz. Both channels share the same

clock and run in-phase. To suit a variety of applications,

the selectable MODE/SYNC pin allows the user to trade-

off ripple for efﬁciency.

The output voltage is set by an external divider returned

to the VFB pins. An error ampliﬁer compares the divided

output voltage with a reference voltage of 0.6V and ad-

justs the peak inductor current accordingly. Overvoltage

and undervoltage comparators will pull the independent

PGOOD outputs low if the output voltage is not within

±8.5%. The PGOOD outputs will go high 64 clock cycles

after achieving regulation and will go low 64 cycles after

falling out of regulation.

Whether in Burst Mode or pulse-skipping operation, the

overvoltage protection circuit is still enabled when the rest

of the regulator is asleep. Hence, if VOUT rises above the

overvoltage threshold, the regulator is forced out of sleep.

Main Control Loop

During normal operation, the top power switch (P-channel

MOSFET) is turned on at the beginning of a clock cycle

when the VFB voltage is below the reference voltage. The

current into the inductor and the load increases until the

current limit is reached. The switch turns off and energy

stored in the inductor ﬂows through the bottom switch

(N-channel MOSFET) into the load until the next clock cycle.

The peak inductor current is controlled by the internally

compensated ITH voltage, which is the output of the error

ampliﬁer. This ampliﬁer compares the VFB pin to the 0.6V

internal reference. When the load current increases, the

VFB voltage decreases slightly below the reference. This

decrease causes the error ampliﬁer to increase the ITH

voltage until the average inductor current matches the

new load current.

The main control loop is shut down by pulling the RUN

pin to ground.

Low Current Operation

Two discontinuous-conduction modes (DCMs) are avail-

able to control the operation of the LTC3607 at low output

currents. Both modes, Burst Mode operation and pulse-

skipping, automatically switch from continuous operation

to the selected mode when the load current is low.

To optimize efﬁciency, Burst Mode operation can be se-

lected by ﬂoating the MODE/SYNC pin or setting it to 1V

or greater. When the load is relatively light, the LTC3607

automatically switches into Burst Mode operation in which

the PMOS switch operates intermittently based on load

demand with a ﬁxed peak inductor current. By running

cycles periodically, the switching losses, which are domi-

nated by the gate charge losses of the power MOSFETs,

are minimized. The main control loop is interrupted when

the output voltage reaches the desired regulated value.

A voltage comparator trips when the ITH voltage drops

below an internal clamp voltage, shutting off the switch

and reducing the power. The output capacitor and the

inductor supply the power to the load until ITH exceeds

an internal clamp voltage, turning on the switch and the

main control loop, which starts another cycle.

To optimize ripple, pulse-skipping mode can be selected

by grounding the MODE/SYNC pin. In the LTC3607, pulse-

skipping mode is implemented similarly to Burst Mode

operation with the ITH clamp set to a lower internal clamp

voltage. This results in lower ripple than in Burst Mode

operation with the trade-off being slightly lower efﬁciency.

Dropout Operation

When the input supply voltage decreases toward the output

voltage, the duty cycle increases to 100% which is the

dropout condition. In dropout, the PMOS switch is turned

on continuously with the output voltage being equal to the

input voltage minus the voltage drops across the internal

P-channel MOSFET and the inductor.

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applicaTions inForMaTion

An important design consideration is that the RDS(ON)

of the P-channel switch increases with decreasing input

supply voltage (see Typical Performance Characteristics).

Therefore, the user should calculate the power dissipation

when the LTC3607 is used at 100% duty cycle with low

input voltage (see Thermal Considerations in the Applica-

tions Information section).

Low/High Supply Operation

The LTC3607 incorporates an undervoltage lockout circuit

which shuts down the part when the input voltage drops

below about 3.7V to prevent unstable operation.

A general LTC3607 application circuit is shown in Figure 1.

External component selection is driven by the load require-

ment, and begins with the selection of the inductor L. Once

the inductor is chosen, CIN and COUT can be selected.

Inductor Selection

The operating frequency directly effects both the inductor

value, and the ripple current. The inductor ripple current

ΔIL decreases with higher frequency and/or inductance

and increases with higher VIN:

∆IL=VOUT

fO•L•1– VOUT

VIN







Accepting larger values of ΔIL allows the use of low

inductances, but results in higher output voltage ripple,

greater core losses, and lower output current capability.

A reasonable starting point for setting ripple current is

ΔIL = 0.4 • IO(MAX), where IO(MAX) is the maximum rated

output current. The largest ripple current ΔIL occurs at

the maximum input voltage. To guarantee that the ripple

current stays below a speciﬁed maximum, the inductor

value should be chosen according to the following equation:

L = VOUT

fO•IL

•1– VOUT

VIN(MAX)







∆

The inductor value will also have an effect on Burst Mode

operation. The transition from low current operation

begins when the peak inductor current falls below a level

set by the burst clamp. Lower inductor values result in

higher ripple current which causes this transition to occur

at lower load currents. This causes a dip in efﬁciency in

the upper range of low current operation. In Burst Mode

operation, lower inductance values will cause the burst

frequency to increase.

Inductor Core Selection

Different core materials and shapes will change the size/

current and price/current relationship of an inductor. Toroid

or shielded pot cores in ferrite or permalloy materials are

small and don’t radiate much energy, but generally cost

more than powdered iron core inductors with similar elec-

trical characteristics. The choice of which style inductor to

use often depends more on the price vs size requirements

and any radiated ﬁeld/EMI requirements than on what the

LTC3607 requires to operate. Table 1 shows the websites

of several surface mount inductor manufacturers.

Table 1. Inductor Manufacturer

Coilcraft http://www.coilcraft.com/powersel_lowl.html

Cooper Bussmann http://www.cooperindustries.com/content/public/

en/bussmann/electronics/products/coiltronics_

inductorandtransformermagnetics.html

Würth Electronic http://katalog.we-online.com/en/pbs/browse/

Power-Magnetics/Speicherdrosseln

Murata http://www.murata.com/products/inductor/index.

html

TDK http://www.tdk.co.jp/tefe02/coil.htm

Vishay http://www.vishay.com/inductors/power-

inductors/

Sumida http://www.sumida.com/en/products/

power_main.php

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applicaTions inForMaTion

Input Capacitor (CIN) Selection

In continuous mode, the input current of the converter is a

square wave with a duty cycle of approximately VOUT/VIN.

To prevent large voltage transients, a low equivalent series

resistance (ESR) input capacitor sized for the maximum

RMS current must be used. The maximum RMS capacitor

current is given by:

IRMS ≈IOUT(MAX) VOUT(VIN– VOUT)

where the maximum average output current IMAX equals

the peak current minus half the peak-to-peak ripple cur-

rent, IMAX = ILIM – ΔIL/2.

This formula has a maximum at VIN = 2VOUT, where IRMS

= IOUT/2. This simple worst-case is commonly used to

design because even signiﬁcant deviations do not offer

much relief. Note that capacitor manufacturer’s ripple cur-

rent ratings are often based on only 2000 hours lifetime.

This makes it advisable to further derate the capacitor,

or choose a capacitor rated at a higher temperature than

required. Several capacitors may also be paralleled to meet

the size or height requirements of the design. An additional

0.1μF to 1μF ceramic capacitor is also recommended on

VIN for high frequency decoupling, when not using an all

ceramic capacitor solution.

Output Capacitor (COUT) Selection

The selection of COUT is driven by the required ESR to

minimize voltage ripple and load step transients. Typically,

once the ESR requirement is satisﬁed, the capacitance

is adequate for ﬁltering. The output ripple (ΔVOUT) is

determined by:

VOUT ≈∆ ∆ILESR+ 1

8fOCOUT









where fO = operating frequency, COUT = output capacitance

and ΔIL = ripple current in the inductor. The output ripple

is highest at maximum input voltage since ΔIL increases

with input voltage. With ΔIL = 240mA the output ripple will

be less than 100mV at maximum VIN and fO = 2.25MHz

with: ESRCOUT < 150mΩ.

Once the ESR requirements for COUT have been met, the

RMS current rating generally far exceeds the IRIPPLE(P-P)

requirement, except for an all ceramic solution.

Since the ESR of a ceramic capacitor is so low, the input

and output capacitor must instead fulﬁll a charge storage

requirement. During a load step, the output capacitor must

instantaneously supply the current to support the load

until the feedback loop raises the switch current enough

to support the load. The time required for the feedback

loop to respond is dependent on the compensation and the

output capacitor size. Typically, 3 to 4 cycles are required

to respond to a load step, but only in the ﬁrst cycle does

the output drop linearly. The output droop, VDROOP, is

usually about ﬁve times the linear drop of the ﬁrst cycle.

Thus, a good place to start is with the output capacitor

size of approximately:

COUT ≈5

∆I

OUT

fO•VDROOP

Though this equation provides a good approximation, more

capacitance may be required depending on the duty cycle

and load step requirements.

Ceramic Input and Output Capacitors

High value, low cost ceramic capacitors are available in

small case sizes. Their high ripple current, high voltage

rating, and low ESR make them ideal for switching regulator

applications. However, due to the self-resonant and high-Q

characteristics of some types of ceramic capacitors, care

must be taken when these capacitors are used at the input.

When a ceramic capacitor is used at the input and the power

is being supplied through long wires, such as from a wall

adapter, a load step at the output can induce ringing at

the VIN pin. At best, this ringing can couple to the output

and be mistaken as loop instability. At worst, the ringing

at the input can be large enough to damage the part. For

a more detailed discussion, refer to Application Note 88.

LTC3607

3607fb

For more information www.linear.com/LTC3607

applicaTions inForMaTion

Setting the Output Voltage

The LTC3607 develops a 0.6V reference voltage between

the feedback pins, VFB1 and VFB2, and ground as shown

in Figure 1. The output voltage is set by a resistive divider

according to the following formula:

VOUT =0.6V 1+











Keeping the current small (<5μA) in these resistors maxi-

mizes efﬁciency, but making them too small may allow

stray capacitance to cause noise problems and reduce

the phase margin of the error amp loop.

To improve the frequency response, a feed-forward ca-

pacitor CFF may also be used. Great care should be taken

to route the VFB traces away from noise sources, such as

the inductor or the SW traces.

For continuous mode operation with a ﬁxed maximum

input voltage, the minimum value that the output voltage

can be reduced to is set by the minimum on-time, which

is approximately 65ns. For ﬁxed frequency (2.25MHz) ap-

plications, the relation between minimum output voltage

and maximum input voltage is:

VOUT(MIN) = 0.14625 • VIN(MAX)

If the output voltage drops below that limit, the output will

still regulate, but the part will skip cycles.

Power Good Outputs

The PGOOD1 and PGOOD2 are open-drain outputs which

pull low when a regulator is out of regulation. When the

output voltage is within ±8.5% of regulation, a timer is

started which releases the relevant PGOOD pin after 64

clock cycles.

Mode Selection & Frequency Synchronization

The MODE/SYNC pin is a multipurpose pin which provides

mode selection and frequency synchronization. Floating

this pin or connecting it to a 3.3V source enables Burst Mode

operation, which provides optimal light load efﬁciency at

the cost of a slightly higher output voltage ripple. When

this pin is connected to ground, pulse-skipping operation

is selected. This mode provides the lowest output ripple,

at the cost of slightly lower light load efﬁciency.

The LTC3607 can also be synchronized to another LTC3607

by the MODE/SYNC pin. During synchronization, the

mode is set to pulse-skipping and the top switch turn-on

is synchronized to the rising edge of the external clock.

Pulse-skipping mode is also the default mode during

start-up.

Checking Transient Response

The regulator loop response can be checked by looking

at the load transient response. Switching regulators take

several cycles to respond to a step in load current. When

a load step occurs, VOUT immediately shifts by an amount

equal to ΔILOAD • ESR, where ESR is the effective series

resistance of COUT. ΔILOAD also begins to charge or dis-

charge COUT generating a feedback error signal used by the

regulator to return VOUT to its steady-state value. During

this recovery time, VOUT can be monitored for overshoot

or ringing that would indicate a stability problem.

The initial output voltage step may not be within the

bandwidth of the feedback loop, so the standard second

order overshoot/DC ratio cannot be used to determine

phase margin. In addition, a feed-forward capacitor can be

added to improve the high frequency response, as shown

in Figure 1. Capacitors C1 and C2 provide phase lead by

creating high frequency zeros with R1 and R3 respectively,

which improve the phase margin.

The output voltage settling behavior is related to the

stability of the closed-loop system and will demonstrate

the actual overall supply performance.

In some applications, a more severe transient can be caused

by switching in loads with large (>1μF) input capacitors.

The discharged input capacitors are effectively put in paral-

lel with COUT, causing a rapid drop in VOUT. No regulator

can deliver enough current to prevent this problem if the

switch connecting the load has low resistance and is driven

quickly. The solution is to limit the turn-on speed of the

load switch driver. A Hot Swap™ controller is designed

speciﬁcally for this purpose and usually incorporates cur-

rent limiting, short-circuit protection, and soft-starting.

LTC3607

3607fb

For more information www.linear.com/LTC3607

Efﬁciency Considerations

The percent efﬁciency of a switching regulator is equal to

the output power divided by the input power times 100%.

It is often useful to analyze individual losses to determine

what is limiting the efﬁciency and which change would

produce the most improvement. Percent efﬁciency can

be expressed as:

%Efﬁciency = 100% - (L1 + L2 + L3 + ...)

where L1, L2, etc. are the individual losses as a percent-

age of input power. Although all dissipative elements in

the circuit produce losses, four main sources usually

account for most of the losses in LTC3607 circuits: 1)

VIN quiescent current, 2) switching losses, 3) I2R losses,

4) other losses.

1) The VIN current is the DC supply current given in the

Electrical Characteristics which excludes MOSFET driver

and control currents. VIN current results in a small loss

that increases with VIN, even at no load.

2) The switching current is the sum of the MOSFET driver

and control currents. The MOSFET driver current results

from switching the gate capacitance of the power MOSFETs.

Each time a MOSFET gate is switched from low to high

to low again, a packet of charge dQ moves from VIN to

ground. The resulting dQ/dt is a current out of VIN that is

typically much larger than the DC bias current. In continu-

ous mode, IGATECHG = fO(QT + QB), where QT and QB are

the gate charges of the internal top and bottom MOSFET

switches. The gate charge losses are proportional to VIN

and thus their effects will be more pronounced at higher

supply voltages.

3) I2R losses are calculated from the DC resistances of

the internal switches, RSW, and external inductor, RL. In

continuous mode, the average output current ﬂows through

inductor L, but is chopped between the internal top and

bottom switches. Thus, the series resistance looking into

the SW pin is a function of both top and bottom MOSFET

RDS(ON) and the duty cycle (D) as follows:

RSW = (RDS(ON)TOP)(D) + (RDS(ON)BOT)(1 – D)

The RDS(ON) for both the top and bottom MOSFETs can

be obtained from the Typical Performance Characteristics

curves. Thus, to obtain I2R losses:

I2R losses = IOUT2(RSW + RL)

4) Other hidden losses such as copper trace and internal

battery resistances can account for additional efﬁciency

degradations in portable systems. It is very important to

include these system level losses in the design of a system.

The internal battery and fuse resistance losses can be

minimized by making sure that CIN has adequate charge

storage and very low ESR at the switching frequency.

Other losses including diode conduction losses during

dead-time and inductor core losses generally account for

less than 2% total additional loss.

Thermal Considerations

In a majority of applications, the LTC3607 does not dis-

sipate much heat due to its high efﬁciency. However, in

applications where the LTC3607 is running at high ambient

temperature with low supply voltage and high duty cycles,

such as in dropout, the heat dissipated may exceed the

maximum junction temperature of the part. If the junction

temperature reaches approximately 150°C, both power

switches for each channel will be turned off and the SW

nodes will become high impedance.

To prevent the LTC3607 from exceeding the maximum

junction temperature, the user will need to do some thermal

analysis. The goal of the thermal analysis is to determine

whether the power dissipated exceeds the maximum

junction temperature of the part. The temperature rise

is given by:

TRISE = PD • θJA

where PD is the power dissipated by the regulator and θJA

is the thermal resistance from the junction of the die to

the ambient temperature.

The junction temperature, TJ, is given by:

TJ = TRISE + TAMBIENT

applicaTions inForMaTion

LTC3607

3607fb

For more information www.linear.com/LTC3607

As an example, consider the case when the LTC3607 is in

dropout on both channels at an input voltage of 5V with

a load current of 600mA and an ambient temperature

of 25°C. From the Typical Performance Characteristics

graph of Switch Resistance, the RDS(ON) resistance of

the main switch is 0.9Ω. Therefore, power dissipated by

each channel is:

PD = I2 • RDS(ON) = 324mW

Running the two regulator channels under the same con-

ditions will result in a total power dissipation of 0.648W.

The MSE package junction-to-ambient thermal resistance,

θJA, is 37°C/W. Therefore, the junction temperature of

the regulator operating in a 25°C ambient temperature is

approximately:

TJ = 0.648W • 37°C/W + 25°C = 49°C

Design Example

As a design example, consider using the LTC3607 in a

portable application with a dual lithium-ion battery. The

battery provides a VIN = 5.6V to 8.4V. The loads require a

maximum of 600mA in active mode and 2mA in standby

mode. The output voltages are VOUT1 = 3.3V and VOUT2

= 2.5V. Since the load still needs power in standby, Burst

Mode operation is selected for good light load efﬁciency.

First, calculate the inductor values for about 240mA ripple

current at maximum VIN:

L1= 3.3V

2.25MHz •240mA •1– 3.3V

8.4V





=3.7µH

Choosing the closest standardized inductor value of 3.3μH

results in a maximum ripple current of:

∆IL1=3.3V

2.25MHz •3.3µH •1– 3.3V

8.4V





=270mA

The same calculations for L2 result in a standard inductor

value of 3.3µH and a maximum current ripple of 236mA.

For cost reasons, a ceramic capacitor will be used. COUT

selection is then based on load step droop instead of ESR

requirements. For a 5% output droop:

COUT1≈5•

600mA

2.25MHz •(5%•3.3V) =8.1µF

COUT2 ≈5•

600mA

2.25MHz •(5%•2.5V) =10.7µF

For both outputs, a close standard value is 10µF. Since

the output impedance of a lithium-ion battery is very low,

each CIN is chosen to be 10µF also.

The output voltages can now be programmed by choosing

the values of R1 thru R4. To maintain high efﬁciency, the

current in these resistors should be kept small. Choosing

5µA with the 0.6V feedback voltage makes R2 and R4 ~

120k. Close standard 1% resistor values is 121k and then

R1 and R3 are 549k and 383k, respectively.

The PGOOD pins are common drain outputs, thus requir-

ing pull-up resistors. Two 100k resistors are used for

adequate speed.

Figure 1 shows the complete schematic for this design

example. The speciﬁc passive components chosen allow

for a 1mm height power supply that maintains a high ef-

ﬁciency across load.

Board Layout Considerations

When laying out the printed circuit board, the following

checklist should be used to ensure proper operation of

the LTC3607. These items are also illustrated graphically

in the layout diagram of Figure 2. Check the following in

your layout:

1. Do the input capacitors CIN connect to PVIN1, PVIN2,

PGND1, and PGND2 as closely as possible? These ca-

pacitors provides the AC current to the internal power

MOSFETs and their drivers.

2. Are COUT and L closely connected? The (–) plate of

COUT returns current to GND and the (–) plate of CIN.

applicaTions inForMaTion

LTC3607

3607fb

For more information www.linear.com/LTC3607

3. The resistor divider formed by R1 and R2 must be

connected between the (+) plate of COUT and a ground

sense line terminated near GND (exposed pad). The

feedback signals VFB1 and VFB2 should be routed away

from noisy components and traces (such as the SW

lines) and their traces should be minimized.

4. Keep sensitive components away from the SW pins.

The feedback resistors R1 to R4 should be routed away

from the SW traces and the inductors.

applicaTions inForMaTion

Figure 1. Design Example Circuit

Figure 2. Example of Power Component Layout for

QFN Package

Figure 3. Example of Power Component Layout for

MSE Package

VOUT2

VOUT1

VIN

3607 F03

VIA TO VIN

PIN 1

VIAS TO GROUND

PLANE

VIAS TO GROUND

PLANE

CIN

COUT2

COUT1

5. A ground plane is preferred, but if not available keep

the signal and power grounds segregated with small

signal components returning to the GND pin at one

point. Additionally, the two grounds should not share

the high current paths of CIN or COUT.

6. Flood all unused areas on all layers with copper.

Flooding with copper will reduce the temperature rise

of power components. These copper areas should be

connected to VIN or GND. Refer to Figures 2 and 3 for

board layout examples.

MODE/SYNC

RUN1

RUN2 RUN2

RUN1

SW1

SW2

LTC3607

PGND2

PGND1 GND SGND

3607 F01

CIN1

10µF

8.4V

CIN2

10µF

PVIN1 SVIN PVIN2

VFB1

VOUT1

3.3V AT 600mA

100k

121k

COUT2

10µF

VOUT2

2.5V AT 600mA

3.3µH

PGOOD2

VFB2

121k

C1: TDK C2012X5R1C106K/1.25

COUT1, COUT2: C2012X5R0J106K/1.25

L1, L2: WÜRTH ELEKTRONIK 744025003

C1, 22pF

C2, 22pF

R3, 383k

PGOOD1

R1, 549k

COUT1

10µF

VOUT1 VOUT2

VIN

3607 F02

VIA TO VIN

GND

VIAS TO

GROUND

PLANE

VIAS TO

GROUND

PLANE

VIAS TO GROUND

PLANE

COUT1

CIN CIN

GND

COUT2

L L

5 6 7 8

16 15 14 13

LTC3607

3607fb

For more information www.linear.com/LTC3607

Typical applicaTions

Low Output Voltage and Main Supply

5V/2.5V 2.25MHz Buck Regulator

MODE/SYNC

RUN1

RUN1 RUN2 RUN2

SW1

PGOOD1

SW2

PGOOD2

LTC3607

PGND2PGND1 GND SGND

3607 TA02

CIN1

10µF

6V TO 15V

VOUT1

5V AT 600mA

CIN2

10µF

PVIN1 SVIN PVIN2

100k 100k

L1: SUMIDA CDRH3D16/HPNP-4R7NC

L2: SUMIDA CDRH3D16/HPNP-3R3NC

VFB1

VOUT2

2.5V AT 600mA

L1, 4.7µH L2, 3.3µH

VFB2

COUT1

10µF

121k

COUT2

10µF

121k

383k

887k

C1, 22pF C2, 22pF

MODE/SYNC

RUN1

RUN1 PGOOD1

RUN2

PGOOD2

SW1 SW2

LTC3607

PGND2PGND1 GND SGND

CIN

10µF

VIN 12V

PVIN1 SVIN PVIN2

VFB1

VOUT2

1V AT 600mA

VOUT1

5V AT 400mA

4.7µH

1.5µH

VFB2

1000pF

100k

3607 TA03

COUT1

10µF

L1: VISHAY IHLP1616BZER4R7M11

L2: VISHAY IHLP1616ABER1R5M11

121k

COUT2

22µF

121k

80.6k

887k

C1, 22pF C2, 22pF

LTC3607

3607fb

For more information www.linear.com/LTC3607

Typical applicaTions

Sequenced Power Supplies

RUN1

PGOOD1

RUN2

MODE/SYNC

PGOOD2

SW1

VFB2

LTC3607

PGND2

PGND1 GND SGND

3607 TA04

CIN1

10µF

VOUT1

100k

4.5V TO 15V

VOUT1

3.3V AT 600mA

CIN2

10µF

1000pF

PVIN1 SVIN PVIN2

VFB1

COUT1

10µF

L1, L2: TDK VLCF4018T-3R3N1R2-2

121k

549k

C1, 22pF

COUT2

10µF

VOUT2

2.5V AT 600mA

121k

383k

C2, 22pF

L2, 3.3µHL1, 3.3µH

SW2

LTC3607

3607fb

For more information www.linear.com/LTC3607

3.00 ±0.10

(4 SIDES)

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

1.45 ±0.05

(4 SIDES)

NOTE:

1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION

ON THE TOP AND BOTTOM OF PACKAGE

PIN 1

TOP MARK

(NOTE 6)

0.40 ±0.10

BOTTOM VIEW—EXPOSED PAD

1.45 ± 0.10

(4-SIDES)

0.75 ±0.05 R = 0.115

TYP

0.25 ±0.05

PIN 1 NOTCH R = 0.20 TYP

OR 0.25 × 45° CHAMFER

15 16

0.50 BSC

0.200 REF

2.10 ±0.05

3.50 ±0.05

0.70 ±0.05

0.00 – 0.05

(UD16) QFN 0904

0.25 ±0.05

0.50 BSC

PACKAGE OUTLINE

UD Package

16-Lead Plastic QFN (3mm × 3mm)

(Reference LTC DWG # 05-08-1691 Rev Ø)

package DescripTion

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

LTC3607

3607fb

For more information www.linear.com/LTC3607

package DescripTion

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

MSOP (MSE16) 0213 REV F

0.53 ±0.152

(.021 ±.006)

SEATING

PLANE

0.18

(.007)

1.10

(.043)

MAX

0.17 –0.27

(.007 – .011)

TYP

0.86

(.034)

REF

0.50

(.0197)

BSC

16151413121110

12345678

NOTE:

1. DIMENSIONS IN MILLIMETER/(INCH)

2. DRAWING NOT TO SCALE

3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.

INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL

NOT EXCEED 0.254mm (.010") PER SIDE.

0.254

(.010) 0° – 6° TYP

DETAIL “A”

GAUGE PLANE

5.10

(.201)

MIN

3.20 – 3.45

(.126 – .136)

0.889 ±0.127

(.035 ±.005)

RECOMMENDED SOLDER PAD LAYOUT

0.305 ±0.038

(.0120 ±.0015)

TYP

0.50

(.0197)

BSC

BOTTOM VIEW OF

EXPOSED PAD OPTION

2.845 ±0.102

(.112 ±.004)

2.845 ±0.102

(.112 ±.004)

4.039 ±0.102

(.159 ±.004)

(NOTE 3)

1.651 ±0.102

(.065 ±.004)

1.651 ±0.102

(.065 ±.004)

0.1016 ±0.0508

(.004 ±.002)

3.00 ±0.102

(.118 ±.004)

(NOTE 4)

0.280 ±0.076

(.011 ±.003)

REF

4.90 ±0.152

(.193 ±.006)

DETAIL “B”

CORNER TAIL IS PART OF

THE LEADFRAME FEATURE.

FOR REFERENCE ONLY

NO MEASUREMENT PURPOSE

0.12 REF

0.35

REF

MSE Package

16-Lead Plastic MSOP, Exposed Die Pad

(Reference LTC DWG # 05-08-1667 Rev F)

LTC3607

3607fb

For more information www.linear.com/LTC3607

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibilit y is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

revision hisTory

REV DATE DESCRIPTION PAGE NUMBER

A11/13 Clariﬁed RUN 1/2 voltages

Clariﬁed Electrical table

Clariﬁed Pin Function descriptions

B8/14 Clariﬁed ripple feature

Clariﬁed Electrical Characteristics table

Clariﬁed Output Voltage formula

LTC3607

3607fb

For more information www.linear.com/LTC3607

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

 LINEAR TECHNOLOGY CORPORATION 2013

LT 0814 REV B • PRINTED IN USA

VFB1 VFB2

RUN1

SW1

RUN2

SW2

LTC3607

GND

3607 TA05

CIN

10µF

×2

VIN

5.6V TO 8.4V

SVIN

PVIN1 PVIN2

VOUT1

1.8V

AT 600mA

CIN: TDK C2012X5R1C106K/0.85

COUT1, COUT2: TDK C2012X5R0JI06K/0.85

L1: MURATA LQM2HPN2R2MGS

L2: MURATA LQM2HPN3R3MGS

VOUT2

3.3V

AT 600mA

L1, 2.2µH L2, 3.3µH

COUT1

10µF

121k

243k

C1, 22pF

COUT2

10µF

121k

549k

C2, 22pF

relaTeD parTs

Typical applicaTion

PART NUMBER DESCRIPTION COMMENTS

LTC3601 15V, 1.5A (IOUT), 4MHz, Synchronous Step-Down

DC/DC Converter 95% Efﬁciency, VIN: 4.5V to 15V, 3mm × 3mm QFN-16, MSOP-16E

LTC3603 15V, 2.5A (IOUT), 3MHz, Synchronous Step-Down

DC/DC Converter 95% Efﬁciency, VIN: 4.5V to 15V, 4mm × 4mm QFN-20, MSOP-16E

LTC3633 15V, Dual 3A (IOUT), 4MHz, Synchronous Step-Down

DC/DC Converter 95% Efﬁciency, VIN: 3.6V to 15V, 4mm × 5mm QFN-28, TSSOP-28E

LTC3605 15V, 5A (IOUT), 4MHz, Synchronous Step-Down

DC/DC Converter 95% Efﬁciency, VIN: 4V to 15V, 4mm × 4mm QFN-24

LTC3604 15V, 2.5A (IOUT), 4MHz, Synchronous Step-Down

DC/DC Converter 95% Efﬁciency, VIN: 3.6V to 15V, 3mm × 3mm QFN-16, MSOP-16E

LTC3417A-2 5.5V, Dual 1.5A/1A, 4MHz, Synchronous Step-Down

DC/DC Converter 95% Efﬁciency, VIN = 2.3V, 3mm × 5mm DFN-16, TSSOP-16E

LTC3407A/-2 5.5V, Dual 600mA/600mA 1.5MHz, Synchronous

Step-Down DC/DC Converter 95% Efﬁciency, VIN = 2.5V, 3mm × 3mm DFN-10, MS-10E

LTC3419/-1 5.5V, Dual 600mA/600mA 2.25MHz, Synchronous

Step-Down DC/DC Converter 95% Efﬁciency, VIN = 2.5V, 3mm × 3mm DFN-10, MS-10

LTC3548A-1/-2 5.5V, Dual 400mA and 800mA IOUT, 2.25MHz,

Synchronous Step-Down DC/DC Converter 95% Efﬁciency, VIN = 2.5V, 3mm × 3mm DFN-10, MS-10E

LTC3547/

LTC3547B 5.5V, Dual Monolithic 300mA, 2.25MHz, Synchronous

Step-Down DC/DC Converter 95% Efﬁciency, VIN = 2.5V, IQ = 40µA, ISD < 1µA,

3mm × 2mm DFN-8

LTC3621 17V, 1A (IOUT), 2.25MHz Synchronous Step-Down DC/DC

Converter with 3.5µA IQ

95% Efﬁciency, VIN = 2.7V to 17V, 3mm × 2mm DFN-6, MS-8E

1mm Height, 1.8V/3.3V Buck Regulator Using Chip Inductors

10mm 3607 TA06

11mm

COUT1 COUT2

VOUT1 VOUT2

L1 L2

VIN

CIN CIN

GND GND

VIA TO VIN

5 6 7 8

16 15 14 13

VIA TO VOUT1 VIA TO VOUT2

(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LTC3607