1 GHz to 11 GHz, GaAs, HEMT,
MMIC Low Noise Amplifier
Data Sheet HMC753
Rev. D Document Feedback
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
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Trademarks and registered trademarks are the property of their respective owners.
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Tel: 781.329.4700 ©2015 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
FEATURES
Noise figure: 1.5 dB at 4 GHz (see Figure 10)
Gain
16.5 dB at 1 GHz to 6 GHz
14 dB at 6 GHz to 11 GHz
Output power for 1 dB compression (P1dB): 18 dBm
at 1 GHz to 6 GHz
Supply voltage (VDD): 5 V at 55 mA
Output third-order intercept (IP3): 30 dBm at 1 GHz to 6 GHz
50 Ω matched input/output (I/O)
24-lead lead frame chip scale package (LFCSP): 16 mm2
APPLICATIONS
Point to point radios
Point to multipoint radios
Military and space
Test instrumentation
FUNCTIONAL BLOCK DIAGRAM
13
1
3
4
2
7
GND
GND
RFIN
GND
5
6
GND
GND GND
14
GND
15
GND
16
RFOUT
17
GND
18
GND
GND
8
V
GG
2
9
V
GG
1
10
V
DD
11
NC
12 19
GND GND
20
NC
21
NC
22
NC
23
NC
24
GND
HMC753
13494-001
Figure 1.
GENERAL DESCRIPTION
The HMC753 is a gallium arsenide (GaAs), monolithic
microwave integrated circuit (MMIC), low noise, wideband
amplifier housed in a leadless, 4 mm × 4 mm LFCSP. The amplifier
operates between 1 GHz and 11 GHz, providing up to 16.5 dB
of small signal gain at 1 GHz to 6 GHz, a 1.5 dB noise figure at
4 GHz (see Figure 10), and an output IP3 of 30 dBm at 1 GHz to
6 GHz, while requiring only 55 mA from a 5 V supply.
The P1dB output power of up to 18 dBm at 1 GHz to 6 GHz
enables the low noise amplifier (LNA) to function as a local
oscillator (LO) driver for balanced, I/Q, or image rejection
mixers. The HMC753 also features I/Os that are dc blocked and
internally matched to 50 Ω, making the device ideal for high
capacity microwave radios or very small aperture terminal (VSAT)
applications.
HMC753 Data Sheet
Rev. D | Page 2 of 13
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Electrical Specifications ............................................................... 3
Absolute Maximum Ratings ............................................................ 4
ESD Caution .................................................................................. 4
Pin Configuration and Function Descriptions ............................. 5
Interface Schematics .....................................................................6
Typical Performance Characteristics ..............................................7
Theory of Operation .........................................................................9
Applications Information .............................................................. 10
Biasing Procedures ..................................................................... 10
Evaluation PCB ........................................................................... 11
Outline Dimensions ....................................................................... 13
Ordering Guide .......................................................................... 13
REVISION HISTORY
9/15—Rev. 03.0111 to Rev. D
This Hittite Microwave Products data sheet has been reformatted
to meet the styles and standards of Analog Devices, Inc.
Changes to Features Section and General Description Section ...... 1
Changes to Table 1 ............................................................................ 3
Added Table 2; Renumbered Sequentially .................................... 3
Changes to Table 3 ............................................................................ 4
Changes to Table 4 ............................................................................ 5
Added Figure 3, Figure 4, Figure 5, Figure 6, and Figure 7;
Renumbered Sequentially ................................................................ 6
Added Theory of Operation Section and Figure 19 .................... 9
Added Applications Information Section, Figure 20, and Biasing
Procedures Section ......................................................................... 10
Changes to Table 5 .......................................................................... 11
Changes to Ordering Guide .......................................................... 13
Data Sheet HMC753
Rev. D | Page 3 of 13
SPECIFICATIONS
ELECTRICAL SPECIFICATIONS
TA = 25°C, VDD = 5 V, IDD = 55 mA.
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
FREQUENCY RANGE 1 6 GHz
PERFORMANCE
Gain 14 16.5 dB
Gain Variation over Temperature 0.004 dB/°C
Noise Figure 1.5 2 dB
Input Return Loss 11 dB
Output Return Loss 18 dB
Output Power for 1 dB Compression (P1dB) 18 dBm
Saturated Output Power (PSAT) 20 dBm
Output Third Order Intercept (IP3) 30 dBm
POWER SUPPLY
Supply Current (IDD) 55 mA VDD = 5 V, set VGG2 = 1.5 V, VGG1 = −0.8 V typical
Table 2.
Parameter Min Typ Max Unit Test Conditions/Comments
FREQUENCY RANGE 6 11 GHz
PERFORMANCE
Gain 10 14 dB
Gain Variation over Temperature 0.008 dB/°C
Noise Figure 2 2.7 dB
Input Return Loss 8 dB
Output Return Loss 12 dB
Output Power for 1 dB Compression (P1dB) 15 dBm
Saturated Output Power (PSAT) 17 dBm
Output Third Order Intercept (IP3) 28 dBm
POWER SUPPLY
Supply Current (IDD) 55 mA VDD = 5 V, set VGG2 = 1.5 V, VGG1 = −0.8 V typical
HMC753 Data Sheet
Rev. D | Page 4 of 13
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Drain Bias Voltage 6.0 V
RF Input Power
12 dBm
Gate Bias Voltage
VGG1 −1 V to +0.3 V
VGG2 0 V to 2.5 V
Channel Temperature 180°C
Continuous PDISS (TA) = 85°C), Derate
8.4 mW/°C Above 85°C
0.8 W
Thermal Resistance (Channel to Die Bottom) 119°C/W
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +85°C
ESD Sensitivity
Human Body Model (HBM) Class 0, Passed
100 V
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
Data Sheet HMC753
Rev. D | Page 5 of 13
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
13
1
3
4
2
7
GND
GND
RFIN
GND 5
6
GND
GND GND
14 GND
15 GND
16 RFOUT
17 GND
18 GND
GND
8
V
GG
2
9
V
GG
1
10
V
DD
11
NC
12 19
GND GND
20
NC
21
NC
22
NC
23
NC
24
GND
HMC753
TOP VIEW
(Not t o Scale)
NOTES
1. NC = NO T CO NNECT ED INTERNALL Y. THES E P I NS ARE
NO T INT E RN ALL Y CONNE CTED ; HOW E V E R , ALL DA T A
SHOW N IS MEAS U R ED WITH THESE PIN S CO NN ECT ED
EXT ERNALLY TO RF/DC G ROUND.
2. EXPOSED PAD. THE EXPO SED PAD MUST BE
CONNECT ED TO RF /DC GROUND.
13494-002
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1, 2, 4 to 7, 12 to 15, 17
to 19, 24
GND Ground. The package bottom has an exposed metal pad that must be connected to RF/dc
ground.
3 RFIN RF Input. This pad is ac-coupled and matched to 50 Ω.
8, 9 VGG2, VGG1 Gate Control for the Amplifier. Follow the biasing procedures described in the Biasing
Procedure section. See Figure 22 for required external components.
10 VDD Power Supply Voltage for the Amplifier. See Figure 22 for required external components.
11, 20 to 23 NC Not Internally Connected. These pins are not internally connected; however, all data shown is
measured with these pins connected externally to RF/dc ground.
16 RFOUT RF Output. This pad is ac-coupled and matched to 50 Ω.
EPAD Exposed Pad. The exposed pad must be connected to RF/dc ground.
HMC753 Data Sheet
Rev. D | Page 6 of 13
INTERFACE SCHEMATICS
G
ND
13494-003
Figure 3. GND Interface
RFIN
13494-004
Figure 4. RFIN Interface
V
GG
1, V
GG
2
13494-005
Figure 5. VGG1, VGG2 Interface
V
DD
13494-006
Figure 6. VDD Interface
RFOUT
13494-007
Figure 7. RFOUT Interface
Data Sheet HMC753
Rev. D | Page 7 of 13
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 8. Broadband Gain and Return Loss (Board Loss Subtracted out for
Gain, Power, and Noise Figure Measurements)
Figure 9. Input Return Loss vs. Frequency for Various Temperatures
Figure 10. Noise Figure vs. Frequency for Various Temperatures (Board Loss
Subtracted out for Gain, Power, and Noise Figure Measurements)
18
8
10
12
14
16
1357911
GAI N (dB)
FREQUENCY ( GHz)
+85°C
+25°C
–40°C
13494-011
Figure 11. Gain vs. Frequency for Various Temperatures (Board Loss
Subtracted out for Gain, Power, and Noise Figure Measurements)
Figure 12. Output Return Loss vs. Frequency for Various Temperatures
Figure 13. Output IP3 vs. Frequency for Various Temperatures
HMC753 Data Sheet
Rev. D | Page 8 of 13
Figure 14. P1dB vs. Frequency for Various Temperatures (Board Loss
Subtracted out for Gain, Power, and Noise Figure Measurements)
Figure 15. Reverse Isolation vs. Frequency for Various Temperatures
Figure 16. PSAT vs. Frequency for Various Temperatures (Board Loss
Subtracted out for Gain, Power, and Noise Figure Measurements)
24
–4
0
4
12
20
8
16
–20 –15 –10 –5 0 5
P
OUT
(d Bm) , GAIN (dB), P AE ( %)
INPUT POW E R ( dBm)
P
OUT
GAIN
PAE
13494-017
Figure 17. Power Compression at 6 GHz (Board Loss Subtracted out for Gain,
Power, and Noise Figure Measurements)
22
8
10
12
16
20
14
18
4.5 5.0 5.5
GAI N ( dB), P1dB (d Bm)
V
DD
(V)
P1dB
GAIN
NOISE FIGURE
7
5
6
4
3
2
1
0
NOISE FIGURE (dB)
13494-018
Figure 18. Gain, Noise Figure, and Power vs. Supply Voltage (VDD) at 6 GHz
(Board Loss Subtracted out for Gain, P1dB, and Noise Figure Measurements)
Data Sheet HMC753
Rev. D | Page 9 of 13
THEORY OF OPERATION
The circuit architecture of the HMC753 wideband, low noise
amplifier is shown in Figure 19. The HMC753 uses a single gain
stage to form an amplifier with typical gain of 16.5 dB at 1 GHz
to 6 GHz and 14 dB at the 6 GHz to 11 GHz frequency band.
13494-022
RFIN RFOUT
HMC753
Figure 19. Wideband Low Noise Amplifier Circuit Architecture
The HMC753 has single-ended input and output ports whose
impedances are nominally equal to 50 Ω over the frequency
range of 1 GHz to 11 GHz. Consequently, the HMC753 can be
directly inserted into a 50 Ω system with no impedance
matching circuitry required. In addition, multiple HMC753
amplifiers can be cascaded back to back without the need of
external matching circuitry.
The input and output impedances are sufficiently stable over
variations in temperature and supply voltage that no impedance
matching compensation is required.
Both RF input and RF output ports have on-chip dc block
capacitors, which eliminates the need for external ac coupling
capacitors.
It is critical to supply very low inductance ground connections
to the ground pins as well as to the backside exposed paddle.
This ensures stable operation.
To achieve the best performance out of the HMC753 and not to
damage the device, the recommended biasing sequence must be
followed; see the Applications Information section for further
details.
HMC753 Data Sheet
Rev. D | Page 10 of 13
APPLICATIONS INFORMATION
The HMC753 is a GaAs, MMIC, high electron mobility
transistor (HEMT), low noise, wideband amplifier.
The amplifier uses two field effect transistors (FETs) in series,
source to drain. The basic schematic for a fundamental cell is
shown in Figure 20.
13494-021
RFOUT
V
GG
2
V
GG
1
RFIN
V
DD
Figure 20. Fundamental Cell Schematic
All measurements for this device are taken using the evaluation
printed circuit board (PCB) in its default configuration.
BIASING PROCEDURES
The recommended biasing procedure during power-up is as
follows:
1. Connect GND.
2. Set VGG1 to −1 V.
3. Set VDD to 5 V.
4. Set VGG2 to 1.5 V.
5. Increase VGG1 to achieve a typical quiescent current (IDQ) =
55 mA.
6. Apply the RF signal.
The recommended biasing procedure during power-down is as
follows:
1. Turn off the RF sig na l.
2. Decrease VGG1 to −1 V to achieve IDQ = 0 mA.
3. Decrease VGG2 to 0 V.
4. Decrease VDD to 0 V.
5. Increase VGG1 to 0 V.
The VDD = 5 V and IDQ = 55 mA bias conditions are the operating
points recommended to optimize the overall performance.
Unless otherwise noted, the data shown is taken using the
recommended bias conditions. Operation of the HMC753 at
different bias conditions may result in performance that differs
from the Typical Performance Characteristics shown in the data
sheet. Biasing the HMC753 for higher drain current typically
results in higher P1dB and output IP3 at the expense of
increased power consumption.
Data Sheet HMC753
Rev. D | Page 11 of 13
EVALUATION PCB
J1
VDD
J2
VGG1
VGG2
J3
GND
J4
C9 C8 C7
C6C3 C1
C2
C5
C4
H753
XXXX
U1
J6
J5
13494-020
Figure 21. 122826-HMC753LP4E Evaluation PCB
13
1
3
4
2
7
5
6
14
15
16
17
18
8
9
10
11
12 19
20
21
22
23
24
RFIN RFOUT
C3
100pF
C2
100pF
C6
1000pF
C5
1000pF
C9
4.7µF
C8
4.7µF
V
GG
2
V
GG
1
C7
4.7µF
C4
1000pF
C1
100pF
V
DD
13494-019
Figure 22. Typical Application Circuit
HMC753 Data Sheet
Rev. D | Page 12 of 13
Table 5. List of Materials for Evaluation PCB
122826-HMC753LP4E1
Item Description
J5, J6 SMA connectors
J1 to J4 DC pins
C1 to C3 100 pF capacitors, 0402 package
C4 to C6 10,000 pF capacitors, 0603 package
C7 to C9 4.7 µF capacitors, tantalum
U1 HMC753 amplifier
PCB2 122824-2 evaluation PCB
1 Reference this number when ordering the complete evaluation PCB.
2 Circuit board material: Rogers 4350 or Arlon 25FR.
It is recommended that the circuit board used in this application
use RF circuit design techniques. It is also recommended that
signal lines have a 50 Ω impedance, and the package ground
leads and exposed pad be connected directly to the ground
plane, as shown in Figure 22. Use a sufficient number of via
holes to connect the top and bottom ground planes. Mount the
evaluation board to an appropriate heat sink. The evaluation
circuit board shown is available from Analog Devices, Inc.,
upon request.
Data Sheet HMC753
Rev. D | Page 13 of 13
OUTLINE DIMENSIONS
0.50
BSC
0.50
0.40
0.30
BOTTOM VIEW
TOP VIEW
4.10
4.00 SQ
3.90
SEATING
PLANE
0.95
0.85
0.75 0. 05 MAX
0.02 NO M
0.20 REF
COPLANARITY
0.08
PIN 1
INDICATOR
1
24
7
12
13
18
19
6
FOR PRO P E R CONNECT IO N OF
THE EXPOSED PAD, REFER TO
THE PIN CO NFI G URATI ON AND
FUNCTION DES CRIPT IO NS
SECTION OF THIS DATA SHEET.
08-07-2015-A
0.31
0.25
0.19
PIN 1
INDICATOR
0.25 M IN
2.85
2.70 SQ
2.55
EXPOSED
PAD
PKG-000000
Figure 23. 24-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
4 mm × 4 mm Body, Very Thin Quad
(HCP-24-3)
Dimensions shown in millimeters
ORDERING GUIDE
Model Package Description Package Option Package Marking1
HMC753LP4E 24-Lead Lead Frame Chip Scale Package [LFCSP_VQ] HCP-24-3
XXXX
753
HMC753LP4ETR 24-Lead Lead Frame Chip Scale Package [LFCSP_VQ] HCP-24-3
XXXX
753
122826-HMC753LP4E Evaluation Board
1 XXXX is the 4 digit lot number.
©2015 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D13494-0-9/15(D)
Mouser Electronics
Authorized Distributor
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