LMV232 www.ti.com SNWS017C - DECEMBER 2004 - REVISED MARCH 2013 LMV232 Dual-Channel Integrated Mean Square Power Detector for CDMA & WCDMA Check for Samples: LMV232 FEATURES DESCRIPTION * * * * The LMV232 dual RF detector is designed for RF transmit power measurement in mobile phones. This dual mean square IC is especially suited for accurate power measurement of RF signals exhibiting high peak-to-average ratios used in 3G and UMTS/CDMA applications. The LMV232 saves calibration steps and system certification and is highly accurate. The circuit operates with a single supply from 2.5 to 3.3V. 1 * * * >20 dB Square-Law Detection Range 2 Sequentially Selectable RF Inputs Low Power Consumption Shutdown Mode Externally Configurable Gain and LF Filter Bandwidth. Internal 50 RF Termination Impedance Optimized for Use with 20 dB Directional Coupler Lead Free 8-Bump DSBGA Package 1.5 x 1.5 x 0.6 mm The LMV232 contains a mean square detector with two sequentially selectable RF inputs. The RF input power range of the device has been optimized for use with a 20 dB directional coupler, without the need for additional external components. A single external RC combination between FB and OUT provides an externally configurable gain and LF filter bandwidth of the device. APPLICATIONS * * * * * * * * 3G Mobile Communications UMTS WCDMA CDMA2000 TD-SCDMA RF Control Wireless LAN PC Card and GPS Modules The device has two digital interfaces. A shutdown function is available to set the device in a low-power shutdown mode. In case SD = HIGH, the device is in shutdown, if SD = LOW the device is active. The Band-Select function controls the selection of the active RF input channel. In case BS = HIGH, RFIN1 is active. In case BS = LOW, RFIN2 is active. The dual mean square detector is offered in an 8bump DSBGA 1.5 x 1.5 x 0.6 mm package. This DSBGA package has the smallest footprint and height. TYPICAL APPLICATION RF INPUT COUPLER ANTENNA PA1 R2 50: RF INPUT COUPLER PA2 VDD B3 TO BASEBAND B1 RFIN1 OUT A3 R1 6.2 k: R3 50: GND C1 1.5 nF A1 LMV232 FB RFIN2 C1 A2 C2 BS C3 SD 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2004-2013, Texas Instruments Incorporated LMV232 SNWS017C - DECEMBER 2004 - REVISED MARCH 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ABSOLUTE MAXIMUM RATINGS Supply Voltage ESD Tolerance (1) (2) VDD - GND (3) 3.6V Max Human Body Model 2000V Machine Model 200V Storage Temperature Range Junction Temperature -65C to 150C (4) 150C Max Mounting Temperature (1) (2) (3) (4) Infrared or Convection (20 sec) 235C Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test conditions, see the Electrical Characteristics. If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications. Human body model: 1.5 k in series with 100 pF. Machine model, 0 in series with 100 pF. The maximum power dissipation is a function of TJ(MAX) , JA and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/JA. All numbers apply for packages soldered directly into a PC board. OPERATING RATINGS (1) Supply Voltage 2.5V to 3.3V Operating Temperature Range -40C to +85C RF Frequency Range (1) 50 MHz to 2 GHz Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test conditions, see the Electrical Characteristics. 2.7 DC AND AC ELECTRICAL CHARACTERISTICS Unless otherwise specified, all limits are specified to VDD = 2.7V; TJ = 25C. Boldface limits apply at temperature extremes. Symbol IDD Parameter Condition Supply Current BS and SD Logic Low Level (2) VHIGH BS and SD Logic High Level (2) IBS, ISD Current into BS and SD pins VOUT Output Voltage Swing VLOW IOUT Output Short Circuit Typ Max Units Active Mode: SD = LOW, No RF Input Power Present Min 9.8 11 13 mA Shutdown: SD = 1.8V, No RF Input Power Present 0.09 5 30 A 0.8 V 5 A 1.8 V From Positive Rail, Sourcing, FB = 0V, IOUT = 1 mA 20 80 90 mV From Negative Rail, Sinking, FB = 2.7V, IOUT = -1 mA 20 60 70 mV Sourcing, FB = 0V, VOUT = 2.6V 3.7 2.7 5.1 Sinking, FB = 2.7V, VOUT = 0.1V 3.7 2.7 5.5 No RF Input Power 235 230 275 280 Output Voltage (Pedestal) VPED Pedestal Variation Over Temperature (3) 5.4 mV IOS Offset Current Variation Over Temperature (3) 1.17 A (2) (3) 2 254 mA VOUT (1) (1) mV Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No ensured specification of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA. All limits are specified by design or statistical analysis. Typical numbers represent the 3-sigma value of 10k units. 3-sigma value of variation between -40C / 25C and variation between 25C / 85C. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LMV232 LMV232 www.ti.com SNWS017C - DECEMBER 2004 - REVISED MARCH 2013 2.7 DC AND AC ELECTRICAL CHARACTERISTICS (continued) Unless otherwise specified, all limits are specified to VDD = 2.7V; TJ = 25C. Boldface limits apply at temperature extremes. (1) Symbol tON Parameter Turn-on-Time (4) (5) tR Rise Time en Output Referred Voltage Noise GBW Gain Bandwidth Product SR Condition Min Typ Max No RF Input Power Present, Output Loaded with 10 pF 2.0 6.0 Step from No Power to 0 dBm Applied, Output Loaded with 10 pF 4.5 RF Input = 1800 MHz, -10 dBm, Measured at 10 kHz 400 1.8 1.0 Slew Rate RIN DC Resistance See RF Input Power Range (6) (7) PIN KDET (5) RF Input Frequency = 900 MHz Detection Slope Units s s nV/ 3.7 MHz 3.0 V/s 50.8 -11 +13 dBm -24 0 dBV 900 MHz 21 1800 MHz 10 1900 MHz 10 2000 MHz 10 A/mW fLOW LF Input Corner Frequency Lower -3 dB Point of Detection Slope 60 MHz fHIGH HF Input Corner Frequency Upper -3 dB Point of Detection Slope 1.0 GHz 900 MHz 58 1800 MHz 62 1900 MHz 58 2000 MHz 55 AISO (4) (5) (6) (7) Channel Isolation dB Turn-on time is measured by connecting a 10 k resistor to the RFIN/EN pin. Be aware that in the actual application on the front page, the RC-time constant of resistor R2 and capacitor C adds an additional delay. Typical values represent the most likely parametric norm. Power in dBV = dBm + 13 when the impedance is 50. Device is set in active mode with a 10 k resistor from VDD to RFIN/EN. RF signal is applied using a 50 RF signal generator AC coupled to the RFIN/EN pin using a 100 pF coupling capacitor. CONNECTION DIAGRAM A2 FB A1 A3 OUT RFIN1 B1 GND B3 C1 C3 SD VDD RFIN2 C2 BS Figure 1. 8-Bump DSBGA - Top View Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LMV232 3 LMV232 SNWS017C - DECEMBER 2004 - REVISED MARCH 2013 www.ti.com Table 1. PIN DESCRIPTION Pin Name Power Supply B3 VDD Positive Supply Voltage B1 GND Power Ground Digital Inputs C3 SD Schmitt-triggered Shutdown. The device is active for SD = LOW. For SD = HIGH, it is brought into a low-power shutdown mode. C2 BS Schmitt-triggered Band Select pin. When BS = HIGH, RFIN1 is selected, when BS = LOW, RFIN2 is selected. A1 RFIN1 C1 RFIN2 RF Input connected to the coupler output with optional attenuation to measure the Power Amplifier (PA) / Antenna RF power levels. Both RF inputs of the device are internally terminated with a 50 resistance. Feedback A2 FB Connected to inverting input of output amplifier. Enables user-configurable gain and bandwidth through external feedback network. Output A3 Out Amplifier output Analog Inputs Description BLOCK DIAGRAMS RFIN1 VDD FB B3 A2 A1 2 - X RFIN2 + DETECTOR C1 A3 OUT + C3 C2 B1 SD BS GND LMV232 Figure 2. LMV232 4 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LMV232 LMV232 www.ti.com SNWS017C - DECEMBER 2004 - REVISED MARCH 2013 TYPICAL PERFORMANCE CHARACTERISTICS Unless otherwise specified, VDD = 2.7V, TJ = 25C, R1 = 6.2 k and C1 = 1.5 nF (See typical application). Supply Current vs. Supply Voltage VOUT - VPEDESTAL vs. RF Input Power Figure 3. Figure 4. VOUT - VPEDESTAL vs. RF Input Power @ 900 MHz Input Referred Error vs. RF Input Power @ 900 MHz Figure 5. Figure 6. VOUT - VPEDESTAL vs. RF Input Power @ 1800 MHz Input Referred Error vs. RF Input Power @ 1800 MHz Figure 7. Figure 8. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LMV232 5 LMV232 SNWS017C - DECEMBER 2004 - REVISED MARCH 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) Unless otherwise specified, VDD = 2.7V, TJ = 25C, R1 = 6.2 k and C1 = 1.5 nF (See typical application). 6 VOUT - VPEDESTAL vs. RF Input Power @ 1900 MHz Input Referred Error vs. RF Input Power @ 1900 MHz Figure 9. Figure 10. VOUT - VPEDESTAL vs. RF Input Power @ 2000 MHz Input Referred Error vs. RF Input Power @ 2000 MHz Figure 11. Figure 12. VOUT -VPEDESTAL vs. RF Input Power @ 1900 MHz Input Referred Error vs. RF Input Power @ 1900 MHz Figure 13. Figure 14. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LMV232 LMV232 www.ti.com SNWS017C - DECEMBER 2004 - REVISED MARCH 2013 TYPICAL PERFORMANCE CHARACTERISTICS (continued) Unless otherwise specified, VDD = 2.7V, TJ = 25C, R1 = 6.2 k and C1 = 1.5 nF (See typical application). RF Input Impedance vs. Frequency @ Resistance and Reactance Gain and Phase vs. Frequency 120 80 90 60 PHASE GAIN (dB) GAIN 20 30 0 0 -30 -20 -40 10k PHASE () 60 40 100k 1M 10M -60 100M FREQUENCY (Hz) Figure 15. Figure 16. Sourcing Current vs. Output Voltage Sinking Current vs. Output Voltage Figure 17. Figure 18. Output Voltage vs. Sourcing Current Output Voltage vs. Sinking Current Figure 19. Figure 20. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LMV232 7 LMV232 SNWS017C - DECEMBER 2004 - REVISED MARCH 2013 www.ti.com APPLICATION NOTES The LMV232 mean square power detector is particularly suited for accurate power measurement of RF modulated signals that exhibit large peak to average ratios, i.e. large variations of the signal envelope. Such noise-like signals are encountered e.g. in CDMA and Wide-band CDMA cell-phones. Many power detection circuits, particularly those devised for constant-envelope modulated signals as in GSM, are based on peak detection and provide accurate power measurements for constant envelope or low-crest factor (ratio of peak to RMS) signals only. Such detectors are therefore not particularly suited for CDMA and WCDMA applications. TYPICAL APPLICATION The LMV232 is especially suited for CDMA and WCDMA applications with 2 Power Amplifiers (PA's). A typical setup is given in Figure 21. The output power of one PA is measured at a time, depending on the bandselect pin (BS). If the BS = High RFIN1 is used for measurements, if BS = Low RFIN2 is used. The measured output voltage of the LMV232 is read by the ADC of the baseband chip and the gain of the PA is adjusted if necessary. With an input impedance of 50, the LMV232 can be directly connected to a 20 dB directional coupler without the need for an additional external attenuator. The setup can be adjusted to various PA output ranges by selection of a directional coupler or insertion of an additional (resistive) attenuator between the coupler outputs and the LMV232 RF inputs. The LMV232 conversion gain and bandwidth are configured by a resistor and a capacitor. Resistor R1 sets the conversion gain from RFIN to the output voltage. A higher resistor value will result in a higher conversion gain. The maximum dynamic range is achieved when the resistor value is as high as possible, i.e. the output signal just doesn't clip and the voltage stays within the baseband ADC input range. The filter bandwidth is adjusted by capacitor C1. The capacitor value should be chosen such that the response time of the device is fast enough and modulation on the RF input signal is not visible at the output (ripple suppression). The -3 dB filter bandwidth of the output filter is determined by the time constant R1*C1. Generally a capacitor value of 1.5 nF is a good choice. PEAK TO AVERAGE RATIO SENSITIVITY The LMV232 power detector provides an accurate power measurement for arbitrary input signals, low and high peak-to-average ratios and crest factors. This is because its operation is not based on peak detection, but on direct determination of the mean square value. This is the most accurate power measurement, since it exactly implements the definition of power. A mean-square detector measures VRMS2 for all waveforms. Peak detection is less accurate because the relation between peak detection and mean square detection depends on the waveform. A peak detector measures P = VPEAK2 for all waveforms, while it should measures P = VPEAK2/2 (for R = 1) for a sine wave and P = VPEAK2/3 for a triangle wave for instance. For a CDMA signal, the measurement error can be in the order of 5 to 6 dB. For many wave forms, specially those with high peak-to-average ratios, peak detection is not accurate enough and therefore a mean square detector is recommended. MEAN SQUARE CONFORMANCE ERROR The LMV232 is a mean square detector and therefore should have an output voltage (in Volts) that linearly relates to the RF input power (in mW). The input referred error, with respect to an ideal linear mean square detector, is determined as a measure for the accuracy of the detector. 8 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LMV232 LMV232 www.ti.com SNWS017C - DECEMBER 2004 - REVISED MARCH 2013 RF INPUT COUPLER ANTENNA PA1 R2 50: RF INPUT COUPLER PA2 VDD B3 TO BASEBAND RFIN1 OUT A3 R1 6.2 k: R3 50: GND B1 C1 1.5 nF A1 LMV232 FB RFIN2 C1 A2 C2 BS C3 SD Figure 21. Typical Application The detection curves of Figure 22 show the detector response to RF input power. To show the complete dynamic range on a logarithmic scale, the pedestal voltage (VPEDESTAL) is subtracted from the output. The pedestal voltage is defined as the output voltage in the absence of an RF input signal (at 25C). The best-fit ideal mean square response is represented by the fitted curve in Figure 22. The input referred error of the detection curves with respect to this best-fit mean square response is determined as follows: * Determine the best-fit mean square response. * Determine the output referred error between the actual detector response and the ideal mean square response. * Translate the output referred error to an input referred error. Figure 22. Detection Curve The best-fit linear curve is obtained from the detector response by means of linear regression. The output referred error is calculated with the formula: ErrordBV = 20*log[ (VOUT-VPEDESTAL)/(KDET*PIN) ] Where, Conversion gain of the ideal fitted curve KDET is in V/mW and the RF input power PIN in mW. To translate this output referred error (in dB) to an input referred error, it has to be divided by a factor of 2. This is due to the mean square characteristic of the device. The response of a mean square detector changes by 2 dB for every dB change of the input power. Figure 23 depicts the resulting curve. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LMV232 9 LMV232 SNWS017C - DECEMBER 2004 - REVISED MARCH 2013 www.ti.com Figure 23. Input referred Error vs. RF Input Power Analyzing Figure 23 shows that three sections can be distinguished: * At higher power levels the error increases. * A middle section where the error is constant and relatively small. * At lower power levels the error increases again. These three sections are leading back to three error mechanisms. At higher power levels the detectors output starts to saturate because the output voltage approaches the maximum signal swing that the detector can handle. The maximum output voltage of the device thus limits the upper end of the detection range. Also the maximum allowed ADC voltage of the baseband chip can limit the detection range at higher power levels. By adjusting the feedback resistor RFB of Figure 21 the upper end of the range can be shifted. This is valid until the detector cell inside the LMV232 is the limiting factor. The middle section of the error curve shows a small error variation. This is the section where the detector is used and is called the detection range of the detector. This range is limited on both sides by a maximum allowed error. For low input power levels, the variation of output voltage is very small. Therefore the measurement resolution ADC is important in order to measure those small variations. Offsets and temperature variation impact the accuracy at low power levels as well. DETECTION ERROR OVER TEMPERATURE Like any power detector device, the output signal of the LMV232 mean square power detector shows some residual variation over temperature that limits it's dynamic range. The variation determines the accuracy and range of input power levels for which the detector produces an accurate output signal. The error over temperature is mainly caused by the variation of the pedestal voltage. Besides this, a minimal error contribution leads back to the conversion gain variation of the detector. This conversion gain error is visible in the mid-power range, where the temperature error curves of Figure 23 run parallel to each other. Since the conversion gain variation is acceptable, the focus will be on the pedestal voltage variation over temperature. The pedestal voltage at 25C is subtracted from the output voltage of each curve. Variations of the pedestal voltage over temperature are thus included in the error. The pedestal voltage variation itself consists of 2 error sources. One is the variation of the reference voltage VREF. The other is an offset current IOS that is generated inside the detector. This is depicted in Figure 24. Depending on the measurement strategy one or both error sources can be eliminated. The error sources of the pedestal voltage can be shown in a formula for VOUT: VOUT = VREF + (IOS + IDET) * RFB Where IDET represents the intended detector output signal. In the absence of RF input power IDET equals zero. The formula for the pedestal voltage can therefore be written as: VPEDESTAL = VREF + IOS * RFB 10 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LMV232 LMV232 www.ti.com SNWS017C - DECEMBER 2004 - REVISED MARCH 2013 RFB FB IDET OUT + + IOS VREF LMV232 Figure 24. Pedestal Voltage For low input power levels, the pedestal variation VPEDESTAL is the dominant cause of error. Besides temperature variation of the pedestal voltage, which limits the lower end of the range, the pedestal voltage can also vary from part-to-part. By applying a suitable measurement strategy, the pedestal voltage error contribution can be significantly reduced or eliminated completely. POWER MEASUREMENT STRATEGIES This section describes the measurement strategies to reduce or eliminate the pedestal voltage variation. Which strategy is chosen depends on the possibilities for a factory trim and implementation of calibration procedures. Since the pedestal voltage is the reference level for the LMV232, it needs to be calibrated/measured at least once to eliminate part-to-part spread. This is required to determine the exact detector output signal. Because of process tolerances, the absolute part-to-part variation of the output voltage in the absence of RF input power will be in the order of 5 - 10%. All measurement strategies discussed eliminate this part-to-part spread. Strategy 1: Elimination of Part-to-Part Spread at Room Temperature Only In this strategy, the pedestal voltage is determined once during manufacturing and stored into the memory of the phone. At each power measurement this stored pedestal level is digitally subtracted from the measured output signal of the LMV232 during normal operation. The procedure is thus: * Measure the detector output in the absence of RF power during manufacturing. * Store the output voltage value in the cell phone memory (after it is analog-to-digital converted). * Subtract the stored value from each detector output reading. RFB FB IDET OUT + IOS + ADC - + VREF LMV232 Figure 25. Strategy 1: Room Temperature Calibration Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LMV232 11 LMV232 SNWS017C - DECEMBER 2004 - REVISED MARCH 2013 www.ti.com The advantage of this strategy is that calibration is required only once during manufacturing and not during normal operation. The disadvantage is the fact that this method neither compensates for the residual temperature drift of the reference voltage VREF nor for offset current variations. Only part-to-part variations at room temperature are eliminated by this strategy. Especially the residual temperature drift negatively affects the measurement accuracy. Strategy 2: Elimination of Temperature Spread in VREF If software changes need to be reduced to a minimum and the baseband chip has a differential ADC, strategy 2 can be used to eliminate temperature variations of the reference voltage VREF. One pin of the ADC is connected to FB and one is connected to OUT (Figure 26). FB ADC RFB + IDET + IOS OUT + VREF LMV232 Figure 26. Strategy 2: Differential Measurement The power measurement is independent of the reference voltage VREF, since the ADC reading is: VOUT-VFB = (IOS + IDET) * RFB The reading of the ADC obviously doesn't contain the reference voltage source VREF anymore, but the contribution of the offset current remains present. This measurement is performed during normal operation. Therefore, it eliminates voltage reference variations over temperatures, as opposed to strategy 1. Also offset variations in the op amp are eliminated in this strategy. Strategy 3: Complete Elimination of Temperature Spread in Pedestal Voltage The most accurate measurement is strategy 3, which eliminates the temperature variation of both the reference voltage VREF and the offset current IOS. In this strategy, the pedestal voltage is measured regularly during operation of the phone, and stored in the phone memory. For each power measurement, the stored value is digitally subtracted from the (analog-to-digital converted) detector output signal. Since it measures the pedestal voltage itself for calibration it compensates both for the reference voltage VREF as well as for the offset current variation IOS. The frequency of the `calibration measurement' can be significantly lower than those of power measurements, depending on how fast the temperature of the device changes. 12 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LMV232 LMV232 www.ti.com SNWS017C - DECEMBER 2004 - REVISED MARCH 2013 RFB FB RFIN1 RF SIGNAL LMV232 2 + X OUT ADC RFIN2 OFF BS Figure 27. Strategy 3: Calibration during normal operation The calibration measurement procedure can be explained with the aid of Figure 21, which depicts a typical power measurement setup using the LMV232. In normal operation, the two PA's in the setup will never be active at the same time. One PA will produce the required transmit power, while the other one is off, (disabled) and produces no power. The pedestal voltage should be measured in the absence of RF power. This can be achieved by switching the Band Select (BS) pin such that the LMV232 input is selected where the disabled PA is connected to. The pedestal voltage at no input power can be read at the output pin. Using the Band Select (BS) control pin of the LMV232: * Select the RF input that is connected to the disabled PA, by the BS pin. * Measure the detector output. * Store the result in the phone memory. * Subtract the stored value from each detector power reading, until a new update is performed. Important advantages of this approach are that no factory trim is required and the temperature drift of the pedestal can be cancelled almost completely as well as the part-to-part spread. The remaining error is determined by the resolution of the ADC. A slight disadvantage is that on average more than one detector reading is required per power measurement. This overhead though can be made almost negligible in normal circumstances. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LMV232 13 LMV232 SNWS017C - DECEMBER 2004 - REVISED MARCH 2013 www.ti.com REVISION HISTORY Changes from Revision B (March 2013) to Revision C * 14 Page Changed layout of National Data Sheet to TI format .......................................................................................................... 13 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LMV232 PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (C) Top-Side Markings (3) (4) LMV232TL/NOPB ACTIVE DSBGA YZR 8 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 A 02 LMV232TLX/NOPB ACTIVE DSBGA YZR 8 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 A 02 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 Samples PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) LMV232TL/NOPB DSBGA YZR 8 250 178.0 8.4 LMV232TLX/NOPB DSBGA YZR 8 3000 178.0 8.4 Pack Materials-Page 1 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 1.7 1.7 0.76 4.0 8.0 Q1 1.7 1.7 0.76 4.0 8.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMV232TL/NOPB DSBGA YZR LMV232TLX/NOPB DSBGA YZR 8 250 210.0 185.0 35.0 8 3000 210.0 185.0 35.0 Pack Materials-Page 2 MECHANICAL DATA YZR0008xxx D 0.6000.075 E TLA08XXX (Rev C) D: Max = 1.54 mm, Min = 1.479 mm E: Max = 1.54 mm, Min = 1.479 mm 4215045/A NOTES: A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994. B. 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