PD - 96894A IRFB4310 IRFS4310 IRFSL4310 Applications l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits HEXFET(R) Power MOSFET D VDSS RDS(on) typ. max. ID G Benefits l Worldwide Best RDS(on) in TO-220 l Improved Gate, Avalanche and Dynamic dV/dt Ruggedness l Fully Characterized Capacitance and Avalanche SOA l Enhanced body diode dV/dt and dI/dt Capability S GDS GDS 7.0m: 140A GDS D2Pak TO-220AB IRFB4310 100V 5.6m: TO-262 IRFSL4310 IRFS4310 Absolute Maximum Ratings Symbol Parameter Max. ID @ TC = 25C Continuous Drain Current, VGS @ 10V Units c 97 c 140 A ID @ TC = 100C Continuous Drain Current, VGS @ 10V IDM Pulsed Drain Current PD @TC = 25C Maximum Power Dissipation 330 W Linear Derating Factor 2.2 VGS Gate-to-Source Voltage 20 W/C V dV/dt TJ Peak Diode Recovery 14 TSTG Storage Temperature Range d 550 f 300 Soldering Temperature, for 10 seconds (1.6mm from case) x Avalanche Characteristics EAS (Thermally limited) Single Pulse Avalanche Energy IAR Avalanche Current EAR Repetitive Avalanche Energy x 10lb in (1.1N m) Mounting torque, 6-32 or M3 screw c V/ns C -55 to + 175 Operating Junction and e mJ 980 See Fig. 14, 15, 22a, 22b, g A mJ Thermal Resistance Symbol Parameter k RJC Junction-to-Case RCS Case-to-Sink, Flat Greased Surface , TO-220 RJA Junction-to-Ambient, TO-220 RJA www.irf.com k 2 Junction-to-Ambient (PCB Mount) , D Pak jk Typ. Max. --- 0.45 0.50 --- --- 62 --- 40 Units C/W 1 01/20/06 IRF/B/S/SL4310 Static @ TJ = 25C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units V(BR)DSS Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance V Conditions 100 --- --- --- 0.064 --- V/C Reference to 25C, ID = 1mA VGS = 0V, ID = 250A --- 5.6 7.0 m VGS = 10V, ID = 75A VGS(th) Gate Threshold Voltage 2.0 --- 4.0 V VDS = VGS, ID = 250A IDSS Drain-to-Source Leakage Current --- --- 20 A VDS = 100V, VGS = 0V --- --- 250 IGSS Gate-to-Source Forward Leakage --- --- 200 Gate-to-Source Reverse Leakage --- --- -200 Gate Input Resistance --- 1.4 --- RG d g VDS = 100V, VGS = 0V, TJ = 125C nA VGS = 20V f = 1MHz, open drain VGS = -20V Dynamic @ TJ = 25C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units Conditions gfs Qg Forward Transconductance 160 --- --- S VDS = 50V, ID = 75A Total Gate Charge --- 170 250 nC ID = 75A Qgs Gate-to-Source Charge --- 46 --- VDS = 80V Qgd Gate-to-Drain ("Miller") Charge --- 62 --- VGS = 10V td(on) Turn-On Delay Time --- 26 --- tr Rise Time --- 110 --- ID = 75A td(off) Turn-Off Delay Time --- 68 --- RG = 2.6 tf Fall Time --- 78 --- Ciss Input Capacitance --- 7670 --- Coss Output Capacitance --- 540 --- VDS = 50V Crss Reverse Transfer Capacitance --- 280 --- = 1.0MHz --- 650 --- VGS = 0V, VDS = 0V to 80V --- 720.1 --- VGS = 0V, VDS = 0V to 80V i Coss eff. (ER) Effective Output Capacitance (Energy Related) Coss eff. (TR) Effective Output Capacitance (Time Related) h ns VGS = 10V pF g VDD = 65V g VGS = 0V j, See Fig.11 h, See Fig. 5 Diode Characteristics Symbol Parameter Min. Typ. Max. Units c Conditions IS Continuous Source Current --- --- 140 ISM (Body Diode) Pulsed Source Current --- --- VSD (Body Diode) Diode Forward Voltage --- --- 1.3 V trr Reverse Recovery Time --- 45 68 ns p-n junction diode. TJ = 25C, IS = 75A, VGS = 0V VR = 85V, TJ = 25C --- 55 83 Qrr Reverse Recovery Charge --- 82 120 nC TJ = 25C di IRRM Reverse Recovery Current ton Forward Turn-On Time Notes: Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 75A Repetitive rating; pulse width limited by max. junction temperature. Limited by TJmax, starting TJ = 25C, L = 0.35mH RG = 25, IAS = 75A, VGS =10V. Part not recommended for use above this value. ISD 75A, di/dt 550A/s, VDD V(BR)DSS, TJ 175C. Pulse width 400s; duty cycle 2%. 2 A --- 120 180 3.3 --- D showing the integral reverse 550 --- MOSFET symbol TJ = 125C G S g IF = 75A di/dt = 100A/s g TJ = 125C A TJ = 25C Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS. When mounted on 1" square PCB (FR-4 or G-10 Material). For recom mended footprint and soldering techniques refer to application note #AN-994. R is measured at TJ approximately 90C www.irf.com IRF/B/S/SL4310 1000 1000 100 BOTTOM 10 BOTTOM 100 4.5V 60s PULSE WIDTH Tj = 25C 4.5V 0.1 1 10 0.1 100 1 10 100 VDS, Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 3.0 RDS(on) , Drain-to-Source On Resistance (Normalized) 1000 ID, Drain-to-Source Current() 60s PULSE WIDTH Tj = 175C 10 1 100 TJ = 175C 10 TJ = 25C VDS = 50V 60s PULSE WIDTH 1 3.0 4.0 5.0 6.0 7.0 ID = 75A VGS = 10V 2.5 2.0 1.5 1.0 0.5 8.0 -60 -40 -20 VGS, Gate-to-Source Voltage (V) 12000 VGS, Gate-to-Source Voltage (V) Coss = Cds + Cgd Ciss 8000 6000 4000 2000 Coss Crss 10 100 VDS, Drain-to-Source Voltage (V) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage www.irf.com ID= 75A VDS = 80V VDS= 50V VDS= 20V 16 12 8 4 0 0 1 20 40 60 80 100 120 140 160 180 Fig 4. Normalized On-Resistance vs. Temperature 20 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd 10000 0 TJ , Junction Temperature (C) Fig 3. Typical Transfer Characteristics C, Capacitance (pF) VGS 15V 10V 8.0V 6.0V 5.5V 5.0V 4.8V 4.5V TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP VGS 15V 10V 8.0V 6.0V 5.5V 5.0V 4.8V 4.5V 0 40 80 120 160 200 240 280 QG Total Gate Charge (nC) Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 3 IRF/B/S/SL4310 10000 ID, Drain-to-Source Current (A) ISD , Reverse Drain Current (A) 1000.0 TJ = 175C 100.0 10.0 TJ = 25C 1.0 OPERATION IN THIS AREA LIMITED BY R DS (on) 1000 100 100sec 10 1 VGS = 0V 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 1 LIMITED BY PACKAGE ID , Drain Current (A) 120 100 80 60 40 20 0 75 100 125 150 175 V(BR)DSS , Drain-to-Source Breakdown Voltage 140 50 100 1000 Fig 8. Maximum Safe Operating Area Fig 7. Typical Source-Drain Diode Forward Voltage 25 10 VDS , Drain-toSource Voltage (V) VSD , Source-to-Drain Voltage (V) 120 115 110 105 100 -60 -40 -20 0 TC , Case Temperature (C) 20 40 60 80 100 120 140 160 180 TJ , Junction Temperature (C) Fig 9. Maximum Drain Current vs. Case Temperature Fig 10. Drain-to-Source Breakdown Voltage EAS, Single Pulse Avalanche Energy (mJ) 4.0 3.5 3.0 Energy (J) 10msec DC 0.1 0.1 2.5 2.0 1.5 1.0 0.5 0.0 2400 I D 12A 17A BOTTOM 75A TOP 2000 1600 1200 800 400 0 0 20 40 60 80 100 VDS, Drain-to-Source Voltage (V) Fig 11. Typical COSS Stored Energy 4 1msec Tc = 25C Tj = 175C Single Pulse 120 25 50 75 100 125 150 175 Starting TJ, Junction Temperature (C) Fig 12. Maximum Avalanche Energy Vs. DrainCurrent www.irf.com IRF/B/S/SL4310 1 Thermal Response ( ZthJC ) D = 0.50 0.1 0.20 0.10 0.05 0.01 J 0.02 0.01 R1 R1 J 1 R2 R2 C 2 1 Ri (C/W) i (sec) 0.1962 0.00117 0.2542 2 0.016569 Ci= i/Ri Ci= i/Ri 0.001 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc SINGLE PULSE ( THERMAL RESPONSE ) 0.0001 1E-006 1E-005 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case 100 Avalanche Current (A) Duty Cycle = Single Pulse Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 150C and Tstart =25C (Single Pulse) 0.01 0.05 0.10 10 1 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming j = 25C and Tstart = 150C. 0.1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 14. Typical Avalanche Current vs.Pulsewidth EAR , Avalanche Energy (mJ) 1000 Notes on Repetitive Avalanche Curves , Figures 14, 15: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long as neither Tjmax nor Iav (max) is exceeded. 3. Equation below based on circuit and waveforms shown in Figures 16a, 16b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav *f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) TOP Single Pulse BOTTOM 1% Duty Cycle ID = 75A 800 600 400 200 0 25 50 75 100 125 150 175 Starting TJ , Junction Temperature (C) Fig 15. Maximum Avalanche Energy vs. Temperature www.irf.com PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav 5 IRF/B/S/SL4310 20 ID = 1.0A ID = 1.0mA ID = 250A 4.0 16 IRRM - (A) VGS(th) Gate threshold Voltage (V) 5.0 3.0 12 8 IF = 30A VR = 85V 2.0 4 TJ = 125C TJ = 25C 1.0 0 -75 -50 -25 0 25 50 75 100 125 150 175 100 200 300 400 500 600 700 800 900 1000 TJ , Temperature ( C ) dif / dt - (A / s) Fig. 17 - Typical Recovery Current vs. dif/dt 20 500 16 400 QRR - (nC) IRRM - (A) Fig 16. Threshold Voltage Vs. Temperature 12 8 4 IF = 45A VR = 85V 300 200 IF = 30A VR = 85V 100 TJ = 125C TJ = 25C TJ = 125C TJ = 25C 0 0 100 200 300 400 500 600 700 800 900 1000 100 200 300 400 500 600 700 800 900 1000 dif / dt - (A / s) dif / dt - (A / s) Fig. 19 - Typical Stored Charge vs. dif/dt Fig. 18 - Typical Recovery Current vs. dif/dt 500 QRR - (nC) 400 300 200 100 IF = 45A VR = 85V TJ = 125C TJ = 25C 0 100 200 300 400 500 600 700 800 900 1000 dif / dt - (A / s) 6 Fig. 20 - Typical Stored Charge vs. dif/dt www.irf.com IRF/B/S/SL4310 D.U.T Driver Gate Drive - - - * D.U.T. ISD Waveform Reverse Recovery Current + RG * * * * dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test VDD P.W. Period VGS=10V Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer + D= Period P.W. + + - Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Current Inductor Curent ISD Ripple 5% * VGS = 5V for Logic Level Devices Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs V(BR)DSS 15V DRIVER L VDS tp D.U.T RG + V - DD IAS VGS 20V tp A 0.01 I AS Fig 22a. Unclamped Inductive Test Circuit Fig 22b. Unclamped Inductive Waveforms LD VDS VDS 90% + VDD - 10% D.U.T VGS VGS Pulse Width < 1s Duty Factor < 0.1% td(on) Fig 23a. Switching Time Test Circuit tr td(off) tf Fig 23b. Switching Time Waveforms Id Vds Vgs L VCC DUT 0 Vgs(th) 1K Qgs1 Qgs2 Fig 24a. Gate Charge Test Circuit www.irf.com Qgd Qgodr Fig 24b. Gate Charge Waveform 7 IRF/B/S/SL4310 TO-220AB Package Outline Dimensions are shown in millimeters (inches) TO-220AB Part Marking Information EXAMPLE: T HIS IS AN IRF1010 LOT CODE 1789 AS S EMBLED ON WW 19, 2000 IN T HE AS S EMBLY LINE "C" Note: "P" in as sembly line pos ition indicates "Lead - Free" INT ERNAT IONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER DAT E CODE YEAR 0 = 2000 WEEK 19 LINE C TO-220AB packages are not recommended for Surface Mount Application. 8 www.irf.com IRF/B/S/SL4310 TO-262 Package Outline Dimensions are shown in millimeters (inches) TO-262 Part Marking Information EXAMPLE: T HIS IS AN IRL3103L LOT CODE 1789 AS S EMBLED ON WW 19, 1997 IN T HE AS S EMBLY LINE "C" INT ERNATIONAL RECTIFIER LOGO AS S EMBLY LOT CODE PART NUMBER DAT E CODE YEAR 7 = 1997 WEEK 19 LINE C OR INT ERNATIONAL RECTIFIER LOGO AS S EMBLY LOT CODE www.irf.com PART NUMBER DAT E CODE P = DES IGNAT ES LEAD-FREE PRODUCT (OPTIONAL) YEAR 7 = 1997 WEEK 19 A = AS S EMBLY S IT E CODE 9 IRF/B/S/SL4310 D2Pak (TO-263AB) Package Outline Dimensions are shown in millimeters (inches) D2Pak (TO-263AB) Part Marking Information T HIS IS AN IRF530S WIT H LOT CODE 8024 AS S EMBLED ON WW 02, 2000 IN T HE AS SEMBLY LINE "L" INT ERNAT IONAL RECT IFIER LOGO ASS EMBLY LOT CODE PART NUMBER F 530S DAT E CODE YEAR 0 = 2000 WEEK 02 LINE L OR INT ERNAT IONAL RECT IF IER LOGO ASS EMBLY LOT CODE 10 PART NUMBER F 530S DAT E CODE P = DES IGNATES LEAD - FREE PRODUCT (OPTIONAL) YEAR 0 = 2000 WEEK 02 A = AS SEMBLY S IT E CODE www.irf.com IRF/B/S/SL4310 D2Pak (TO-263AB) Tape & Reel Information TRR 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) FEED DIRECTION 1.85 (.073) 1.65 (.065) 1.60 (.063) 1.50 (.059) 11.60 (.457) 11.40 (.449) 0.368 (.0145) 0.342 (.0135) 15.42 (.609) 15.22 (.601) 24.30 (.957) 23.90 (.941) TRL 10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 4.72 (.136) 4.52 (.178) 16.10 (.634) 15.90 (.626) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 60.00 (2.362) MIN. 26.40 (1.039) 24.40 (.961) 3 30.40 (1.197) MAX. 4 Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR's Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 01/06 www.irf.com 11 Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/