26-A, 12-V INPUT NON-ISOLATED WIDE-OUTPUT
1
FEATURES APPLICATIONS
NominalSize=1.37inx1.12in
(34,8mmx28,5mm)
DESCRIPTION
PTH12030W/L
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.................................................................................................................................................... SLTS211H – MAY 2003 – REVISED DECEMBER 2008
ADJUST POWER MODULE
•Multi-voltage, multi-processor systems2
•Up to 26 A Output Current•12-V Input Voltage•Wide-Output Voltage Adjust(1.2 V to 5.5 V) / (0.8 V to 1.8 V)•Efficiencies up to 94%•235 W/in
3
Power Density•On/Off Inhibit•Output Voltage Sense•Prebias Startup•Margin Up/Down Controls•Dual-Phase Topology•Auto-Track™ Sequencing•Undervoltage Lockout•Output Overcurrent Protection(Non-Latching, Auto-Reset)•Overtemperature Protection•Operating Temperature: – 40 ° C to 85 ° C•Safety Agency Approvals:UL/IEC/CSA-C22.2 60950-1•Point of Load Alliance (POLA) Compatible
The PTH12030 is a series of high current, non-isolated power module from Texas Instruments. This product ischaracterized by high efficiencies, and up to 26 A of output current, while occupying a small PCB area of1.64 in
2
. In terms of cost, size, and performance, the series provides OEM ’ s with a flexible module that meets therequirements of the most complex and demanding mixed-signal applications. These include the most denslypopulated, multiprocessor systems that incorporate the high-speed TMS320™ DSP family, microprocessors, andASICs.
The series uses double-sided surface mount construction and provides high-performance step-down powerconversion from a 12-V input bus voltage. The output voltage of the W-suffix parts can be set to any value overthe range, 1.2 V to 5.5 V. The L-suffix parts have an adjustment range of 0.8 V to 1.8 V. The output voltage is setusing a single resistor.
This series includes Auto-Track™. Auto-Track simplifies power-up and power-down supply voltage sequencing ina system by enabling modules to track each other, or any other external voltage.
Each model also includes an on/off inhibit, output voltage adjust (trim), and margin up/down controls, and theability to start up into an existing prebias. An output voltage sense ensures tight load regulation, and an outputovercurrent and thermal shutdown feature provide for protection against external load faults.
Package options inlude both through-hole and surface mount configurations.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2Auto-Track, TMS320, POLA are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2003 – 2008, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
STANDARD APPLICATION
MarginDown
MarginUp
VI
C
330 F
(Optional)
O
m
C
560 F
Electrolytic
(Required)
I
m
Inhibit
GND GND
VO
V Sense
O
Track
RSET
PTH12030x
(TopView)
1
3
13 12 11
9
7
65
4
2
10
8
L
O
A
D
ABSOLUTE MAXIMUM RATINGS
PTH12030W/L
SLTS211H – MAY 2003 – REVISED DECEMBER 2008 ....................................................................................................................................................
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foamduring storage or handling to prevent electrostatic damage to the MOS gates.
A. R
SET
= Required to set the output voltage to a value higher than the minimum value. See the Application Informationsection for values.
ORDERING INFORMATION
For the most current package and ordering information, see the Package Option Addendum at the end of this datasheet, or seethe TI website at www.ti.com.
Over operating free-air temperature range, all voltages are with respect to GND (unless otherwise noted)
MIN TYP MAX UNIT
V
Track
Track pin voltage – 0.3 V
I
+ 0.3 VT
A
Operating Temperature Over V
I
range – 40 85RangeT
wave
Wave solder temperature Surface temperature of module body or pins PTH12030WAH
260(5seconds maximum)
PTH12030WAD
° CPTH12030WAS 235
(1)T
reflow
Solder reflow temperature Surface temperature of module body or pins
PTH12030WAZ 260
(1)
T
stg
Storage Temperature Storage temperature of module removed from shipping package – 55 125T
pkg
Packaging temperature Shipping Tray or Tape and Reel storage or bake temperature 45Mechanical Shock Per Mil-STD-883D, Method 2002.3, 1 ms, 1/2 Sine, mounted 500 GMechanical Vibration Mil-STD-883D, Method 2007.2 20-2000 Hz 15 GWeight 10 gramsFlammability Meets UL 94V-O
(1) During soldering of package version, do not elevate peak temperature of the module, pins, or internal components above the statedmaximum.
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ELECTRICAL CHARACTERISTICS
PTH12030W/L
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.................................................................................................................................................... SLTS211H – MAY 2003 – REVISED DECEMBER 2008
T
A
= 25 ° C, V
I
= 12 V, V
O
= 3.3 V, C
I
= 560 µF, C
O
= 0 µF, and I
O
= I
O
max (unless otherwise stated)
PTH12030W
CHARACTERISTICS CONDITIONS MIN TYP MAX UNIT
60 ° C, 200 LFM airflow 0 26
(1)I
O
Output current A25 ° C, natural convection 0 26
(1)
V
I
Input voltage range Over l
O
range 10.2 13.8 VV
O
tol Set-point voltage tolerance ± 2
(2)
%V
O
∆Reg
temp
Temperature variation – 40 ° C < T
A
< 85 ° C ± 0.5 %V
O
∆Reg
line
Line regulation Over V
I
range ± 5 mV
∆Reg
load
Load regulation Over I
O
range ± 5 mV
∆Reg
tot
Total qutput variation Includes set-point, line, load, – 40 ° C ≤T
A
≤85 ° C ± 3
(2)
%V
O
∆V
adj
V
O
adjust range Over V
I
range 1.2 5.5 VR
SET
= 280 ΩV
O
= 5 V 94.5%R
SET
= 2 k ΩV
O
= 3.3 V 92.7%R
SET
= 4.32 k ΩV
O
= 2.5 V 91.4%ηEfficiency I
O
= 18 A
R
SET
= 11.5 k ΩV
O
= 1.8 V 89.5%R
SET
= 24.3 k ΩV
O
= 1.5 V 88.2%R
SET
= open circuit V
O
= 1.2 V 86.2%V
O
ripple (peak-to-peak) 20-MHz bandwidth All Voltages 25 mV
PP
I
O
trip Overcurrent threshold Reset, followed by auto-recovery 50 At
tr
Recovery Time 50 µS1 A/ µs load step,Transient response
50 to 100% I
O
max, C
O
= 330 µ F∆V
tr
V
O
over/undershoot 150 mVMargin up/down adjust ± 5%Margin control (pins 12 & 13)
Margin input current, Pin to GND -8
(3)
µAI
IL
track Track input current (pin 11) Pin to GND -0.13
(4)
µAdV
track
/dt Track slew rate capability C
O
≤C
O
(max) 1 V/msV
I
increasing 9.5UVLO Undervoltage lockout VV
I
decreasing 8.5Input high voltage (V
IH
) Referenced to GND 2.5 Open
(5)Inhibit
Vcontrol Input low voltage (V
IL
) Referenced to GND – 0.2 0.5(pin 4)
Input low current (I
IL
) Pin 4 to GND 0.5 µAI
I
inh Input standby current Inhibit (pin 4) to GND, track (pin 11) V
I
10 mAfs Switching frequency Over V
I
and I
O
ranges 475 575 675 kHzC
I
External input capacitance 560
(6)
µFnonceramic 0 330
(7)
7,150
(8)Capacitance value µFC
O
External output capacitance ceramic 0 300Equiv. series resistance (nonceramic) 4
(9)
mΩ
MTBF Reliability Bellcore TR-332, 50% stress, T
A
=40 ° C, ground benign 3 10
6
Hrs
(1) See SOA curves or consult factory for appropriate derating.(2) The set-point voltage tolerance is affected by the tolerance and stability of R
SET
. The stated limit is unconditionally met if R
SET
has atolerance of 1 %, with 100 ppm/ ° C (or better) temperature stability.(3) A small, low-leakage ( < 100 nA) MOSFET is recommended to control this pin. The open-circuit voltage is less than 1 Vdc.(4) A low-leakage ( < 100 nA), open-drain device, such as MOSFET or voltage supervisor IC, is recommended to control this pin.(5) This control pin is pulled up to an internal 5-V source. To avoid risk of damage to the module, do not apply an external voltage greaterthan 7 V. If it is left open-circuit, the module operates when input power is applied. A small, low-leakage ( < 100 nA) MOSFET oropen-drain/collector voltage supervisor IC is recommended for control. For further info, see the related application information section.(6) A 560 µF electrolytic input capacitor, rated for a minimum of 500 mArms of ripple current is required for proper operation.(7) An external output capacitor is not required for basic operation. Adding 330 µ F of distributed capacitance at the load will improve thetransient response.(8) This is the calculated maximum. The minimum ESR limitation often results in a lower value. See the application information section.(9) This is the typical ESR for all the electrolytic (nonceramic) ouput capacitance. Use 7 m Ωas the minimum when using max-ESR valuesto calculate.
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ELECTRICAL CHARACTERISTICS
PTH12030W/L
SLTS211H – MAY 2003 – REVISED DECEMBER 2008 ....................................................................................................................................................
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T
A
= 25 ° C, V
I
= 12 V, V
O
= 3.3 V, C
I
= 560 µF, C
O
= 0 µF, and I
O
= I
O
max (unless otherwise stated)
PTH12030L
CHARACTERISTICS CONDITIONS MIN TYP MAX UNIT
60 ° C, 200 LFM airflow 0 26
(1)I
O
Output current A25 ° C, natural convection 0 26
(1)
V
I
Input voltage range Over l
O
range 10.2 13.8 VV
O
tol Set-point voltage tolerance ± 2
(2)
%V
O
ΔReg
temp
Temperature variation – 40 ° C < T
A
< 85 ° C ± 0.5 %V
O
ΔReg
line
Line regulation Over V
I
range ± 5 mV
ΔReg
load
Load regulation Over I
O
range ± 5 mV
ΔReg
tot
Total output variation Includes set-point, line, load, – 40 ° C ≤T
A
≤85 ° C ± 3
(2)
%V
O
ΔV
adj
V
O
adjust range Over V
I
range 0.8 1.8 VR
SET
= 130 ΩV
O
= 1.8 V 89%R
SET
= 3.57 k ΩV
O
= 1.5 V 87%ηEfficiency I
O
= 18 A R
SET
= 12.1 k ΩV
O
= 1.2 V 85%R
SET
= 32.4 k ΩV
O
= 1 V 83%R
SET
= open cct V
O
= 0.8 V 80%V
O
ripple (peak-to-peak) 20-MHz bandwidth 15 mV
PP
I
O
trip Overcurrent threshold Reset, followed by auto-recovery 50 At
tr
Recovery Time 50 µ S1 A/ µs load step,Transient response
50 to 100% I
o
max, C
O
= 330 µF∆V
tr
V
O
over/undershoot 150 mVMargin up/down adjust ± 5 %Margin control (pins 12 & 13)
Margin input current, Pin to GND -8
(3)
µ AI
IL
track Track input current (pin 11) Pin to GND – 0.13
(4)
mAdV
track
/dt Track slew rate capability C
O
≤C
O
(max) 1 V/msV
I
increasing 9.5UVLO Undervoltage lockout VV
I
decreasing 8.5Input high voltage (V
IH
) Referenced to GND 2.5 Open
(5)Inhibit
Vcontrol Input low voltage (V
IL
) Referenced to GND – 0.2 0.5(pin4)
Input low current (I
IL
) Pin 4 to GND 0.5 mAI
I
inh Input standby current Inhibit (pin 4) to GND, track (pin 11) V
I
10 mAfs Switching frequency Over V
I
and I
O
ranges 475 575 675 kHzC
I
External input capacitance 560
(6)
µ Fnonceramic 0 330
(7)
7150
(8)Capacitance value µ FExternal outputC
O
ceramic 0 300capacitance
Equivalent series resistance (nonceramic) 4
(9)
mΩ
MTBF Reliability Bellcore TR-332, 50% stress, T
A
= 40 ° C, ground benign 3 10
6
Hr
(1) See SOA curves or consult factory for appropriate derating.(2) The set-point voltage tolerance is affected by the tolerance and stability of R
SET
. The stated limit is unconditionally met if R
SET
has atolerance of 1%, with 100 ppm/ ° C (or better) temperature stability.(3) A small, low-leakage ( < 100 nA) MOSFET is recommended to control this pin. The open-circuit voltage is less than 1 Vdc.(4) A low-leakage ( < 100 nA), open-drain device, such as MOSFET or voltage supervisor IC, is recommended to control this pin.(5) This control pin is pulled up to an internal 5-V source. To avoid risk of damage to the module, do not apply an external voltage greaterthan 7 V. If it is left open-circuit, the module operates when input power is applied. A small, low-leakage ( < 100 nA) MOSFET oropen-drain/collector voltage supervisor IC is recommended for control. For further information, see the application information section.(6) A 560 µF electrolytic input capacitor, rated for a minimum of 500 mArms of ripple current is required for proper operation.(7) An external output capacitor is not required for basic operation. Adding 330 µF of distributed capacitance at the load improves thetransient response.(8) This is the calculated maximum. The minimum ESR limitation often results in a lower value. See the application information section.(9) This is the typical ESR for all the electrolytic (non-ceramic) ouput capacitance. Use 7 m Ωas the minimum when using max-ESR valuesto calculate.
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Product Folder Link(s): PTH12030W/L
DEVICE INFORMATION
PTHXX030
(Top View)
1
3
13 12 11
9
7
654
2
10
8
PTH12030W/L
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.................................................................................................................................................... SLTS211H – MAY 2003 – REVISED DECEMBER 2008
TERMINAL FUNCTIONS
TERMINAL
DESCRIPTIONNAME NO.
This is the common ground connection for the V
I
and V
O
power connections. It is also the 0 VdcGND 1,3,7,10
reference for the control inputs.V
I
2 The positive input voltage power node to the module, which is referenced to common GND.The Inhibit pin is an open-collector/drain negative logic input that is referenced to GND. Applying alow-level ground signal to this input disables the module ’ s output and turns off the output voltage.Inhibit
(1)
4
When the Inhibit control is active, the input current drawn by the regulator is significantly reduced. If theInhibit pin is left open-circuit, the module produces an output whenever a valid input source is applied.A 1% resistor must be directly connected between this pin and pin 7 ( GND) to set the output voltage toa value higher than 0.8 V. The temperature stability of the resistor should be 100 ppm/ ° C (or better).The set point range for the output voltage is from 1.2 V to 5.5 V for W-suffix devices, and 0.8 V to 1.8 VV
O
Adjust 5 for L-suffix devices. The resistor value required for a given output voltage may be calculated using aformula. If left open circuit, the module output voltage defaults to its lowest value. For furtherinformation on output voltage adjustment, see the related application information section. Table 3 givesthe preferred resistor values for a number of standard output voltages.The sense input allows the regulation circuit to compensate for voltage drop between the module andV
O
Sense 6 the load. For optimal voltage accuracy, V
O
Sense should be connected to Vout. It can also be leftdisconnected.V
O
8,9 The regulated positive power output with respect to the GND node.This is an analog control input that enables the output voltage to follow an external voltage. This pinbecomes active typically 20 ms after the input voltage has been applied, and allows direct control of theoutput voltage from 0 V up to the nominal set-point voltage. Within this range the output will follow thevoltage at the Track pin on a volt-for-volt basis. When the control voltage is raised above this range,Track 11 the module regulates at its set-point voltage. The feature allows the output voltage to risesimultaneously with other modules powered from the same input bus. If unused, this input should beconnected to V
I
.Note: Due to the undervoltage lockout feature, the output of the module cannot followits own input voltage during power up. For more information, see the related application informationsection.
When this input is asserted to GND, the output voltage is decreased by 5% from the nominal. The inputrequires an open-collector (open-drain) interface. It is not TTL compatible. A lower percent change canMargin Down
(1)
12
be accomodated with a series resistor. For further information, see the related application informationsection.
When this input is asserted to GND, the output voltage is increased by 5%. The input requires anMargin Up
(1)
13 open-collector (open-drain) interface. It is not TTL compatible. The percent change can be reducedwith a series resistor. For further information, see the related application information section.
(1) Denotes negative logic:Open = Normal operationGround = Function active
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PTH12030W TYPICAL CHARACTERISTICS (V
I
= 12 V)
(1) (2)
0
10
20
30
40
50
0 5 10 15 20 25
Output Ripple − mV
IO − Output Current − A
VO = 3.3 V
VO = 2.5 V
VO = 1.8 V
VO = 1.2 V
VO = 5 V
50
60
70
80
90
100
0 5 10 15 20 25
Efficiency − %
IO − Output Current − A
VO = 5 V
VO = 3.3 V
VO = 2.5 V
VO = 1.8 V
VO = 1.2 V
0
2
4
6
8
10
0 5 10 15 20 25
IO − Output Current − A
VO = 3.3 V
VO = 2.5 V
VO = 1.8 V
VO = 1.2 V
VO = 5 V
− Power Dissipation − W
PD
0
30
20
105 15 2520
IO- Output Current - A
50
40
70
60
90
80
TA- Ambient Temperature - °C
400 LFM
200 LFM
100 LFM
Natural
Convection
VO= 5 V
0
30
20
10
5 15 2520
IO- Output Current - A
50
40
70
60
90
80
400 LFM
200 LFM
100 LFM
Natural
Convection
TA- Ambient Temperature - °C
VO= 3.3 V
PTH12030W/L
SLTS211H – MAY 2003 – REVISED DECEMBER 2008 ....................................................................................................................................................
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EFFICIENCY OUTPUT RIPPLE POWER DISSIPATIONvs vs vsLOAD CURRENT LOAD CURRENT LOAD CURRENT
Figure 1. Figure 2. Figure 3.
TEMPERATURE DERATING TEMPERATURE DERATINGvs vsOUTPUT CURRENT OUTPUT CURRENT
Figure 4. Figure 5.
(1) Characteristic data has been developed from actual products tested at 25 ° C. This data is considered typical data for the converter.Applies to Figure 1 ,Figure 2 , and Figure 3 .(2) SOA curves represent the conditions at which internal components are at or below the manufacturer ’ s maximum operatingtemperatures. Derating limits apply to modules soldered directly to a 4 in. × 4 in. double-sided PCB with 1 oz. copper. For surface mountproducts (AS and AZ suffix), multiple vias (plated through holes) are required to add thermal paths around the power pins. Please referto the mechanical specification for more information. Applies to Figure 4 .
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PTH12030L TYPICAL CHARACTERISTICS (V
I
= 12 V)
(1) (2)
50
60
70
80
90
100
Efficiency − %
IO − Output Current − A
0 5 10 15 20 25
VO = 0.8 V
VO = 1.8 V
VO = 1.5 V
VO = 1.2 V
VO = 1 V
− Power Dissipation − W
PD
0
2
4
6
8
IO − Output Current − A
0 5 10 15 20 25
VO = 1.5 V
VO = 1 V
VO = 0.8
V
VO = 1.8 V
Output Ripple − mV
0
10
20
30
40
50
IO − Output Current − A
0 5 10 15 20 25
VO = 1.8 V
VO = 1.5 V
VO = 1.2
V
VO = 1 V
VO = 0.8 V
TA− Ambient Temperature −
5C
20
30
40
50
60
70
80
90
IO − Output Current − A
0 5 10 15 20 25
400 LFM
Nat Conv
200 LFM
100 LFM
VO = ≤1.8 V
PTH12030W/L
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.................................................................................................................................................... SLTS211H – MAY 2003 – REVISED DECEMBER 2008
EFFICIENCY OUTPUT RIPPLE POWER DISSIPATIONvs vs vsLOAD CURRENT LOAD CURRENT LOAD CURRENT
Figure 6. Figure 7. Figure 8.
TEMPERATURE DERATING
vsOUTPUT CURRENT
Figure 9.(1) Characteristic data has been developed from actual products tested at 25 ° C. This data is considered typical data for the converter.Applies to Figure 6 ,Figure 7 , and Figure 8 .(2) SOA curves represent the conditions at which internal components are at or below the manufacturer ’ s maximum operatingtemperatures. Derating limits apply to modules soldered directly to a 4 in. × 4 in. double-sided PCB with 1 oz. copper. For surface mountproducts (AS and AZ suffix), multiple vias (plated through holes) are required to add thermal paths around the power pins. Please referto the mechanical specification for more information. Applies to Figure 9 .
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APPLICATION INFORMATION
ADJUSTING THE OUTPUT VOLTAGE
NOTES
Equation 1. Output Voltage Adjust
(1)
PTH12030W/L
SLTS211H – MAY 2003 – REVISED DECEMBER 2008 ....................................................................................................................................................
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The V
O
Adjust control (pin 5) sets the output voltage of the PTH12030W/L. The adjustment range is 1.2V to 5.5Vfor the W-suffix modules, and 0.8V to 1.8V for L-suffix modules. The adjustment method requires the addition ofa single external resistor, R
SET
, that must be connected directly between the V
O
Adjust and GND pins
(1)
.Table 1gives the standard value of the external resistor for a number of standard voltages, along with the actual outputvoltage that this resistance value provides. For other output voltages the required resistor can either becalculated using Equation 1 , or simply selected from the range of values given in Table 3 .Figure 10 shows theplacement of the required resistor.
Table 1. Standard Values of R
SET
for Standard Output Voltages
PTH12030W PTH12030L
V
O
(Required) (V) R
SET
(k Ω) V
O
(Actual) (V) R
SET
(k Ω) V
O
(Actual) (V)
5 0.280 5.009 N/A N/A3.3 2 3.294 N/A N/A2.5 4.32 2.503 N/A N/A2 8.06 2.01 N/A N/A1.8 11.5 1.801 0.130 1.81.5 24.3 1.506 3.57 1.4991.2 Open 1.2 12.1 1.2011.1 N/A N/A 18.7 1.1011 N/A N/A 32.4 0.9990.9 N/A N/A 71.5 0.9010.8 N/A N/A Open 0.8
Figure 10. V
o
Adjust Resistor Placement
1. R
SET
: Use a 0.05 W resistor with a tolerance of 1% and temperature stability of 100 ppm/C (or better).Connect the resistor directly between pins 5 and 7, as close to the regulator as possible, using dedicatedPCB traces.2. Never connect capacitors from V
O
Adjust to either GND or V
O
. Any capacitance added to the V
O
Adjust pinaffects the stability of the regulator.
Use Equation 1 to calculate the adjust resistor value. See Table 2 for parameters, R
S
and V
min
.
Table 2. Adjust Equation Parameters
PARAMETERS PTH12030W PTH12030L
V
(MIN)
1.2 V 0.8 VV
(MAX)
5.5 V 1.8 VR
S
1.82 k Ω7.87 k Ω
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.................................................................................................................................................... SLTS211H – MAY 2003 – REVISED DECEMBER 2008
Table 3. Output Voltage Set-Point Resistor Values
PTH12030W PTH12030L
V
OUT
(V) R
SET
(k Ω) V
OUT
(V) R
SET
(k Ω) V
OUT
(V) R
SET
(k Ω)
1.2 Open 2.7 3.51 0.8 Open1.225 318 2.75 3.34 0.825 3121.25 158 2.8 3.18 0.85 1521.275 105 2.85 3.03 0.875 98.81.3 78.2 2.9 2.89 0.9 72.11.325 62.2 2.95 2.75 0.925 56.11.35 51.5 3 2.62 0.95 45.51.375 43.9 3.05 2.50 0.975 37.81.4 38.2 3.1 2.39 1 32.11.425 33.7 3.15 2.28 1.025 27.71.45 30.2 3.2 2.18 1.05 24.11.475 27.3 3.25 2.08 1.075 21.21.5 24.8 3.3 1.99 1.1 18.81.55 21 3.35 1.9 1.125 16.71.6 18.2 3.4 1.82 1.15 151.65 16 3.5 1.66 1.175 13.51.7 14.2 3.6 1.51 1.2 12.11.75 12.7 3.7 1.38 1.225 111.8 11.5 3.8 1.26 1.25 9.911.85 10.5 3.9 1.14 1.275 8.971.9 9.61 4 1.04 1.3 8.131.95 8.85 4.1 0.939 1.325 7.372 8.18 4.2 0.847 1.35 6.682.05 7.59 4.3 0.761 1.375 6.042.1 7.07 4.4 0.680 1.4 5.462.15 6.6 4.5 0.604 1.425 4.932.2 6.18 4.6 0.533 1.45 4.442.25 5.8 4.7 0.466 1.475 3.982.3 5.45 4.8 0.402 1.5 3.562.35 5.14 4.9 0.342 1.55 2.82.4 4.85 5 0.285 1.6 2.132.45 4.58 5.1 0.231 1.65 1.542.5 4.33 5.2 0.180 1.7 1.022.55 4.11 5.3 0.131 1.75 0.5512.6 3.89 5.4 0.085 1.8 0.1302.65 3.7 5.5 0.041
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CAPACITOR RECOMMENDATIONS FOR THE PTH12030 SERIES OF POWER MODULES
INPUT CAPACITOR
OUTPUT CAPACITORS (OPTIONAL)
CERAMIC CAPACITORS
TANTALUM CAPACITORS
CAPACITOR TABLE
PTH12030W/L
SLTS211H – MAY 2003 – REVISED DECEMBER 2008 ....................................................................................................................................................
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The recommended input capacitor(s) is determined by the 560 µ F minimum capacitance and 500 mArmsminimum ripple current rating.
Ripple current, less than 100 m Ωequivalent series resistance (ESR) and temperature, are the majorconsiderations when selecting input capacitors. Unlike polymer-tantalum capacitors, regular tantalum capacitorsare not recommended for the input bus. These capacitors require a recommended minimum voltage rating of 2 ×(max. dc voltage + ac ripple). When the operating temperature is below 0 ° C, the ESR of aluminum electrolyticcapacitors increases. For these applications, Os-Con, polymer-tantalum, and polymer-aluminum types should beconsidered.
Adding one or two ceramic capacitors to the input further reduces high-frequency reflected ripple current.
For applications with load transients, regulator response benefits from an external output capacitance. Therecommended output capacitance of 330 µ F allows the module to meet its transient response specification. Formost applications, a high quality computer-grade aluminum eletrolytic capacitor is adequate. These capacitorsprovide decoupling over the frequency range, 2 kHz to 150 kHz, and are suitable when ambient temperatures areabove 0 ° C. For operation below 0 ° C, tantalum, ceramic, or Os-Con type capacitors are recommended. Whenusing one or more nonceramic capacitors, the calculated equivalent ESR should be no lower than 4 m Ω(7 m Ωusing the manufacturer ’ s maximum ESR for a single capacitor). A list of preferred low-ESR type capacitors areidentified in Table 4 .
Above 150 kHz, the performance of aluminum electrolytic capacitors is less effective. Multilayer ceramiccapacitors have low ESR and a resonant frequency higher than the bandwidth of the regulator. They can beused to reduce the reflected ripple current at the input as well as improve the transient response of the output.When used on the output their combined ESR is not critical as long as the total value of ceramic capacitancedoes not exceed 300 µ F. Also, to prevent the formation of local resonances, do not place more than five identicalceramic capacitors in parallel with values of 10 µ F or greater.
Tantalum type capacitors can only be used on the output bus, and are recommended for applications where theambient operating temperature can be less than 0 ° C. The AVX TPS, Sprague 593D/594/595, and KemetT495/T510 capacitor series are suggested over other tantalum types due to their higher rated surge, powerdissipation, and ripple current capability. As a caution many general-purpose tantalum capacitors haveconsiderably higher ESR, reduced power dissipation and lower ripple current capability. These capacitors arealso less reliable as they have reduced power dissipation and surge current ratings. Tantalum capacitors thathave no stated ESR or surge current rating are not recommended for power applications.
When specifying Os-con and polymer tantalum capacitors for the output, the minimum ESR limit is encounteredwell before the maximum capacitance value is reached.
Table 4 identifies the characteristics of capacitors from a number of vendors with acceptable ESR and ripplecurrent (rms) ratings. The recommended number of capacitors required at both the input and output buses isidentified for each capacitor type.
This is not an extensive capacitor list. Capacitors from other vendors are available with comparablespecifications. Those listed are for guidance. The RMS ripple current rating and ESR (at 100 kHz) are criticalparameters necessary to insure both optimum regulator performance and long capacitor life.
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.................................................................................................................................................... SLTS211H – MAY 2003 – REVISED DECEMBER 2008
Table 4. Input/Output Capacitors
(1)
CAPACITOR CHARACTERISTICS QUANTITY
WORKING VALUE MAX ESR MAX RIPPLE PHYSICAL INPUT OPTIONAL VENDOR PARTCAPACITOR VENDOR,
VOLTAGE ( µ F) @ 100 CURRENT @ SIZE (mm) BUS OUTPUT NUMBERTYPE/SERIES, (STYLE)
(V) kHz 85 ° C BUS(Ω) (lrms)(mA)
Panasonic 25 330 0.090 1100 10 x 12,5 2 1 EEUFC1E331
FC, Radial 25 560 0.065 1205 12,5 x 15 1 1 EEUFC1E561S
FK, (SMD) 25 470 0.080 1100 10 x 10,2 2 1 EEVFK1E471P
FK, (SMD) 35 680 0.060 1100 12,5 x 13,5 1 1 EEVFK1V681Q
United Chemi-Con
MVZ, Aluminum (SMD) 16 680 0.090 670 10 x 10 1 1 MVZ16VC681MJ10TP
LXZ, Aluminium (Radial)) 25 680 0.068 1050 10 x 16 1 1 LXZ16VB681M10X16LL
PS, Poly-Aluminum 16 330 0.014 5060 10 x 12,5 2 ≤3 16PS330MJ12(Radial)
PXA, Poly-Aluminum 16 330 0.014 5050 10 x 12,2 2 ≤3 PXA16VCMJ12(SMD)
Nichicon, Aluminum 25 560 0.060 1060 12,5 x 15 1 1 UPM1E561MHH6
HD, (Radial) 16 680 0.038 1440 10 x 16 1 1 UHD1C681MHR
PM, (Radial) 35 560 0.048 1360 16 x 15 1 1 UPM1V561MHH6
Panasonic, Poly-Aluminum 6.3 180 0.005 4000 7,3x4,3x4,2 N/R
(2)
1
(3)
EEFSE0J181R (V
O
≤5.1V)SE, (SMD)
Sanyo, TPE Poscap (SMD) 10 330 0.025 3000 7,3x4,3x3,8 N/R
(2)
≤4 10TPE330M
SEQP, Os-Con (Radial) 16 330 0.016 4720 10 x 13 2 ≤3 16SEQP330M
SVP, Os-Con (SMD) 16 330 0.016 4700 10 x 12,6 2 ≤3 16SVP330M
AVX, Tantalum, Series III 10 470 0.045 1723 7,3x5,7x4,1 N/R
(2)
≤5
(3)
TPSE477M010R0045 (V
O
≤5.1V)
TPS (SMD) 10 330 0.045 1723 7,3x5,7x4,1 N/R
(2)
≤5
(3)
TPSE337M010R0045 (V
O
≤5.1V)
Kemet, Poly-Tantalum
T520, (SMD) 10 330 0.040 1800 7,3x4,3x4 N/R
(2)
≤5 T520X337M010AS
T530, (SMD) 10 330 0.010 5000 7,3x4,3x4 N/R
(2)
1 T530X337M010ASE010
6.3 470 0.010 5000 7,3x4,3x4 N/R
(2)
1
(3)
T530X477M006ASE010
(V
O
≤5.1V)
Vishay-Sprague
595D, Tantalum (SMD) 10 470 0.100 1440 7,2x6x4,1 N/R
(2)
≤5
(3)
595D477X0010R2T (V
O
≤5.1V)
94SA, Os-con (Radial) 16 1,000 0.015 9740 16 x 25 1 ≤2 94SA108X0016HBP
94SVP, Os-Con (SMD) 16 330 0.017 4580 10 x12,7 2 ≤2 94SVP337X0016F12
Kemet, Ceramic X5R 16 10 0.002 - 1210 Case 1
(4)
≤5 C1210C106M4PAC
(SMD) 6.3 47 0.002 3225 mm N/R
(2)
≤5 C1210C476K9PAC
Murata, Ceramic X5R 6.3 100 0.002 - 1210 Case N/R
(2)
≤3 GRM32ER60J107M
(SMD) 16 47 3225 mm 1
(4)
≤5 GRM32ER61J476K
16 22 1
(4)
≤5 GRM32ER61C226K
16 10 1
(4)
≤5 GRM32DR61C106K
TDK, Ceramic X5R 6.3 100 0.002 - 1210 Case N/R
(2)
≤3 C3225X5R0J107MT
(SMD) 6.3 47 3225 mm N/R
(2)
≤5 C322X5R0J476MT
16 22 1
(4)
≤5 C3225XR1C226MT
16 10 1
(4)
≤5 C3225X5R1C106MT
(1) Capacitor Supplier VerificationPlease verify availability of capacitors identified in this table. Capacitor suppliers may recommend alternative part numbers because oflimited availability or obsolete products. In some instances, the capacitor product life cycle may be in decline and have short-termconsideration for obsolescence.RoHS, Lead-free and Material DetailsPlease consult capacitor suppliers regarding material composition, RoHS status, lead-free status, and manufacturing processrequirements. Component designators or part number deviations can occur when material composition or soldering requirements areupdated.
(2) N/R – Not recommended. The voltage rating does not meet the minimum operating limits.(3) The voltage rating of this capacitor only allows it to be used for output voltages that are equal to or less than 5.1 V.(4) Small ceramic capacitors may used to complement electrolytic types at the input to further reduce high-frequency ripple current.
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DESIGNING FOR VERY FAST LOAD TRANSIENTS
FEATURES OF THE PTH FAMILY OF NON-ISOLATED WIDE OUTPUT ADJUST POWER
POLA™ COMPATIBILITY
PTH12030W/L
SLTS211H – MAY 2003 – REVISED DECEMBER 2008 ....................................................................................................................................................
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The transient response of the dc/dc converter has been characterized using a load transient with a di/dt of 1A/ µ s.The typical voltage deviation for this load transient is given in the specification table using the optional value ofoutput capacitance. As the di/dt of a transient is increased, the response of a converter ’ s regulation circuitultimately depends on its output capacitor decoupling network. This is an inherent limitation with any dc/dcconverter once the speed of the transient exceeds its bandwidth capability. If the target application specifies ahigher di/dt or lower voltage deviation, the requirement can only be met with additional output capacitordecoupling. In these cases special attention must be paid to the type, value, and ESR of the capacitors selected.If the transient performance requirements exceed that specified in this data sheet, or the total amount of loadcapacitance is above 3,000 µ F, the selection of output capacitors becomes more important.
MODULES
The PTH/PTV family of nonisolated, wide-output adjustable power modules are optimized for applications thatrequire a flexible, high performance module that is small in size. Each of these products are POLA™ compatible.POLA compatible products are produced by a number of manufacturers, and offer customers advanced,nonisolated modules with the same footprint and form factor. POLA parts are also assured to be interoperable,thereby providing customers with a second-source availability.
From the basic, Just Plug it In functionality of the 6-A modules, to the 30-A rated feature-rich PTHxx030, theseproducts were designed to be very flexible, yet simple to use. The features vary with each product. Table 5provides a quick reference to the features by product series and input bus voltage.
Table 5. Operating Features by Series and Input Bus Voltage
Series Input Bus I
O
(A) Adjust On/Off Over- Prebias Auto- Margin Output Thermal(V) (Trim) Inhibit Current Startup Track™ Up/Down Sense Shutdown
3.3 6 • • • • •PTHxx050 5 6 • • • • •12 6 • • • • •3.3 / 5 10 • • • • • • •PTHxx060
12 10 • • • • • • •3.3 / 5 15 • • • • • • •PTHxx010
12 12 • • • • • • •5 8 • • • • • •PTVxx010
12 8 • • • • • • •3.3 / 5 22 • • • • • • • •PTHxx020
12 18 • • • • • • • •5 18 • • • • • • •PTHxx020
12 16 • • • • • • •3.3 / 5 30 • • • • • • • •PTHxx030
12 26 • • • • • • • •
For simple point-of-use applications, the PTH12050 (6 A) provides operating features such as an on/off inhibit,output voltage trim, prebias start-up and overcurrent protection. The PTH12060 (10 A), and PTH12010 (12 A)include an output voltage sense, and margin up/down controls. Then the higher output current, PTH12020 (18 A)and PTH12030 (26 A) products incorporate overtemperature shutdown protection.
The PTV12010 and PTV12020 are similar parts offered in a vertical, single in-line pin (SIP) profile, at slightlylower current ratings.
All of the products referenced in Table 5 include Auto-Track™. This feature was specifically designed to simplifythe task of sequencing the supply voltages in a power system. This and other features are described in thefollowing sections.
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SOFT-START POWER UP
12V
C
1000 F
I
m
+
C
330 F
O
m
+
GND GND
3.3V
R
2k
0.1W
1%
SET
W
PTH12020W
7
10
4
5
62
3
9
Track
VIVO
GNDInhibit
1
Up Dn
Adjust
8
Sense
VI (5 V/div)
t − Time − 5 ms/div
VO (1 V/div)
II (5 V/div)
OVERCURRENT PROTECTION
OVERTEMPERATURE PROTECTION (OTP)
PTH12030W/L
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.................................................................................................................................................... SLTS211H – MAY 2003 – REVISED DECEMBER 2008
The Auto-Track feature allows the power-up of multiple PTH modules to be directly controlled from the Track pin.However, in a stand-alone configuration, or when the Auto-Track feature is not being used, the Track pin shouldbe directly connected to the input voltage, V
I
, see Figure 11 .
When the Track pin is connected to the input voltage the Auto-Track function is permanently disengaged. Thisallows the module to power up entirely under the control of its internal soft-start circuitry. When power up isunder soft-start control, the output voltage rises to the set-point at a quicker and more linear rate.
Figure 11. Power-Up Application Circuit Figure 12. Power-Up Waveforms
From the moment a valid input voltage is applied, the soft-start control introduces a short time delay (typically8 ms-15 ms) before allowing the output voltage to rise. The output then progressively rises to the module ’ ssetpoint voltage. Figure 12 shows the soft-start power-up characteristic of the 18-A output product(PTH12020W), operating from a 12-V input bus and configured for a 3.3-V output. The waveforms weremeasured with a 5-A resistive load and the Auto-Track feature disabled. The initial rise in input current when theinput voltage first starts to rise is the charge current drawn by the input capacitors. Power-up is complete within25 ms.
For protection against load faults, all modules incorporate output overcurrent protection. Applying a load thatexceeds the regulator ’ s overcurrent threshold causes the regulated output to shut down. Following shutdown amodule periodically attempts to recover by initiating a soft-start power-up. This is described as a hiccup mode ofoperation, whereby the module continues in a cycle of successive shutdown and power up until the load fault isremoved. During this period, the average current flowing into the fault is significantly reduced. Once the fault isremoved, the module automatically recovers and returns to normal operation.
The PTH12020W and PTH12030W products have overtemperature protection. These products have an on-boardtemperature sensor that protects the module ’ s internal circuitry against excessively high temperatures. A rise inthe internal temperature may be the result of a drop in airflow, or a high ambient temperature. If the internaltemperature exceeds the OTP threshold, the module ’ s Inhibit control is internally pulled low. This turns the outputoff. The output voltage drops as the external output capacitors are discharged by the load circuit. The recovery isautomatic, and begins with a soft-start power up. It occurs when the the sensed temperature decreases by about10 ° C below the trip point.Note: The overtemperature protection is a last resort mechanism to prevent thermal stress to the regulator.Operation at or close to the thermal shutdown temperature is not recommended and reduces the long-termreliability of the module. Always operate the regulator within the specified safe operating area (SOA) limits forthe worst-case conditions of ambient temperature and airflow.
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OUTPUT ON/OFF INHIBIT
PTH12060W
VIVO
VOSense
1
10
4
5
62
3
+
C
330 F
O
m
C
560 F
I
m
+
1=Inhibit
GND
9 8
Q1
BSS138
R
2k
0.1W
1%
SET
W
7
GND
L
O
A
D
VO (2 V/div)
Q1VDS (5 V/div)
II (2 V/div)
t − Time − 10 ms/div
REMOTE SENSE
PTH12030W/L
SLTS211H – MAY 2003 – REVISED DECEMBER 2008 ....................................................................................................................................................
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For applications requiring output voltage on/off control, each series of the PTH family incorporates an outputInhibit control pin. The inhibit feature can be used wherever there is a requirement for the output voltage from theregulator to be turned off.
The power modules function normally when the Inhibit pin is left open-circuit, providing a regulated outputwhenever a valid source voltage is connected to V
I
with respect to GND.
Figure 13 shows the typical application of the inhibit function. Note the discrete transistor (Q1). The Inhibit inputhas its own internal pull-up to a potential of 5 V to 13.2 V (see footnotes to specification table). The input is notcompatible with TTL logic devices. An open-collector (or open-drain) discrete transistor is recommended forcontrol.
Figure 13. Inhibit Control Circuit Figure 14. Power-Up from Inhibit Control
Turning Q1 on applies a low voltage to the Inhibit control pin and disables the output of the module. If Q1 is thenturned off, the module executes a soft-start power-up sequence. A regulated output voltage is produced within 25ms Figure 14 shows the typical rise in both the output voltage and input current, following the turn-off of Q1. Theturn off of Q1 corresponds to the rise in the waveform, Q1 V
ds
. The waveforms were measured with a 5-Aconstant current load.
Products with this feature incorporate an output voltage sense pin, V
O
Sense. A remote sense improves the loadregulation performance of the module by allowing it to compensate for any IR voltage drop between its outputand the load. An IR drop is caused by the high output current flowing through the small amount of pin and traceresistance.
To use this feature simply connect the V
O
Sense pin to the V
O
node, close to the load circuit (see standardapplication circuit). If a sense pin is left open-circuit, an internal low-value resistor (15- Ωor less) connectedbetween the pin and and the output node, ensures the output remains in regulation.
With the sense pin connected, the difference between the voltage measured directly between the V
O
and GNDpins, and that measured from V
O
Sense to GND, is the amount of IR drop being compensated by the regulator.This should be limited to a maximum of 0.3 V.Note: The remote sense feature is not designed to compensate for the forward drop of nonlinear orfrequency dependent components that may be placed in series with the converter output. Examples includeOR-ing diodes, filter inductors, ferrite beads, and fuses. When these components are enclosed by the remotesense connection, they are effectively placed inside the regulation control loop, which can adversely affectthe stability of the regulator.
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Auto-Track™ Function
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.................................................................................................................................................... SLTS211H – MAY 2003 – REVISED DECEMBER 2008
The Auto-Track function is unique to the PTH/PTV family, and is available with all POLA products. Auto-Trackwas designed to simplify the amount of circuitry required to make the output voltage from each module power upand power down in sequence. The sequencing of two or more supply voltages during power up is a commonrequirement for complex mixed-signal applications that use dual-voltage VLSI ICs such as the TMS320™ DSPfamily, microprocessors, and ASICs.
How Auto-Track™ Works
Auto-Track works by forcing the module output voltage to follow a voltage presented at the Track control pin
(1)
.This control range is limited to between 0 V and the module set-point voltage. Once the track-pin voltage israised above the set-point voltage, the module output remains at its set-point
(2)
. As an example, if the Track pinof a 2.5-V regulator is at 1 V, the regulated output is 1 V. If the voltage at the Track pin rises to 3 V, the regulatedoutput does not go higher than 2.5 V.
When under Auto-Track control, the regulated output from the module follows the voltage at its Track pin on avolt-for-volt basis. By connecting the Track pin of a number of these modules together, the output voltages followa common signal during power up and power down. The control signal can be an externally generated masterramp waveform, or the output voltage from another power supply circuit
(3)
. For convenience, the Track inputincorporates an internal RC-charge circuit. This operates off the module input voltage to produce a suitable risingwaveform at power up.
Typical Application
The basic implementation of Auto-Track allows for simultaneous voltage sequencing of a number of Auto-Trackcompliant modules. Connecting the Track inputs of two or more modules forces their track input to follow thesame collective RC-ramp waveform, and allows their power-up sequence to be coordinated from a commonTrack control signal. This can be an open-collector (or open-drain) device, such as a power-up reset voltagesupervisor IC. See U3 in Figure 15 .
To coordinate a power-up sequence, the Track control must first be pulled to ground potential. This should bedone at or before input power is applied to the modules. The ground signal should be maintained for at least40 ms after input power has been applied. This brief period gives the modules time to complete their internalsoft-start initialization
(4)
, enabling them to produce an output voltage. A low-cost supply voltage supervisor IC,that includes a built-in time delay, is an ideal component for automatically controlling the Track inputs at powerup.
Figure 15 shows how the TL7712A supply voltage supervisor IC (U3) can be used to coordinate the sequencedpower up of two 12-V input Auto-Track modules. The output of the TL7712A supervisor becomes active abovean input voltage of 3.6 V, enabling it to assert a ground signal to the common track control well before the inputvoltage has reached the module's undervoltage lockout threshold. The ground signal is maintained untilapproximately 43 ms after the input voltage has risen above U3's voltage threshold, which is 10.95 V. The 43-mstime period is controlled by the capacitor C3. The value of 3.3 µF provides sufficient time delay for the modulesto complete their internal soft-start initialization. The output voltage of each module remains at zero until the trackcontrol voltage is allowed to rise. When U3 removes the ground signal, the track control voltage automaticallyrises. This causes the output voltage of each module to rise simultaneously with the other modules, until eachreaches its respective set-point voltage.
Figure 17 shows the output voltage waveforms from the circuit of Figure 15 after input voltage is applied to thecircuit. The waveforms, V
O
1 and V
O
2, represent the output voltages from the two power modules, U1 (3.3 V) andU2 (1.8 V), respectively. V
TRK
, V
O
1, and V
O
2 are shown rising together to produce the desired simultaneouspower-up characteristic.
The same circuit also provides a power-down sequence. When the input voltage falls below U3's voltagethreshold, the ground signal is re-applied to the common track control. This pulls the track inputs to zero volts,forcing the output of each module to follow, as shown in Figure 17 . In order for a simultaneous power-down tooccur, the track inputs must be pulled low before the input voltage has fallen below the modules' undervoltagelockout. This is an important constraint. Once the modules recognize that a valid input voltage is no longerpresent, their outputs can no longer follow the voltage applied at their track input. During a power-downsequence, the fall in the output voltage from the modules is limited by the maximum output capacitance and theAuto-Track slew rate.
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N = Number of Track pins connected together
10 kΩ
# RTRK = 100 Ω / N
VI = 12 V Vo1 = 3.3 V
RSET1
CO1
+
C
+
PTH12050W
5
63
4
2
Track
VIVO
GND
Inhibit 1Adjust
TL7712A
VCC
GND
SENSE
RESIN
REF
CT
RESET
RESET
8
7
2
1
3
5
6
4
CT
CREF RRST
Vo2 = 1.8 V
CO2
+
C
+
PTH12060W
7
10
4
5
62
3
9 8
Track
VIVO
GNDInhibit 1
Up Dn Sense
Adjust
SET2
U1
U2
U3
RTRK #
2.0 kΩ
11.5 kΩ
I2
0.1 µF3.3 µF
50 Ω
I1
R
t − Time − 20 ms/div
VTRK (1 V/div)
V01 (1 V/div)
V02 (1 V/div)
t − Time − 400 µs/div
VTRK (1 V/div)
V01 (1 V/div)
V02 (1 V/div)
PTH12030W/L
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Figure 15. Sequenced Power Up and Power Down Using Auto-Track
Figure 16. Simultaneous Power Up Figure 17. Simultaneous Power Downwith Auto-Track Control with Auto-Track Control
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PREBIAS STARTUP CAPABILITY
VI (5 V/div)
t − Time − 5 ms/div
Startup
Period
UVLO Threshold
VO (1 V/div)
PTH12030W/L
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.................................................................................................................................................... SLTS211H – MAY 2003 – REVISED DECEMBER 2008
Notes on Use of Auto-Track
TM
1. The Track pin voltage must be allowed to rise above the module set-point voltage before the moduleregulates at its adjusted set-point voltage.2. The Auto-Track function tracks almost any voltage ramp during power up, and is compatible with rampspeeds of up to 1 V/ms.3. The absolute maximum voltage that may be applied to the Track pin is the input voltage V
I
.4. The module cannot follow a voltage at its track control input until it has completed its soft-start initialization.This takes about 40 ms from the time that a valid voltage has been applied to its input. During this period, itis recommended that the Track pin be held at ground potential.5. The Auto-Track function is disabled by connecting the Track pin to the input voltage (V
I
). When Auto-Track isdisabled, the output voltage rises at a quicker and more linear rate after input power has been applied.
The capability to start up into an output prebias condition is now available to all the 12-V input, PTH series ofpower modules. (Note that this is a feature enhancement for the many of the W-suffix products).
[1]
A prebias startup condition occurs as a result of an external voltage being present at the output of a powermodule prior to its output becoming active. This often occurs in complex digital systems when current fromanother power source is backfed through a dual-supply logic component, such as an FPGA or ASIC. Anotherpath might be via clamp diodes, sometimes used as part of a dual-supply power-up sequencing arrangement. Aprebias can cause problems with power modules that incorporate synchronous rectifiers. This is because undermost operating conditions, such modules can sink as well as source output current. The 12-V input PTH modulesall incorporate synchronous rectifiers, but will not sink current during startup, or whenever the Inhibit pin is heldlow. Startup includes an initial delay (approximately 8 ms – 15 ms), followed by the rise of the output voltageunder the control of the module ’ s internal soft-start mechanism; see Figure 18 .
Figure 18. Startup Waveforms
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t − Time − 10 ms/div
VO1 (1 V/div)
VO2 (1 V/div)
IO2 (5 V/div)
PTH12030W/L
SLTS211H – MAY 2003 – REVISED DECEMBER 2008 ....................................................................................................................................................
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CONDITIONS FOR PREBIAS HOLDOFF
In order for the module to allow an output prebias voltage to exist (and not sink current), certain conditions mustbe maintained. The module holds off a prebias voltage when the Inhibit pin is held low, and whenver the output isallowed to rise under soft-start control. Power up under soft-start control occurs upon the removal of the groundsignal to the Inhibit pin (with input voltage applied), or when input power is applied with Auto-Track disabled.
[2]
Tofurther ensure that the regulator doesn ’ t sink output current, (even with a ground signal applied to its Inhibit), theinput voltage must always be greater than the applied prebias source. This condition must exist throughout thepower-up sequence.
[3]
The soft-start period is complete when the output begins rising above the prebias voltage. Once it is complete,the module functions as normal, and sinks current if voltage higher than the nominal regulation value is appliedto its output.
Note: If a prebias condition is not present, the soft-start period is complete when the output voltage has risento either the set-point voltage, or the voltage applied at the module ’ s Track control pin, whichever is lowest.
DEMONSTRATION CIRCUIT
Figure 19 shows the startup waveforms for the demonstration circuit shown in Figure 20 . The initial rise in V
O
2 isthe prebias voltage, which is passed from the VCCIO to the VCORE voltage rail through the ASIC. Note that theoutput current from the PTH12010L module (I
O
2) is negligible until its output voltage rises above the appliedprebias.
Figure 19. Prebias Startup Waveforms
NOTES
1. Output prebias holdoff is an inherent feature to all PTH120x0L and PTV120x0W/L modules. It has now beenincorporated into all modules (including W-suffix modules with part numbers of the form PTH120x0W), with aproduction lot date code of 0423 or later.2. The prebias start-up feature is not compatible with Auto-Track. If the rise in the output is limited by thevoltage applied to the Track control pin, the output sinks current during the period that the track controlvoltage is below that of the back-feeding source. For this reason, it is recommended that Auto-Track bedisabled when not being used. This is accomplished by connecting the Track pin to the input voltage, V
I
. Thisraises the Track pin voltage well above the set-point voltage prior to the module ’ s start up, thereby defeatingthe Auto-Track feature.3. To further ensure that the regulator ’ s output does not sink current when power is first applied (even with aground signal applied to the Inhibit control pin), the input voltage must always be greater than the appliedprebias source. This condition must exist throughout the power-up sequence of the power system.
18 Submit Documentation Feedback Copyright © 2003 – 2008, Texas Instruments Incorporated
Product Folder Link(s): PTH12030W/L
Up Dn Sense
V =12V
IV 1=3.3V
O
V 2=1.8V
O
I 2
O
ASIC
VCORE VC CI O
PTH12010L
1
10
4
62
3
9
GND
Inhibit
7
Vadj
+
R1
2kW
R2
130 W
C2
330 Fm
C4
330 Fm
C6
0.68 Fm
C5
0.1 Fm
C3
330 Fm
C1
330 Fm
+
+
PTH12020W
7
10
4
5
62
3
9
Tra ck
VI
VI
VO
VO
GNDInhibit
1
Adjust
+
TL7702B
VCC
GND
SENSE
RESIN
REF
CT
RESET
RESET
8
7
2
1
3
5
6
4
+
R5
10k0
R4
100kW
R3
11k0
8
8
Sense
Track
5
MARGIN UP/DOWN CONTROLS
D%
R orR =
UD
499 -99.8kW
(2)
PTH12030W/L
www.ti.com
.................................................................................................................................................... SLTS211H – MAY 2003 – REVISED DECEMBER 2008
Figure 20. Application Circuit Demonstrating Prebias Startup
The PTH12060, PTH12010, PTH12020, and PTH12030 products incorporate Margin Up and Margin Downcontrol inputs. These controls allow the output voltage to be momentarily adjusted
[1]
, either up or down, by anominal 5%. This provides a convenient method for dynamically testing the operation of the load circuit over itssupply margin or range. It can also be used to verify the function of supply voltage supervisors. The ± 5% changeis applied to the adjusted output voltage, as set by the external resistor, R
SET
at the V
O
Adjust pin.
The 5% adjustment is made by pulling the appropriate margin control input directly to the GND terminal.
[2]
Alow-leakage open-drain device, such as an n-channel MOSFET or p-channel JFET is recommended for thispurpose.
[3]
Adjustments of less than 5% can also be accommodated by adding series resistors to the controlinputs. The value of the resistor can be selected from Table 6 , or calculated using the following formula.
MARGIN UP/DOWN ADJUST RESISTANCE CALCULATION
To reduce the margin adjustment to a value less than 5%, series resistors are required (See R
D
and R
U
inFigure 21 ). For the same amount of adjustment, the resistor value calculated for R
U
and R
D
is the same. Theformula is as follows.
Where Δ% = The desired amount of margin adjust in percent.
Copyright © 2003 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Link(s): PTH12030W/L
CO
+
CI
VI
GND
MarginDown
L
O
A
D
Q2
+VO
Q1
+
MarginUp
0V
+VO
RDRU
PT H12010W
( T opView)
1
2
10 9 8 7
6
54
3
GND
R
0.1W,1%
SET
PTH12030W/L
SLTS211H – MAY 2003 – REVISED DECEMBER 2008 ....................................................................................................................................................
www.ti.com
Table 6. Margin Up/Down Resistor Values
% ADJUST R
U
/ R
D
(k Ω)
5 0 k4 24.93 66.52 1501 397
Figure 21. Margin Up/Down Application Schematic
MARGIN UP/DOWN NOTES1. The Margin Up and Margin Down controls were not intended to be activated simultaneously. If they are theiraffects on the output voltage may not completely cancel, resulting in the possibility of a slightly higher error inthe output voltage set point.2. The ground reference should be a direct connection to the module GND at pin 7 (pin 1 for the PTHxx050).This will produce a more accurate adjustment at the load circuit terminals. The transistors Q1 and Q2 shouldbe located close to the regulator.3. The Margin Up and Margin Down control inputs are not compatible with devices that source voltage. Thisincludes TTL logic. These are analog inputs and should only be controlled with a true open-drain device(preferably discrete MOSFET transistor). The device selected should have low off-state leakage current.Each input sources 8 µ A when grounded, and has an open-circuit voltage of 0.8 V.
20 Submit Documentation Feedback Copyright © 2003 – 2008, Texas Instruments Incorporated
Product Folder Link(s): PTH12030W/L
TAPE AND REEL SPECIFICATIONS
TRAY SPECIFICATIONS
PTH12030W/L
www.ti.com
.................................................................................................................................................... SLTS211H – MAY 2003 – REVISED DECEMBER 2008
Copyright © 2003 – 2008, Texas Instruments Incorporated Submit Documentation Feedback 21
Product Folder Link(s): PTH12030W/L
PACKAGE OPTION ADDENDUM
www.ti.com 13-Nov-2010
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
PTH12030LAH ACTIVE Through-
Hole Module EUM 13 16 Pb-Free (RoHS) SN N / A for Pkg Type Request Free Samples
PTH12030LAS ACTIVE Surface
Mount Module EUN 13 16 TBD SNPB Level-1-235C-UNLIM/
Level-3-260C-168HRS Request Free Samples
PTH12030LAST ACTIVE Surface
Mount Module EUN 13 200 TBD SNPB Level-1-235C-UNLIM/
Level-3-260C-168HRS Purchase Samples
PTH12030LAZ ACTIVE Surface
Mount Module EUN 13 16 Pb-Free (RoHS) SNAGCU Level-3-260C-168 HR Request Free Samples
PTH12030LAZT ACTIVE Surface
Mount Module EUN 13 200 Pb-Free (RoHS) SNAGCU Level-3-260C-168 HR Purchase Samples
PTH12030WAD ACTIVE Through-
Hole Module EUM 13 16 Pb-Free (RoHS) SN N / A for Pkg Type Purchase Samples
PTH12030WAH ACTIVE Through-
Hole Module EUM 13 16 Pb-Free (RoHS) SN N / A for Pkg Type Request Free Samples
PTH12030WAS ACTIVE Surface
Mount Module EUN 13 16 TBD SNPB Level-1-235C-UNLIM/
Level-3-260C-168HRS Request Free Samples
PTH12030WAST ACTIVE Surface
Mount Module EUN 13 200 TBD SNPB Level-1-235C-UNLIM/
Level-3-260C-168HRS Purchase Samples
PTH12030WAZ ACTIVE Surface
Mount Module EUN 13 16 Pb-Free (RoHS) SNAGCU Level-3-260C-168 HR Request Free Samples
PTH12030WAZT ACTIVE Surface
Mount Module EUN 13 200 Pb-Free (RoHS) SNAGCU Level-3-260C-168 HR Purchase Samples
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
PACKAGE OPTION ADDENDUM
www.ti.com 13-Nov-2010
Addendum-Page 2
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
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