〇Product structure : Silicon integrated circuit 〇This product has no designed protection against radioactive rays.
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TSZ02201-0F3F0AJ00250-1-2
© 2019 ROHM Co., Ltd. All rights reserved.
08.Mar.2019 Rev.001
TSZ22111 • 14 • 001
www.rohm.com
2.7 V to 5.5 V Input, 3.0 A Integrated MOSFET
Single Synchronous Buck DC/DC Converter
BD9B305QUZ
General Description
BD9B305QUZ is a synchronous buck DC/DC converter
with built-in low on-resistance power MOSFETs. It is
capable of providing current up to 3 A. It features fast
transient response due to constant on-time control
system. The Light Load Mode control improves efficiency
in light-load conditions. It is ideal for reducing standby
power consumption of equipment. Power Good function
makes it possible for system to control sequence. It
achieves the high power density and offer a small
footprint on the PCB by employing small package.
Features
Single Synchronous Buck DC/DC Converter
Constant On-time Control
Light Load Mode Control
Adjustable Soft Start
Power Good Output
Output Capacitor Discharge Function
Over Voltage Protection (OVP)
Over Current Protection (OCP)
Short Circuit Protection (SCP)
Thermal Shutdown Protection (TSD)
Under Voltage Lockout Protection (UVLO)
VMMP08LZ2020 Package
Backside Heat Dissipation
0.5 mm Pitch
Applications
Step-down Power Supply for SoC, FPGA,
Microprocessor
Laptop PC / Tablet PC / Server
LCD TV
Storage Device (HDD / SSD)
Printer, OA Equipment
Distributed Power Supply, Secondary Power Supply
Key Specifications
Input Voltage Range: 2.7 V to 5.5 V
Output Voltage Range: 0.6 V to VIN x 0.8 V
Output Current: 3.0 A (Max)
Switching Frequency: 1 MHz (Typ)
High-Side FET ON Resistance: 50 mΩ (Typ)
Low-Side FET ON Resistance: 40 mΩ (Typ)
Shutdown Current: 0 μA (Typ)
Package W (Typ) x D (Typ) x H (Max)
VMMP08LZ2020 2.00 mm x 2.00 mm x 0.40 mm
Typical Application Circuit
VMMP08LZ2020
EN
VIN
BOOT
SS
BD9B305QUZ
SW
FB
VIN
VOUT
GND
CIN
R2
R1
0.1 µF
COUT
CFB
PGD
VEN
L1
Datashee
t
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TSZ02201-0F3F0AJ00250-1-2
© 2019 ROHM Co., Ltd. All rights reserved.
08.Mar.2019 Rev.001
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TSZ22111 • 15 • 001
BD9B305QUZ
Pin Configuration
(TOP VIEW)
Pin Descriptions
Pin No.
Pin Name
Function
1
BOOT
Pin for bootstrap. Connect a bootstrap capacitor of 0.1 µF between this pin and the SW pin.
The voltage of this pin is the gate drive voltage of the High-Side FET.
2
SW
Switch pin. This pin is connected to the source of the High-Side FET and the drain of the
Low-Side FET. Connect a bootstrap capacitor of 0.1 µF between this pin and the BOOT pin.
In addition, connect an inductor considering the direct current superimposition characteristic.
3
PGD
Power Good pin. This pin is an open drain output that requires a pull-up resistor. See page
17 for setting the resistance. If not used, this pin can be left floating or connected to the
ground.
4
FB
Output voltage feedback pin. See page 31 for how to calculate the resistances of the output
voltage setting.
5
SS
Pin for setting the soft start time of output voltage. The soft start time is 1 ms (Typ) when the
SS pin is left floating. A ceramic capacitor connected to the SS pin makes the soft start time
more than 1 ms. See page 31 for how to calculate the capacitance.
6
EN
Enable pin. The device starts up with setting VEN to 0.920 V (Typ) or more. The device enters
the shutdown mode with setting VEN to 0.875 V (Typ) or less. This pin must be terminated.
7
VIN
Power supply pin. Connecting 0.1 µF (Typ) and 22 µF (Typ) ceramic capacitors is
recommended. The detail of a selection is described in page 31.
8
GND
Ground pin.
-
EXP-PAD
A backside heat dissipation exposed pad. Connecting to the PCB power ground plane by
using thermal vias provides excellent heat dissipation characteristics. See page 34 to 35 for
the detailed PCB layout design.
BOOT
SW
PGD
FB
GND
VIN
EN
SS
1
2
3
4
8
7
6
5
EXP-PAD
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TSZ02201-0F3F0AJ00250-1-2
© 2019 ROHM Co., Ltd. All rights reserved.
08.Mar.2019 Rev.001
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TSZ22111 • 15 • 001
BD9B305QUZ
Description of Blocks
1. VREF
The VREF block generates the internal reference voltage.
2. Soft Start
The Soft Start circuit slows down the rise of output voltage during start-up and controls the current, which allows the
prevention of output voltage overshoot and inrush current. The internal soft start time is 1 ms (Typ) when the SS pin is
left floating. A capacitor connected to the SS pin makes the rising time more than 1 ms.
3. Error Amplifier
The Error Amplifier adjusts the Main Comparator input voltage to make the internal reference voltage equal to FB
voltage.
4. Main Comparator
The Main Comparator compares the Error Amplifier output voltage and FB voltage (VFB). When VFB becomes lower than
the Error Amplifier output voltage, the output turns high and reports to the On Time block that the output voltage has
dropped below the control voltage.
5. On Time
This block generates On Time. The designed On Time is generated after the Main Comparator output turns high. The
On Time is adjusted to control the frequency to be fixed even with I/O voltage is changed.
6. PGOOD
The PGOOD block is for power good function. When the output voltage reaches within ±10 % (Typ) of the setting
voltage, the built-in open drain Nch MOSFET connected to the PGD pin is turned off and the PGD pin becomes Hi-Z
(High impedance). When the output voltage reaches outside ±15 % (Typ) of the setting voltage, the open drain Nch
MOSFET is turned on and PGD pin is pulled down with 100 Ω (Typ).
7. UVLO
The UVLO block is for under voltage lockout protection. The device is shut down when input voltage (VIN) falls to 2.45 V
(Typ) or less. The threshold voltage has the 100 mV (Typ) hysteresis.
8. TSD
The TSD block is for thermal protection. The device is shut down when the junction temperature Tj reaches to 175 °C
(Typ) or more. The device is automatically restored to normal operation with a hysteresis of 25 °C (Typ) when the Tj
goes down.
9. OVP
The OVP block is for output over voltage protection. When the FB voltage (VFB) exceeds 115 % (Typ) or more of FB
threshold voltage VFBTH, the output MOSFETs are turned off. After VFB falls 110 % (Typ) or less of VFBTH, the output
MOSFETs are returned to normal operation condition.
10. OCP
The OCP block is for over current protection. This function operates by limiting the current that flows through the
High-Side FET and the Low-Side FET at each cycle of the switching frequency.
11. SCP
The SCP is for short circuit protection. When 256 times OCP are counted on the condition where the device completes
the soft start and the output voltage falls below 85 % (Typ) of the setting voltage, the device is shut down for 128 ms
(Typ). After 128 ms shutdown, the device restarts. (HICCUP operation)
12. ZXCMP
The ZXCMP is a comparator that monitors the inductor current. When inductor current falls below 0A (Typ) while the
Low-Side FET is on, it turns the FET off.
13. Control Logic
The Control Logic controls the switching operation and protection function operation.
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© 2019 ROHM Co., Ltd. All rights reserved.
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TSZ22111 • 15 • 001
BD9B305QUZ
Absolute Maximum Ratings (Ta = 25 °C)
Parameter
Symbol
Rating
Unit
Input Voltage
VIN
-0.3 to +7
V
EN Voltage
VEN
-0.3 to +VIN
V
FB Voltage
VFB
-0.3 to +7
V
SS Voltage
VSS
-0.3 to +VIN
V
PGD Voltage
VPGD
-0.3 to +7
V
SW Voltage
VSW
-0.3 to VIN + 0.3
V
Voltage from GND to BOOT
VBOOT
-0.3 to +14
V
Voltage from SW to BOOT
ΔVBOOT-SW
-0.3 to +7
V
Output Current
IOUT
3.5
A
Maximum Junction Temperature
Tjmax
150
°C
Storage Temperature Range
Tstg
-55 to +150
°C
Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is
operated over the absolute maximum ratings.
Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the
properties of the chip. In case of exceeding this absolute maximum rating, design a PCB with thermal resistance taken into consideration by
increasing board size and copper area so as not to exceed the maximum junction temperature rating.
Thermal Resistance (Note 1)
Parameter
Symbol
Thermal Resistance (Typ)
Unit
1s (Note 3)
2s2p (Note 4)
VMMP08LZ2020
Junction to Ambient
θJA
208.30
90.30
°C/W
Junction to Top Characterization Parameter (Note 2)
ΨJT
28.00
22.00
°C/W
(Note 1) Based on JESD51-2A (Still-Air).
(Note 2) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside
surface of the component package.
(Note 3) Using a PCB board based on JESD51-3.
(Note 4) Using a PCB board based on JESD51-5, 7.
Layer Number of
Measurement Board
Material
Board Size
Single
FR-4
114.3 mm x 76.2 mm x 1.57 mmt
Top
Copper Pattern
Thickness
Footprints and Traces
70 μm
Layer Number of
Measurement Board
Material
Board Size
Thermal Via (Note 5)
Pitch
Diameter
4 Layers
FR-4
114.3 mm x 76.2 mm x 1.6 mmt
1.20 mm
Φ0.30 mm
Top
2 Internal Layers
Bottom
Copper Pattern
Thickness
Copper Pattern
Thickness
Copper Pattern
Thickness
Footprints and Traces
70 μm
74.2 mm x 74.2 mm
35 μm
74.2 mm x 74.2 mm
70 μm
(Note 5) This thermal via connects with the copper pattern of all layers.
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TSZ02201-0F3F0AJ00250-1-2
© 2019 ROHM Co., Ltd. All rights reserved.
08.Mar.2019 Rev.001
www.rohm.com
TSZ22111 • 15 • 001
BD9B305QUZ
Recommended Operating Conditions
Parameter
Symbol
Min
Typ
Max
Unit
Input Voltage
VIN
2.7
-
5.5
V
Operating Temperature (Note 1)
Ta
-40
-
+85
°C
Output Current (Note 1)
IOUT
0
-
3.0
A
Output Voltage Setting
VOUT
0.6
-
VIN x 0.8
V
(Note 1) Tj must be lower than 150 °C under the actual operating environment.
Electrical Characteristics (Unless otherwise specified Ta = 25 °C, VIN = 5 V, VEN = 5 V)
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
Input Supply
Shutdown Current
ISDN
-
0
10
µA
VEN = 0 V
Quiescent Current at No Load
IQ
-
15
30
µA
IOUT = 0 A,
No switching
UVLO Detection Threshold Voltage
VUVLO1
2.350
2.450
2.550
V
VIN falling
UVLO Release Threshold Voltage
VUVLO2
2.425
2.550
2.700
V
VIN rising
UVLO Hysteresis Voltage
VUVLOHYS
50
100
200
mV
Enable
EN Threshold Voltage High
VENH
0.875
0.920
0.965
V
VEN rising
EN Threshold Voltage Low
VENL
0.830
0.875
0.920
V
VEN falling
EN Hysteresis Voltage
VENHYS
27
45
63
mV
EN Input Current
IEN
-
0
10
µA
VEN = 5 V
Reference Voltage, Error Amplifier, Soft Start
FB Threshold Voltage
VFBTH
0.591
0.600
0.609
V
PWM mode
FB Input Current
IFB
-
-
100
nA
VFB = 0.6 V
Soft Start Time
tSS
0.6
1.0
1.4
ms
SS pin is left floating.
Soft Start Charge Current
ISS
0.6
1.0
1.4
µA
On Time
On Time
tON
270
360
450
ns
VOUT = 1.8 V, PWM mode
SW (MOSFET)
High-Side FET ON Resistance
RONH
-
50
100
mΩ
VBOOT - VSW = 5 V
Low-Side FET ON Resistance
RONL
-
40
80
mΩ
High-Side FET Leakage Current
ILKH
-
0
10
µA
No switching
Low-Side FET Leakage Current
ILKL
-
0
10
µA
No switching
Power Good
Power Good Rising
Threshold Voltage
VPGDGR
85
90
95
%
VFB rising,
VPGDGR = VFB / VFBTH x 100
Power Good Falling
Threshold Voltage
VPGDGF
105
110
115
%
VFB falling,
VPGDGF = VFB / VFBTH x 100
Power Fault Rising
Threshold Voltage
VPGDFR
110
115
120
%
VFB rising,
VPGDFR = VFB / VFBTH x 100
Power Fault Falling
Threshold Voltage
VPGDFF
80
85
90
%
VFB falling,
VPGDFF = VFB / VFBTH x 100
PGD Output Leakage Current
ILKPGD
-
0
5
µA
VPGD = 5 V
PGD MOSFET ON Resistance
RPGD
-
100
200
Ω
PGD Output Low Level Voltage
VPGDL
-
0.1
0.2
V
IPGD = 1 mA
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TSZ02201-0F3F0AJ00250-1-2
© 2019 ROHM Co., Ltd. All rights reserved.
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TSZ22111 • 15 • 001
BD9B305QUZ
Typical Performance Curves
Figure 1. Shutdown Current vs Temperature
Figure 2. Quiescent Current at No Load vs Temperature
Figure 3. UVLO Threshold Voltage vs Temperature
Figure 4. EN Threshold Voltage vs Temperature
0
2
4
6
8
10
-40 -20 0 20 40 60 80
Shutdown Current : ISDN [μA]
Temperature : Ta [°C]
= 5.0 V
= 3.3 V
VIN
VIN
0
5
10
15
20
25
30
-40 -20 0 20 40 60 80
Quiescent Current at No Load : IQ[μA]
Temperature : Ta [°C]
= 5.0 V
= 3.3 V
VIN
VIN
2.35
2.40
2.45
2.50
2.55
2.60
2.65
2.70
-40 -20 0 20 40 60 80
UVLO Threshold Voltage : VUVLO1, VUVLO2 [V]
Temperature : Ta [°C]
UVLO Detection ( VIN falling)
UVLO Release ( VIN rising)
0.83
0.85
0.87
0.89
0.91
0.93
0.95
0.97
-40 -20 0 20 40 60 80
EN Threshold Voltage : VEN [V]
Temperature : Ta [°C]
VENH ( VEN rising)
VENL ( VEN falling)
VIN = 5.0 V
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TSZ22111 • 15 • 001
BD9B305QUZ
Typical Performance Curves – continued
Figure 5. EN Input Current vs Temperature
Figure 6. FB Threshold Voltage vs Temperature
Figure 7. FB Input Current vs Temperature
Figure 8. Soft Start Time vs Temperature
(SS pin is left floating.)
0
2
4
6
8
10
-40 -20 0 20 40 60 80
EN Input Current : IEN [μA]
Temperature : Ta [°C]
VIN = 5.0 V, VEN = 5.0 V
0.590
0.592
0.594
0.596
0.598
0.600
0.602
0.604
0.606
0.608
0.610
-40 -20 0 20 40 60 80
FB Threshold Voltage : VFBTH [V]
Temperature : Ta [°C]
= 5.0 V
= 3.3 V
VIN
VIN
0
20
40
60
80
100
-40 -20 0 20 40 60 80
FB Input Current : IFB [nA]
Temperature : Ta [°C]
= 5.0 V
= 3.3 V
VIN
VIN
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
-40 -20 0 20 40 60 80
Soft Start Time : tSS [ms]
Temperature : Ta [°C]
= 5.0 V
= 3.3 V
VIN
VIN
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TSZ02201-0F3F0AJ00250-1-2
© 2019 ROHM Co., Ltd. All rights reserved.
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TSZ22111 • 15 • 001
BD9B305QUZ
Typical Performance Curves – continued
Figure 9. Soft Start Charge Current vs Temperature
Figure 10. On Time vs Temperature
(VIN = 5.0 V, VOUT = 1.8 V, IOUT = 1.0 A)
Figure 11. Switching Frequency vs Temperature
(VIN = 5.0 V, VOUT = 1.8 V, IOUT = 1.0 A)
Figure 12. High-Side FET ON Resistance vs Temperature
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
-40 -20 0 20 40 60 80
Soft Start Charge Current : ISS [μA]
Temperature : Ta [°C]
= 5.0 V
= 3.3 V
VIN
VIN
260
280
300
320
340
360
380
400
420
440
460
-40 -20 0 20 40 60 80
On Time : tON [ns]
Temperature : Ta [°C]
0.7
0.8
0.9
1.0
1.1
1.2
1.3
-40 -20 0 20 40 60 80
Switching Frequency : fSW [MHz]
Temperature : Ta [°C]
0
10
20
30
40
50
60
70
80
90
100
-40 -20 0 20 40 60 80
High-Side FET ON Resistance : RONH [mΩ]
Temperature : Ta [°C]
= 5.0 V
= 3.3 V
VIN
VIN
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TSZ02201-0F3F0AJ00250-1-2
© 2019 ROHM Co., Ltd. All rights reserved.
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TSZ22111 • 15 • 001
BD9B305QUZ
Typical Performance Curves – continued
Figure 13. Low-Side FET ON Resistance vs Temperature
Figure 14. Power Good / Fault Threshold Voltage vs
Temperature
Figure 15. PGD MOSFET ON Resistance vs Temperature
Figure 16. PGD Output Low Level Voltage vs Temperature
0
10
20
30
40
50
60
70
80
-40 -20 0 20 40 60 80
Low-Side FET ON Resistance : RONL [mΩ]
Temperature : Ta [°C]
= 5.0 V
= 3.3 V
VIN
VIN
80
85
90
95
100
105
110
115
120
-40 -20 0 20 40 60 80
Power Good / Fault Threshold Voltage : VPGD [%]
Temperature : Ta [°C]
Power Good (VFB rising)
Power Fault (VFB rising)
Power Good (VFB falling)
Power Fault (VFB falling)
VIN = 5.0 V
0
20
40
60
80
100
120
140
160
180
200
-40 -20 0 20 40 60 80
PGD MOSFET ON Resistance : RPGD [Ω]
Temperature : Ta [°C]
VIN = 5.0 V
0.00
0.02
0.04
0.06
0.08
0.10
0.12
0.14
0.16
0.18
0.20
-40 -20 0 20 40 60 80
PGD Output Low Level Voltage : VPGDL [V]
Temperature : Ta [°C]
VIN = 5.0 V
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TSZ02201-0F3F0AJ00250-1-2
© 2019 ROHM Co., Ltd. All rights reserved.
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TSZ22111 • 15 • 001
BD9B305QUZ
Typical Performance Curves – continued
Figure 17. Start-up at No Load: VEN = 0 V to 5 V
(VIN = 5.0 V, VOUT = 1.8 V, CSS = OPEN)
Figure 18. Shutdown at No Load: VEN = 5 V to 0 V
(VIN = 5.0 V, VOUT = 1.8 V, CSS = OPEN)
Figure 19. Start-up at RLoad = 0.6 Ω: VEN = 0 V to 5 V
(VIN = 5.0 V, VOUT = 1.8 V, CSS = OPEN)
Figure 20. Shutdown at RLoad = 0.6 Ω: VEN = 5 V to 0 V
(VIN = 5.0 V, VOUT = 1.8 V, CSS = OPEN)
VIN: 3 V/div
VEN: 3 V/div
VPGD: 5 V/div
Time: 500 µs/div
VOUT: 1 V/div
Time: 2 ms/div
VIN: 3 V/div
VEN: 3 V/div
VIN: 3 V/div
VEN: 3 V/div
VPGD: 5 V/div
Time: 500 µs/div
VOUT: 1 V/div
VPGD: 5 V/div
VOUT: 1 V/div
Time: 2 ms/div
VIN: 3 V/div
VEN: 3 V/div
VPGD: 5 V/div
VOUT: 1 V/div
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TSZ02201-0F3F0AJ00250-1-2
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TSZ22111 • 15 • 001
BD9B305QUZ
Typical Performance Curves – continued
Figure 21. Start-up at No Load: VIN = VEN = 0 V to 5 V
(VOUT = 1.8 V, CSS = OPEN)
Figure 22. Shutdown at No Load: VIN = VEN = 5 V to 0 V
(VOUT = 1.8 V, CSS = OPEN)
Figure 23. Start-up at RLoad = 0.6 Ω: VIN = VEN = 0 V to 5 V
(VOUT = 1.8 V, CSS = OPEN)
Figure 24. Shutdown at RLoad = 0.6 Ω: VIN = VEN = 5 V to 0 V
(VOUT = 1.8 V, CSS = OPEN)
VIN: 3 V/div
VEN: 3 V/div
VPGD: 5 V/div
Time: 500 µs/div
VOUT: 1 V/div
Time: 2 ms/div
VIN: 3 V/div
VEN: 3 V/div
VPGD: 5 V/div
VOUT: 1 V/div
VIN: 3 V/div
VEN: 3 V/div
VPGD: 5 V/div
Time: 500 µs/div
VOUT: 1 V/div
Time: 2 ms/div
VIN: 3 V/div
VEN: 3 V/div
VPGD: 5 V/div
VOUT: 1 V/div
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TSZ22111 • 15 • 001
BD9B305QUZ
Typical Performance Curves – continued
Figure 25. Output Current vs Temperature (Note 1)
Operating Range: Tj < 150 °C (VIN = 5.0 V, VOUT = 1.8 V)
Figure 26. Output Current vs Temperature (Note 1)
Operating Range: Tj < 150 °C (VIN = 3.3 V, VOUT = 1.8 V)
Figure 27. Efficiency vs Output Current
(VIN = 5.0 V, L: FDSD0518 series; Murata)
Figure 28. Efficiency vs Output Current
(VIN = 3.3 V, L: FDSD0518 series; Murata)
(Note 1) Measured on FR-4 board 67.5 mm x 67.5 mm, Copper Thickness: Top and Bottom 70 μm, 2 Internal Layers 35 μm.
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
-60 -40 -20 0 20 40 60 80 100
Output Current : IOUT [A]
Temperature : Ta [°C]
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
-60 -40 -20 0 20 40 60 80 100
Output Current : IOUT [A]
Temperature : Ta [°C]
40
45
50
55
60
65
70
75
80
85
90
95
100
0.001 0.01 0.1 1 10
Efficiency [%]
Output Current : IOUT [A]
= 3.3 V (L=1.5 μH)
= 1.8 V (L=1.0 μH)
= 1.2 V (L=1.0 μH)
= 1.0 V (L=1.0 μH)
= 0.6 V (L=1.0 μH)
VOUT
VOUT
VOUT
VOUT
VOUT
40
45
50
55
60
65
70
75
80
85
90
95
100
0.001 0.01 0.1 1 10
Efficiency [%]
Output Current : IOUT [A]
= 1.8 V (L=1.0 μH)
= 1.2 V (L=1.0 μH)
= 1.0 V (L=1.0 μH)
= 0.6 V (L=1.0 μH)
VOUT
VOUT
VOUT
VOUT
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TSZ22111 • 15 • 001
BD9B305QUZ
Typical Performance Curves – continued
Figure 29. Output Voltage vs Input Voltage (Line Regulation)
(VOUT = 1.8 V, IOUT = 1.0 A)
Figure 30. Switching Frequency vs Input Voltage
(VOUT = 1.8 V, IOUT = 1.0 A)
Figure 31. Output Voltage vs Output Current (Load Regulation)
(VIN = 5.0 V, VOUT = 1.8 V)
Figure 32. Switching Frequency vs Output Current
(VIN = 5.0 V, VOUT = 1.8 V)
1.77
1.78
1.79
1.80
1.81
1.82
1.83
2.5 3.0 3.5 4.0 4.5 5.0 5.5
Output Voltage : VOUT [V]
Input Voltage : VIN [V]
0.70
0.80
0.90
1.00
1.10
1.20
1.30
2.5 3.0 3.5 4.0 4.5 5.0 5.5
Switching Frequency : fSW [MHz]
Input Voltage : VIN [V]
1.77
1.78
1.79
1.80
1.81
1.82
1.83
0.0 0.5 1.0 1.5 2.0 2.5 3.0
Output Voltage : VOUT [V]
Output Current : IOUT [A]
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
0.0 0.5 1.0 1.5 2.0 2.5 3.0
Switching Frequency : fSW [MHz]
Output Current : IOUT [A]
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TSZ22111 • 15 • 001
BD9B305QUZ
Typical Performance Curves – continued
Figure 33. Output Voltage vs Output Current (Load Regulation)
(VIN = 3.3 V, VOUT = 1.8 V)
Figure 34. Switching Frequency vs Output Current
(VIN = 3.3 V, VOUT = 1.8 V)
Figure 35. OCP Operation (VIN = 5.0 V, VOUT = 1.8 V to 0 V)
Figure 36. SCP Operation (VIN = 5.0 V, VOUT = 1.8 V to 0 V)
1.77
1.78
1.79
1.80
1.81
1.82
1.83
0.0 0.5 1.0 1.5 2.0 2.5 3.0
Output Voltage : VOUT [V]
Output Current : IOUT [A]
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
0.0 0.5 1.0 1.5 2.0 2.5 3.0
Switching Frequency : fSW [MHz]
Output Current : IOUT [A]
VOUT: 2 V/div
VPGD: 5 V/div
IL: 3 A/div
VSW: 5 V/div
Time: 200 µs/div
VOUT: 2 V/div
VPGD: 5 V/div
IL: 3 A/div
Time: 50 ms/div
VSW: 5 V/div
16/41
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TSZ22111 • 15 • 001
BD9B305QUZ
Function Explanations
1. Basic Operation
(1) DC/DC Converter Operation
BD9B305QUZ is a synchronous buck DC/DC converter that achieves faster load transient response due to constant
on-time control. The device performs switching operation in PWM (Pulse Width Modulation) control at heavy load. It
operates in Light Load Mode control at lighter load to improve efficiency.
Figure 37. Efficiency Image between Light Load Mode Control and PWM Control
(2) Enable Control
The startup and shutdown can be controlled by the EN voltage (VEN). When VEN becomes 0.920 V (Typ) or more, the
internal circuit is activated and the device starts up. When VEN becomes 0.875 V (Typ) or less, the device is shut down.
In this shutdown mode, the High-Side FET and the Low-Side FET are turned off and the SW pin is connected to GND
through an internal resistor 100 Ω (Typ) to discharge the output. The start-up with VEN must be at the same time of the
input voltage VIN (VIN = VEN) or after supplying VIN.
Figure 38. Startup and Shutdown with Enable Control Timing Chart
PWM Control
Efficiency [%]
Output Current [A]
Light Load Mode Control
0 V
Startup
VENH
VENL
VEN
VOUT
0 V
0 V
VIN
Shutdown
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TSZ22111 • 15 • 001
BD9B305QUZ
Function Explanations – continued
(3) Soft Start
When VEN goes high, soft start function operates and output voltage gradually rises. This soft start function can
prevent overshoot of the output voltage and excessive inrush current. The soft start time tSS is 1 ms (Typ) when the SS
pin is left floating. A capacitor connected to the SS pin makes tSS more than 1 ms. See page 31 for how to set the soft
start time.
Figure 39. Soft Start Timing Chart
(4) Power Good Output
When the output voltage VOUT reaches within ±10 % (Typ) of the voltage setting, the built-in open drain Nch MOSFET
connected to the PGD pin is turned off, and the PGD pin goes Hi-Z (High impedance). When VOUT reaches outside
±15 % (Typ) of the voltage setting, the open drain Nch MOSFET is turned on and PGD pin is pulled down with 100 Ω
(Typ). It is recommended to connect a pull-up resistor of 10 kΩ to 100 kΩ.
Table 1. PGD Output
State
Condition
PGD Output
Before Supply Input Voltage
VIN < 0.7 V (Typ)
Hi-Z
Shutdown
VEN ≤ 0.875 V (Typ)
Low (Pull-down)
Enable
VEN ≥ 0.920 V (Typ)
90 % (Typ) ≤ VFB / VFBTH ≤ 110 % (Typ)
Hi-Z
VFB / VFBTH ≤ 85 % (Typ) or 115 % (Typ) ≤ VFB / VFBTH
Low (Pull-down)
UVLO
0.7 V (Typ) < VIN ≤ 2.45 V (Typ)
Low (Pull-down)
TSD
Tj ≥ 175 °C (Typ)
Low (Pull-down)
SCP
Complete Soft Start
VFB / VFBTH ≤ 85 % (Typ)
OCP 256 counts
Low (Pull-down)
0 V
VEN
VOUT
0 V
0 V
VIN
0 V
VFB
0 V
VPGD
VFBTH x 90 %
tSS
0.6 V
(Typ)
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TSZ22111 • 15 • 001
BD9B305QUZ
Function Explanations – continued
Figure 40. Power Good Timing Chart
(Connecting a pull-up resistor to the PGD pin)
(5) Output Capacitor Discharge Function
When even one of the following conditions is satisfied, output is discharged with 100 Ω (Typ) resistor through the SW
pin.
• Shutdown: VEN ≤ 0.875 V (Typ)
• UVLO: VIN ≤ 2.45 V (Typ)
• TSD: Tj ≥ 175 °C (Typ)
• SCP: Complete Soft Start, VFB / VFBTH ≤ 85 % (Typ), and OCP 256 counts
When all of the above conditions are released, output discharge is stopped.
0 V
VEN
VOUT
0 V
0 V
VIN
VFB
0 V
VPGD
VFBTH x 90 % (Typ)
tSS
+15 % (Typ)
+10 % (Typ)
-10 % (Typ) -15 % (Typ)
0 V
VFBTH x 110 % (Typ)
VFBTH x 85 % (Typ)
VFBTH x 115 % (Typ)
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TSZ22111 • 15 • 001
BD9B305QUZ
Function Explanations – continued
2. Protection
The protection circuits are intended for prevention of damage caused by unexpected accidents. Do not use the
continuous protection.
(1) Over Current Protection (OCP) / Short Circuit Protection (SCP)
Over Current Protection (OCP) restricts the flowing current through the Low-Side FET and the High-Side FET for every
switching period. If the inductor current exceeds the Low-Side OCP ILOCP = 4.5 A (Typ) while the Low-Side FET is on,
the Low-Side FET remains on even with FB voltage VFB falls to VFBTH = 0.6 V (Typ) or lower. If the inductor current
becomes lower than ILOCP, the High-Side FET is able to be turned on. When the inductor current becomes the
High-Side OCP IHOCP = 6.5 A (Typ) or more while the High-Side FET is on, the High-Side FET is turned off. Output
voltage may decrease by changing frequency and duty due to the OCP operation.
Short Circuit Protection (SCP) function is a Hiccup mode. When Low-Side OCP operates 256 cycles while VFB is VFBTH
x 85 % or less (VPGD = Low), the device stops the switching operation for 128 ms (Typ). After the 128 ms (Typ), the
device restarts. SCP does not operate during the soft start even if the device is in the SCP conditions. Do not exceed
the maximum junction temperature (Tjmax = 150 °C) during OCP and SCP operation.
Table 2. The Operating Condition of OCP and SCP
VEN
VFB
Start-up
OCP
SCP
≥ 0.920 V (Typ)
≤ VFBTH x 85 % (Typ)
During Soft Start
Enable
Disable
> VFBTH x 85 % (Typ)
Complete Soft Start
Enable
Disable
≤ VFBTH x 85 % (Typ)
Enable
Enable
≤ 0.875 V (Typ)
-
Shutdown
Disable
Disable
Figure 41. OCP and SCP Timing Chart
VOUT
VFB
Low-Side FET
Internal Gate Signal
Inductor Current
Low-Side OCP
Internal Signal
SCP
Internal Signal 128 ms (Typ)
IHOCP
High-Side OCP
Internal Signal
Less than
OCP 256 counts
VPGD
VFBTH x 85 % (Typ) VFBTH x 90 % (Typ)
ILOCP
OCP 256 counts
High-Side FET
Internal Gate Signal
VSW
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TSZ22111 • 15 • 001
BD9B305QUZ
Function Explanations – continued
(2) Under Voltage Lockout Protection (UVLO)
When input voltage VIN falls to 2.45 V (Typ) or lower, the device is shut down. When VIN becomes 2.55 V (Typ) or more,
the device starts up. The hysteresis is 100 mV (Typ).
Figure 42. UVLO Timing Chart
(3) Thermal Shutdown Protection (TSD)
Thermal shutdown circuit prevents heat damage to the IC. The device should always operate within the IC’s maximum
junction temperature rating (Tjmax = 150 °C). However, if it continues exceeding the rating and the junction
temperature Tj rises to 175 °C (Typ), the TSD circuit is activated and it turns the output MOSFETs off. When the Tj falls
below the TSD threshold, the circuits are automatically restored to normal operation. The TSD threshold has a
hysteresis of 25 °C (Typ). Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings.
Therefore, under no circumstances, should the TSD circuit be used in a set design or for any purpose other than
protecting the IC from heat damage.
(4) Over Voltage Protection (OVP)
When the FB voltage VFB exceeds VFBTH x 115 % (Typ) or more, the output MOSFETs are turned off to prevent the
increase in the output voltage. After the VFB falls VFBTH x 110 % (Typ) or less, the output MOSFETs are returned to
normal operation condition. Switching operation will restart after VFB falls below VFBTH.
0 V
VIN
(=VEN)
VOUT
UVLO Detect
VUVLO1 = 2.45 V (Typ)
0 VtSS
Hysteresis
VUVLOHYS = 100 mV (Typ)
VOUT UVLO Release
VUVLO2 = 2.55 V (Typ)
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TSZ22111 • 15 • 001
BD9B305QUZ
Application Examples
1. VIN = 5 V, VOUT = 3.3 V
Table 3. Specification of Application (VIN = 5 V, VOUT = 3.3 V)
Parameter
Symbol
Specification Value
Input Voltage
VIN
5 V (Typ)
Output Voltage
VOUT
3.3 V (Typ)
Maximum Output Current
IOUTMAX
3.0 A
Switching Frequency
fSW
1.0 MHz (Typ)
Soft Start Time
tSS
1 ms (Typ)
Temperature
Ta
25 °C
Figure 43. Application Circuit
Table 4. Recommended Component Values (VIN = 5 V, VOUT = 3.3 V)
Part No.
Value
Part Name
Size Code (mm)
Manufacturer
L1
1.5 μH
FDSD0518-H-1R5M
5249
Murata
C1 (Note 1)
0.1 μF (16V, X5R, ±10 %)
GRM033R61C104KE14
0603
Murata
C2 (Note 2)
22 μF (10V, X5R, ±20 %)
GRM188R61A226ME15
1608
Murata
C3 (Note 2)
-
-
-
-
C4
-
-
-
-
C5 (Note 3)
0.1 μF (16V, X5R, ±10 %)
GRM033R61C104KE14
0603
Murata
C6
68 pF (50 V, C0G, ±5 %)
GRM0335C1H680JA01
0603
Murata
C7 (Note 4)
47 μF (4 V, X5R, ±20 %)
AMK107BBJ476MA-RE
1608
TAIYO YUDEN
C8 (Note 4)
-
-
-
-
R1
200 kΩ (1 %, 1/16 W)
MCR01MZPF2003
1005
ROHM
R2
12 kΩ (1 %, 1/16 W)
MCR01MZPF1202
1005
ROHM
R3
47 kΩ (1 %, 1/16 W)
MCR01MZPF4702
1005
ROHM
R4
100 kΩ (1 %, 1/16 W)
MCR01MZPF1003
1005
ROHM
R5
1.8 MΩ (1 %, 1/16 W)
MCR01MZPF1804
1005
ROHM
R6
470 kΩ (1 %, 1/16 W)
MCR01MZPF4703
1005
ROHM
R0 (Note 5)
Short
-
-
-
(Note 1) In order to reduce the influence of high frequency noise, connect a 0.1 μF ceramic capacitor C1 as close as possible to the VIN pin and the GND
pin if needed.
(Note 2) For the input capacitor C2 and C3, take temperature characteristics, DC bias characteristics, etc. into consideration to set to the actual
capacitance of no less than 4.7 μF.
(Note 3) For the bootstrap capacitor C5, take temperature characteristics, DC bias characteristics, etc. into consideration to set to the actual capacitance
of no less than 0.022 μF.
(Note 4) In case of changing the actual capacitance value due to temperature characteristics, DC bias characteristics, etc. of the output capacitor C7 and
C8, the loop response characteristics may change. Confirm with the actual application. The total capacitance of 10 μF to 47 x 2 μF is
recommended for the output capacitor.
(Note 5) R0 is an option, used for feedback’s frequency response measurement. By inserting a resistor at R0, it is possible to measure the frequency
response (phase margin) using a FRA. However, the resistor will not be used in actual application, use this resistor pattern in short-circuit
mode.
C1
C2
C3
VIN
GND
EN
BOOT
SW
PGD
FB
GND
VIN
EN
SS
1
2
3
4
8
7
6
5
C4
C5
L1R0
R1
R2
R3
C6
PGD
R4
C7C8
VOUT
GND
BD9B305QUZ
EXP-PAD
R5
R6
22/41
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TSZ22111 • 15 • 001
BD9B305QUZ
1. VIN = 5 V, VOUT = 3.3 V – continued
Figure 44. Output Ripple Voltage (IOUT = 0.1 A)
Figure 45. Output Ripple Voltage (IOUT = 3.0 A)
Figure 46. Frequency Characteristics (IOUT = 3.0 A)
Figure 47. Load Transient Response (IOUT = 0.1 A to 1.0 A)
-180
-135
-90
-45
0
45
90
135
180
-80
-60
-40
-20
0
20
40
60
80
110 100 1000
Phase [°]
Gain [dB]
Frequency [kHz]
Gain
Phase
VOUT: 20 mV/div
Time: 2 µs/div
VSW: 2 V/div
VOUT: 20 mV/div
Time: 2 µs/div
VOUT: 200 mV/div
VSW: 2 V/div
Time: 100 µs/div
IOUT: 500 mA/div
23/41
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TSZ22111 • 15 • 001
BD9B305QUZ
Application Examples – continued
2. VIN = 5 V, VOUT = 1.8 V
Table 5. Specification of Application (VIN = 5 V, VOUT = 1.8 V)
Parameter
Symbol
Specification Value
Input Voltage
VIN
5 V (Typ)
Output Voltage
VOUT
1.8 V (Typ)
Maximum Output Current
IOUTMAX
3.0 A
Switching Frequency
fSW
1.0 MHz (Typ)
Soft Start Time
tSS
1 ms (Typ)
Temperature
Ta
25 °C
Figure 48. Application Circuit
Table 6. Recommended Component Values (VIN = 5 V, VOUT = 1.8 V)
Part No.
Value
Part Name
Size Code (mm)
Manufacturer
L1
1.0 μH
FDSD0518-H-1R0M
5249
Murata
C1 (Note 1)
0.1 μF (16V, X5R, ±10 %)
GRM033R61C104KE14
0603
Murata
C2 (Note 2)
22 μF (10V, X5R, ±20 %)
GRM188R61A226ME15
1608
Murata
C3 (Note 2)
-
-
-
-
C4
-
-
-
-
C5 (Note 3)
0.1 μF (16V, X5R, ±10 %)
GRM033R61C104KE14
0603
Murata
C6
100 pF (50 V, C0G, ±5 %)
GRM0335C1H101JA01
0603
Murata
C7 (Note 4)
47 μF (4 V, X5R, ±20 %)
AMK107BBJ476MA-RE
1608
TAIYO YUDEN
C8 (Note 4)
-
-
-
-
R1
200 kΩ (1 %, 1/16 W)
MCR01MZPF2003
1005
ROHM
R2
Short
-
-
-
R3
100 kΩ (1 %, 1/16 W)
MCR01MZPF1003
1005
ROHM
R4
100 kΩ (1 %, 1/16 W)
MCR01MZPF1003
1005
ROHM
R5
-
-
-
-
R6
-
-
-
-
R0 (Note 5)
Short
-
-
-
(Note 1) In order to reduce the influence of high frequency noise, connect a 0.1 μF ceramic capacitor C1 as close as possible to the VIN pin and the GND
pin if needed.
(Note 2) For the input capacitor C2 and C3, take temperature characteristics, DC bias characteristics, etc. into consideration to set to the actual
capacitance of no less than 4.7 μF.
(Note 3) For the bootstrap capacitor C5, take temperature characteristics, DC bias characteristics, etc. into consideration to set to the actual capacitance
of no less than 0.022 μF.
(Note 4) In case of changing the actual capacitance value due to temperature characteristics, DC bias characteristics, etc. of the output capacitor C7 and
C8, the loop response characteristics may change. Confirm with the actual application. The total capacitance of 10 μF to 47 x 2 μF is
recommended for the output capacitor.
(Note 5) R0 is an option, used for feedback’s frequency response measurement. By inserting a resistor at R0, it is possible to measure the frequency
response (phase margin) using a FRA. However, the resistor will not be used in actual application, use this resistor pattern in short-circuit
mode.
C1
C2
C3
VIN
GND
EN
BOOT
SW
PGD
FB
GND
VIN
EN
SS
1
2
3
4
8
7
6
5
C4
C5
L1R0
R1
R2
R3
C6
PGD
R4
C7C8
VOUT
GND
BD9B305QUZ
EXP-PAD
R5
R6
24/41
TSZ02201-0F3F0AJ00250-1-2
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TSZ22111 • 15 • 001
BD9B305QUZ
2. VIN = 5 V, VOUT = 1.8 V – continued
Figure 49. Output Ripple Voltage (IOUT = 0.1 A)
Figure 50. Output Ripple Voltage (IOUT = 3.0 A)
Figure 51. Frequency Characteristics (IOUT = 3.0 A)
Figure 52. Load Transient Response (IOUT = 0.1 A to 1.0 A)
-180
-135
-90
-45
0
45
90
135
180
-80
-60
-40
-20
0
20
40
60
80
110 100 1000
Phase [°]
Gain [dB]
Frequency [kHz]
Gain
Phase
VOUT: 20 mV/div
Time: 2 µs/div
VSW: 2 V/div
VOUT: 20 mV/div
Time: 2 µs/div
VSW: 2 V/div
VOUT: 100 mV/div
Time: 100 µs/div
IOUT: 500 mA/div
25/41
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TSZ22111 • 15 • 001
BD9B305QUZ
Application Examples – continued
3. VIN = 5 V, VOUT = 1.2 V
Table 7. Specification of Application (VIN = 5 V, VOUT = 1.2 V)
Parameter
Symbol
Specification Value
Input Voltage
VIN
5 V (Typ)
Output Voltage
VOUT
1.2 V (Typ)
Maximum Output Current
IOUTMAX
3.0 A
Switching Frequency
fSW
1.0 MHz (Typ)
Soft Start Time
tSS
1 ms (Typ)
Temperature
Ta
25 °C
Figure 53. Application Circuit
Table 8. Recommended Component Values (VIN = 5 V, VOUT = 1.2 V)
Part No.
Value
Part Name
Size Code (mm)
Manufacturer
L1
1.0 μH
FDSD0518-H-1R0M
5249
Murata
C1 (Note 1)
0.1 μF (16V, X5R, ±10 %)
GRM033R61C104KE14
0603
Murata
C2 (Note 2)
22 μF (10V, X5R, ±20 %)
GRM188R61A226ME15
1608
Murata
C3 (Note 2)
-
-
-
-
C4
-
-
-
-
C5 (Note 3)
0.1 μF (16V, X5R, ±10 %)
GRM033R61C104KE14
0603
Murata
C6
120 pF (50 V, C0G, ±5 %)
GRM0335C1H121JA01
0603
Murata
C7 (Note 4)
47 μF (4 V, X5R, ±20 %)
AMK107BBJ476MA-RE
1608
TAIYO YUDEN
C8 (Note 4)
-
-
-
-
R1
150 kΩ (1 %, 1/16 W)
MCR01MZPF1503
1005
ROHM
R2
Short
-
-
-
R3
150 kΩ (1 %, 1/16 W)
MCR01MZPF1503
1005
ROHM
R4
100 kΩ (1 %, 1/16 W)
MCR01MZPF1003
1005
ROHM
R5
-
-
-
-
R6
-
-
-
-
R0 (Note 5)
Short
-
-
-
(Note 1) In order to reduce the influence of high frequency noise, connect a 0.1 μF ceramic capacitor C1 as close as possible to the VIN pin and the GND
pin if needed.
(Note 2) For the input capacitor C2 and C3, take temperature characteristics, DC bias characteristics, etc. into consideration to set to the actual
capacitance of no less than 4.7 μF.
(Note 3) For the bootstrap capacitor C5, take temperature characteristics, DC bias characteristics, etc. into consideration to set to the actual capacitance
of no less than 0.022 μF.
(Note 4) In case of changing the actual capacitance value due to temperature characteristics, DC bias characteristics, etc. of the output capacitor C7 and
C8, the loop response characteristics may change. Confirm with the actual application. The total capacitance of 10 μF to 47 x 2 μF is
recommended for the output capacitor.
(Note 5) R0 is an option, used for feedback’s frequency response measurement. By inserting a resistor at R0, it is possible to measure the frequency
response (phase margin) using a FRA. However, the resistor will not be used in actual application, use this resistor pattern in short-circuit
mode.
C1
C2
C3
VIN
GND
EN
BOOT
SW
PGD
FB
GND
VIN
EN
SS
1
2
3
4
8
7
6
5
C4
C5
L1R0
R1
R2
R3
C6
PGD
R4
C7C8
VOUT
GND
BD9B305QUZ
EXP-PAD
R5
R6
26/41
TSZ02201-0F3F0AJ00250-1-2
© 2019 ROHM Co., Ltd. All rights reserved.
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TSZ22111 • 15 • 001
BD9B305QUZ
3. VIN = 5 V, VOUT = 1.2 V – continued
Figure 54. Output Ripple Voltage (IOUT = 0.1 A)
Figure 55. Output Ripple Voltage (IOUT = 3.0 A)
Figure 56. Frequency Characteristics (IOUT = 3.0 A)
Figure 57. Load Transient Response (IOUT = 0.1 A to 1.0 A)
-180
-135
-90
-45
0
45
90
135
180
-80
-60
-40
-20
0
20
40
60
80
110 100 1000
Phase [°]
Gain [dB]
Frequency [kHz]
Gain
Phase
VOUT: 20 mV/div
Time: 2 µs/div
VSW: 2 V/div
VOUT: 20 mV/div
Time: 2 µs/div
VSW: 2 V/div
VOUT: 100 mV/div
Time: 100 µs/div
IOUT: 500 mA/div
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TSZ22111 • 15 • 001
BD9B305QUZ
Application Examples – continued
4. VIN = 5 V, VOUT = 1.0 V
Table 9. Specification of Application (VIN = 5 V, VOUT = 1.0 V)
Parameter
Symbol
Specification Value
Input Voltage
VIN
5 V (Typ)
Output Voltage
VOUT
1.0 V (Typ)
Maximum Output Current
IOUTMAX
3.0 A
Switching Frequency
fSW
1.0 MHz (Typ)
Soft Start Time
tSS
1 ms (Typ)
Temperature
Ta
25 °C
Figure 58. Application Circuit
Table 10. Recommended Component Values (VIN = 5 V, VOUT = 1.0 V)
Part No.
Value
Part Name
Size Code (mm)
Manufacturer
L1
1.0 μH
FDSD0518-H-1R0M
5249
Murata
C1 (Note 1)
0.1 μF (16V, X5R, ±10 %)
GRM033R61C104KE14
0603
Murata
C2 (Note 2)
22 μF (10V, X5R, ±20 %)
GRM188R61A226ME15
1608
Murata
C3 (Note 2)
-
-
-
-
C4
-
-
-
-
C5 (Note 3)
0.1 μF (16V, X5R, ±10 %)
GRM033R61C104KE14
0603
Murata
C6
120 pF (50 V, C0G, ±5 %)
GRM0335C1H121JA01
0603
Murata
C7 (Note 4)
47 μF (4 V, X5R, ±20 %)
AMK107BBJ476MA-RE
1608
TAIYO YUDEN
C8 (Note 4)
-
-
-
-
R1
100 kΩ (1 %, 1/16 W)
MCR01MZPF1003
1005
ROHM
R2
Short
-
-
-
R3
150 kΩ (1 %, 1/16 W)
MCR01MZPF1503
1005
ROHM
R4
100 kΩ (1 %, 1/16 W)
MCR01MZPF1003
1005
ROHM
R5
-
-
-
-
R6
-
-
-
-
R0 (Note 5)
Short
-
-
-
(Note 1) In order to reduce the influence of high frequency noise, connect a 0.1 μF ceramic capacitor C1 as close as possible to the VIN pin and the GND
pin if needed.
(Note 2) For the input capacitor C2 and C3, take temperature characteristics, DC bias characteristics, etc. into consideration to set to the actual
capacitance of no less than 4.7 μF.
(Note 3) For the bootstrap capacitor C5, take temperature characteristics, DC bias characteristics, etc. into consideration to set to the actual capacitance
of no less than 0.022 μF.
(Note 4) In case of changing the actual capacitance value due to temperature characteristics, DC bias characteristics, etc. of the output capacitor C7 and
C8, the loop response characteristics may change. Confirm with the actual application. The total capacitance of 10 μF to 47 x 2 μF is
recommended for the output capacitor.
(Note 5) R0 is an option, used for feedback’s frequency response measurement. By inserting a resistor at R0, it is possible to measure the frequency
response (phase margin) using a FRA. However, the resistor will not be used in actual application, use this resistor pattern in short-circuit
mode.
C1
C2
C3
VIN
GND
EN
BOOT
SW
PGD
FB
GND
VIN
EN
SS
1
2
3
4
8
7
6
5
C4
C5
L1R0
R1
R2
R3
C6
PGD
R4
C7C8
VOUT
GND
BD9B305QUZ
EXP-PAD
R5
R6
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BD9B305QUZ
4. VIN = 5 V, VOUT = 1.0 V – continued
Figure 59. Output Ripple Voltage (IOUT = 0.1 A)
Figure 60. Output Ripple Voltage (IOUT = 3.0 A)
Figure 61. Frequency Characteristics (IOUT = 3.0 A)
Figure 62. Load Transient Response (IOUT = 0.1 A to 1.0 A)
-180
-135
-90
-45
0
45
90
135
180
-80
-60
-40
-20
0
20
40
60
80
110 100 1000
Phase [°]
Gain [dB]
Frequency [kHz]
Gain
Phase
VOUT: 20 mV/div
Time: 2 µs/div
VSW: 2 V/div
VOUT: 20 mV/div
Time: 2 µs/div
VSW: 2 V/div
VOUT: 100 mV/div
Time: 100 µs/div
IOUT: 500 mA/div
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TSZ22111 • 15 • 001
BD9B305QUZ
Application Examples – continued
5. VIN = 5 V, VOUT = 0.6 V
Table 11. Specification of Application (VIN = 5 V, VOUT = 0.6 V)
Parameter
Symbol
Specification Value
Input Voltage
VIN
5 V (Typ)
Output Voltage
VOUT
0.6 V (Typ)
Maximum Output Current
IOUTMAX
3.0 A
Switching Frequency
fSW
1.0 MHz (Typ)
Soft Start Time
tSS
1 ms (Typ)
Temperature
Ta
25 °C
Figure 63. Application Circuit
Table 12. Recommended Component Values (VIN = 5 V, VOUT = 0.6 V)
Part No.
Value
Part Name
Size Code (mm)
Manufacturer
L1
1.0 μH
FDSD0518-H-1R0M
5249
Murata
C1 (Note 1)
0.1 μF (16V, X5R, ±10 %)
GRM033R61C104KE14
0603
Murata
C2 (Note 2)
22 μF (10V, X5R, ±20 %)
GRM188R61A226ME15
1608
Murata
C3 (Note 2)
-
-
-
-
C4
-
-
-
-
C5 (Note 3)
0.1 μF (16V, X5R, ±10 %)
GRM033R61C104KE14
0603
Murata
C6
120 pF (50 V, C0G, ±5 %)
GRM0335C1H121JA01
0603
Murata
C7 (Note 4)
47 μF (4 V, X5R, ±20 %)
AMK107BBJ476MA-RE
1608
TAIYO YUDEN
C8 (Note 4)
-
-
-
-
R1
100 kΩ (1 %, 1/16 W)
MCR01MZPF1003
1005
ROHM
R2
Short
-
-
-
R3
-
-
-
-
R4
100 kΩ (1 %, 1/16 W)
MCR01MZPF1003
1005
ROHM
R5
-
-
-
-
R6
-
-
-
-
R0 (Note 5)
Short
-
-
-
(Note 1) In order to reduce the influence of high frequency noise, connect a 0.1 μF ceramic capacitor C1 as close as possible to the VIN pin and the GND
pin if needed.
(Note 2) For the input capacitor C2 and C3, take temperature characteristics, DC bias characteristics, etc. into consideration to set to the actual
capacitance of no less than 4.7 μF.
(Note 3) For the bootstrap capacitor C5, take temperature characteristics, DC bias characteristics, etc. into consideration to set to the actual capacitance
of no less than 0.022 μF.
(Note 4) In case of changing the actual capacitance value due to temperature characteristics, DC bias characteristics, etc. of the output capacitor C7 and
C8, the loop response characteristics may change. Confirm with the actual application. The total capacitance of 10 μF to 47 x 2 μF is
recommended for the output capacitor.
(Note 5) R0 is an option, used for feedback’s frequency response measurement. By inserting a resistor at R0, it is possible to measure the frequency
response (phase margin) using a FRA. However, the resistor will not be used in actual application, use this resistor pattern in short-circuit
mode.
C1
C2
C3
VIN
GND
EN
BOOT
SW
PGD
FB
GND
VIN
EN
SS
1
2
3
4
8
7
6
5
C4
C5
L1R0
R1
R2
R3
C6
PGD
R4
C7C8
VOUT
GND
BD9B305QUZ
EXP-PAD
R5
R6
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TSZ22111 • 15 • 001
BD9B305QUZ
5. VIN = 5 V, VOUT = 0.6 V – continued
Figure 64. Output Ripple Voltage (IOUT = 0.1 A)
Figure 65. Output Ripple Voltage (IOUT = 3.0 A)
Figure 66. Frequency Characteristics (IOUT = 3.0 A)
Figure 67. Load Transient Response (IOUT = 0.1 A to 1.0 A)
-180
-135
-90
-45
0
45
90
135
180
-80
-60
-40
-20
0
20
40
60
80
110 100 1000
Phase [°]
Gain [dB]
Frequency [kHz]
Gain
Phase
VOUT: 20 mV/div
Time: 2 µs/div
VSW: 2 V/div
VOUT: 20 mV/div
Time: 2 µs/div
VSW: 2 V/div
VOUT: 100 mV/div
Time: 100 µs/div
IOUT: 500 mA/div
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BD9B305QUZ
Selection of Components Externally Connected
Contact us if not use the recommended component values in Application Examples.
1. Input Capacitor
Use ceramic type capacitor for the input capacitor. The input capacitor is used to reduce the input ripple noise and it is
effective by being placed as close as possible to the VIN pin. Set the capacitor value so that it does not fall to 4.7 μF
considering the capacitor value variances, temperature characteristics, DC bias characteristics, aging characteristics, and
etc. The PCB layout and the position of the capacitor may lead to IC malfunction. Refer to the notes on the PCB layout on
page 34 to 35 when designing PCB layout. In addition, the capacitor with value 0.1 μF can be connected as close as
possible to the VIN pin and the GND pin in order to reduce the high frequency noise.
2. Output Voltage Setting
The output voltage can be set by the feedback resistance ratio connected to the FB pin. For stable operation, the parallel
resistance of feedback resistors R1 and R2 should be set to 20 kΩ or more.
The output voltage VOUT can be calculated as below.
[V]
[V]
[kΩ]
Figure 68. Feedback Resistor Circuit
3. Soft Start Capacitor (Soft Start Time Setting)
The soft start time tSS depends on the value of the capacitor connected to the SS pin. The tSS is 1 ms (Typ) when the SS
pin is left floating. The capacitor connected to the SS pin makes tSS more than 1 ms. The tSS and CSS can be calculated
using below equation. The CSS should be set in the range between 3300 pF and 0.1 μF.
[s]
where:
is the Soft Start Charge Current 1.0 µA (Typ).
With CSS = 8200 pF, tSS can be calculated as below.
[ms]
VOUT
R1
R2
FB
Error Amplifier
0.6 V
(Typ)
CFB
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BD9B305QUZ
Selection of Components Externally Connected – continued
4. Output LC Filter
In order to supply a continuous current to the load, the DC/DC converter requires an LC filter for smoothing the output
voltage. Use the inductor with value 1.0 μH to 1.5 μH.
Figure 69. Waveform of Inductor Current Figure 70. Output LC Filter Circuit
For example, given that VIN = 5 V, VOUT = 1.8 V, L1 = 1.0 μH, and the switching frequency fSW = 1.0 MHz, Inductor current
ΔIL can be represented by the following equation.
[A]
The rated current of the inductor (Inductor saturation current) must be larger than the sum of the maximum output current
IOUTMAX and 1/2 of the inductor ripple current ΔIL.
Use ceramic type capacitor for the output capacitor COUT. The capacitance value of COUT is recommended in the range
between 10 μF and 47 x 2 μF. COUT affects the output ripple voltage. Select COUT so that it must satisfy the required ripple
voltage characteristics.
The output ripple voltage can be estimated by the following equation.
[V]
where:
is the Equivalent Series Resistance (ESR) of the output capacitor.
For example, given that COUT = 47 μF and RESR = 3 mΩ, ΔVRPL can be calculated as below.
[mV]
VOUT
L1
COUT
VIN
Driver
IL
t
Inductor saturation current > IOUTMAX + ∆IL/2
∆IL
Maximum Output Current IOUTMAX
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BD9B305QUZ
4. Output LC Filter – continued
In addition, the total capacitance connected to VOUT needs to satisfy the value obtained by the following equation.
[F]
where:
is the minimum soft start time.
is the output voltage.
is the inductor current.
is the maximum output current during soft start.
For example, given that VIN = 5 V, VOUT = 1.8 V, L1 = 1.0 µH, fSW = 1 MHz (Typ), tSSMIN = 0.6 ms (CSS = OPEN), and IOUTSS =
3 A, COUTMAX can be calculated as below.
[µF]
If the total capacitance connected to VOUT is larger than COUTMAX, over current protection may be activated by the inrush
current at startup and prevented to turn on the output. Confirm this on the actual application.
5. FB Capacitor
The Constant On-time Control required the sufficient ripple voltage on FB voltage for the operation stability. This device is
designed to correspond to low ESR output capacitors by injecting the ripple voltage to FB voltage inside the IC. The FB
capacitor CFB (Figure 68) should be set within the range of the following expression in order to inject an appropriate ripple.
[F]
where:
is the input voltage.
is the output voltage.
is the switching frequency 1.0 MHz (Typ).
Load transient response and the loop stability depends on L1, COUT, and CFB. Actually, these characteristics may change
depending on PCB layout, wiring, the type of components, and the conditions (temperature, etc.). Be sure to check them
on the actual application.
6. Bootstrap Capacitor
The bootstrap capacitor 0.1μF is recommended. Connect the capacitor between the SW pin and the BOOT pin. For the
capacitance, take temperature characteristics, DC bias characteristics, and etc. into consideration to set to the actual
capacitance of no less than 0.022 μF.
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BD9B305QUZ
PCB Layout Design
PCB layout design for DC/DC converter is very important. Appropriate layout can avoid various problems concerning power
supply circuit. Figure 71-a to Figure 71-c show the current path in a buck DC/DC converter circuit. The Loop 1 in Figure 71-a is
a current path when H-side switch is ON and L-side switch is OFF, the Loop 2 in Figure 71-b is when H-side switch is OFF and
L-side switch is ON. The thick line in Figure 71-c shows the difference between Loop1 and Loop2. The current in thick line
change sharply each time the switching element H-side and L-side switch change from OFF to ON, and vice versa. These
sharp changes induce a waveform with harmonics in this loop. Therefore, the loop area of thick line that is consisted by input
capacitor and IC should be as small as possible to minimize noise. For more details, refer to application note of switching
regulator series “PCB Layout Techniques of Buck Converter”.
Figure 71-a. Current Path when H-side Switch = ON, L-side Switch = OFF
Figure 71-b. Current Path when H-side Switch = OFF, L-side Switch = ON
Figure 71-c. Difference of Current and Critical Area in Layout
CIN
H-side Switch COUT
VOUT
L
VIN
Loop1
L-side Switch
GND GND
CIN COUT
VOUT
L
VIN
Loop2
H-side Switch
L-side Switch
GND GND
CIN High-Side FET COUT
VOUT
L
VIN
GND GND
Low-Side FET
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BD9B305QUZ
PCB Layout Design – continued
When designing the PCB layout, pay attention to the following points:
• Connect the input capacitor CIN1 and CIN2 as close as possible to the VIN pin and GND pin on the same plane as the IC.
• Switching nodes such as SW are susceptible to noise due to AC coupling with other nodes. Route the inductor pattern L1 as
thick and as short as possible.
• Feedback line connected to the FB pin far from the SW nodes.
• Place the output capacitor COUT away from input capacitor CIN1 and CIN2 to avoid harmonics noise from the input.
• Separate the reference ground and the power ground and connect them through VIA. The reference ground should be
connected to the power ground that is close to the output capacitor COUT. It is because COUT has less high frequency
switching noise.
• R0 is provided for the measurement of feedback frequency characteristics (optional). By inserting a resistor into R0, it is
possible to measure the frequency characteristics of feedback (phase margin) using FRA etc. R0 is short-circuited for
normal use.
Figure 72. Application Circuit
Figure 73. Example of PCB Layout
CIN1
(0.1 μF)
CIN2
(22 μF)
VIN
GND
EN
BOOT
SW
PGD
FB
GND
VIN
EN
SS
1
2
3
4
8
7
6
5
CBOOT
(0.1 μF)
L1
R0
R1
R2
CFB
PGD
RPGD
COUT
(47 μF)
VOUT
GND
BD9B305QUZ
EXP-PAD
CSS
CIN1CSS
CIN2
CBOOT
R1
COUT
CFB
L1
R2
R0
RPGD
BD9B305QUZ Pin 1
VIN
VOUT
Reference Ground
Thermal VIA Signal VIA
Power Ground
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BD9B305QUZ
I/O Equivalence Circuits
1. BOOT
2. SW
3. PGD
4. FB
5. SS
6. EN
(Note) Resistor values are typical.
BOOT
SW
VIN
SW
VIN BOOT
93 Ω
PGD
VIN
10 kΩ
FB
SS 10 kΩ
10 kΩ
VIN
EN
10 kΩ
VIN
10 kΩ
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TSZ22111 • 15 • 001
BD9B305QUZ
Operational Notes
1. Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2. Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at
all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic
capacitors.
3. Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition. However,
pins that drive inductive loads (e.g. motor driver outputs, DC-DC converter outputs) may inevitably go below ground
due to back EMF or electromotive force. In such cases, the user should make sure that such voltages going below
ground will not cause the IC and the system to malfunction by examining carefully all relevant factors and conditions
such as motor characteristics, supply voltage, operating frequency and PCB wiring to name a few.
4. Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5. Recommended Operating Conditions
The function and operation of the IC are guaranteed within the range specified by the recommended operating
conditions. The characteristic values are guaranteed only under the conditions of each item specified by the electrical
characteristics.
6. Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power
supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and
routing of connections.
7. Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
8. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
9. Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
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BD9B305QUZ
Operational Notes – continued
10. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Figure 74. Example of Monolithic IC Structure
11. Ceramic Capacitor
When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
12. Thermal Shutdown Circuit (TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always
be within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the
junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF power output pins. When the Tj
falls below the TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from
heat damage.
13. Over Current Protection Circuit (OCP)
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This
protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should
not be used in applications characterized by continuous operation or transitioning of the protection circuit.
N N
P+PN N
P+
P Substrate
GND
NP+N N
P+
NP
P Substrate
GND GND
Parasitic
Elements
Pin A
Pin A
Pin B Pin B
B C
EParasitic
Elements
GND
Parasitic
Elements
CB
E
Transistor (NPN)Resistor
N Region
close-by
Parasitic
Elements
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TSZ22111 • 15 • 001
BD9B305QUZ
Ordering Information
B
D
9
B
3
0
5
Q
U
Z
-
E 2
Package
VMMP08LZ2020
Packaging and forming specification
E2: Embossed tape and reel
Marking Diagram
Part Number Marking
LOT Number
Pin 1 Mark
VMMP08LZ2020 (TOP VIEW)
305
D 9 B
Notice-PGA-E Rev.004
© 2015 ROHM Co., Ltd. All rights reserved.
Notice
Precaution on using ROHM Products
1. Our Products are designed and manufactured for application in ordinary electronic equipment (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1), transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅣ
CLASSⅢ
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3. Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.
However, recommend sufficiently about the residue.) ; or Washing our Products by using water or water-soluble
cleaning agents for cleaning residue after soldering
[h] Use of the Products in places subject to dew condensation
4. The Products are not subject to radiation-proof design.
5. Please verify and confirm characteristics of the final or mounted products in using the Products.
6.In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.Confirm that operation temperature is within the specified range described in the product specification.
9.ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGA-E Rev.004
© 2015 ROHM Co., Ltd. All rights reserved.
Precautions Regarding Application Examples and External Circuits
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2. You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1. All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4. The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
DatasheetDatasheet
Notice – WE Rev.001
© 2015 ROHM Co., Ltd. All rights reserved.
General Precaution
1. Before you use our Products, you are requested to carefully read this document and fully understand its contents.
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.
3. The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccuracy or errors of or
concerning such information.
