RT8284
1
DS8284-01 March 2011 www.richtek.com
Ordering Information
Note :
Richtek products are :
` RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
` Suitable for use in SnPb or Pb-free soldering processes.
2A, 23V, 340kHz Synchronous Step-Down Converter
General Description
The RT8284 is a high efficiency , monolithic synchronous
step-down DC/DC converter that can deliver up to 2A output
current from a 4.5V to 23V input supply. The RT8284's
current mode architecture and external compensation
allow the tra nsient response to be optimized over a wide
range of loads and output capacitors. Cycle-by-cycle
current limit provides protection against shorted outputs
and soft-start eliminates input current surge during start-
up. The RT8284 also provides under voltage protection
and thermal shutdown protection. The low current (< 3μA)
shutdown mode provides output disconnect, enabling easy
power management in battery powered systems. The
RT8284 is a available in a SOP-8 and SOP-8
(Exposed Pad) pa ckage.
Features
±±
±±
±1.5% High Accuracy Feedback Voltage
Input Voltage Range : 4.5V to 23V
2A Output Current
Integrated N-MOSFETs
Current Mode Control
340kHz Fixed Frequency Operation
Output Adjusta ble Voltage Ra nge : 0.923V to 20V
Efficiency Up to 95%
Programmable Soft-Start
Sta ble with Low ESR Ceramic Output Ca pacitors
Cycle-by-Cycle Over Current Protection
In put U nder Voltage Lockout
Output Under Voltage Protection
Thermal Shutdown Protection
RoHS Compliant and Halogen Free
Applications
Wireless AP/Router
Set-Top-Box
Industrial and Commercial Low Power Systems
LCD Monitors and TVs
Green Electronics/Appliances
Point of Load Regulation of High-Performance DSPs
Pin Configurations
(TOP VIEW)
SOP-8
BOOT
VIN
SW
GND
SS
EN
FB
COMP
2
3
45
6
7
8
BOOT
VIN
SW
GND
SS
EN
FB
COMP
GND
2
3
45
6
7
8
9
SOP-8 (Exposed Pad)
Marking Information
RT8284
GSYMDNN
RT8284GS : Product Number
YMDNN : Date Code
RT8284
GSPYMDNN
RT8284GSP : Product Number
YMDNN : Date Code
Package Type
S : SOP-8
SP: SOP-8(Exposed Pad-Option 1)
RT8284
Lead Plating System
G : Green (Halogen Free and Pb Free)
RT8284GS
RT8284GSP
RT8284
2DS8284-01 March 2011www.richtek.com
Functional Pin Description
Pin No .
SOP-8
(Exposed Pad) SOP-8 Pin Name Pin Functi on
1 1 BOOT
Bootstrap for High-Side Gate Driver. Connect a 10nF or greater
ceramic capaci to r from BO O T to SW pi ns.
2 2 VIN
I nput Su ppl y Vol tage, 4.5V to 23V . Mu st bypass wi th a sui tably l ar ge
ceramic capaci to r.
3 3 SW Pha se Node. Connect this pin to external L-C filter.
4,
9 (Exp osed Pad ) 4 GND Ground. The exposed pad must be soldered to a large PCB and
conne cted t o GND fo r ma ximum pow er di ssip ati on.
5 5 FB
Feedback Input Pin. This pin is connected to the converter output. It
is used to set the output of the conver ter to regulate to the desired
value via an internal resistive divider. For an adjustable output, an
external re sistive di vid er is conn ected t o th is pin.
6 6 COMP
Compensation Node. COMP is used to compensate the regulation
control loop. Connect a series RC network from COMP to GND. In
some cases, an ad dition al capa citor f ro m COM P to GND is required.
7 7 EN
Enable Input pin. A logic high enables the converter; a logic low
forces the RT8284 into shutdown mode reducing the supply current
to less than 3μA. A tta c h th is p in to V IN with a 1 0 0k Ω pull up r esistor
for a utomati c s tart u p .
8 8 SS
Soft-Start Control Input. SS controls the soft-start period. Connect a
capacitor from SS to GND to set the soft-Start period. A 0.1μF
capacit or sets the soft-st ar t peri od to 15.5m s .
Typical Application Circuit
VOUT (V) R1 (kΩ) R2 (kΩ) RC (kΩ) CC ( nF) L ( μH) COUT (μF)
8 76.8 10 27 3.3 22 22 x 2
5 45.3 10 20 3.3 15 22 x 2
3.3 26.1 10 13 3.3 10 22 x 2
2.5 16.9 10 9.1 3.3 6.8 22 x 2
1.8 9.53 10 5.6 3.3 4.7 22 x 2
1.2 3 10 3.6 3.3 3.6 22 x 2
Recommended Component Selection
VIN
EN
GND
BOOT
FB
SW
7
5
2
3
1L
10µH
10nF
22µF x 2
R1
26.1k
R2
10k
VOUT
3.3V/2A
10µF
VIN
4.5V to 23 V RT8284
SS
8
CSS
COMP
CC
3.3nF RC
13k
CP
Open
6
4, 9 (Expos ed Pad)
CBOOT
CIN
0.1µF
COUT
REN 100k
RT8284
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DS8284-01 March 2011 www.richtek.com
Function Block Diagram
VA
+
-
+
-
+
-
UV
Comparator
Oscillator
Foldback
Control
0.5V
Internal
Regulator
+
-
2.7V
Shutdown
Compar ator
Curr ent Sense
Amplifier
BOOT
VIN
GND
SW
FB
EN
COMP
3V
5k
VA VCC
6µA
Slope Comp
Current
Comparator
+
-
0.923V
S
R
Q
Q
SS
+
-
1.2V
Lockout
Comparator
VCC
+
Error Amp
Ω130m
Ω130m
RT8284
4DS8284-01 March 2011www.richtek.com
Absolute Maximum Ratings (Note 1)
Supply Voltage, VIN ----------------------------------------------------------------------------------------------- −0.3V to 25V
Input V oltage, SW ------------------------------------------------------------------------------------------------- −0.3V to (VIN + 0.3V)
VBOOT − VSW -------------------------------------------------------------------------------------------------------- −0.3V to 6V
Other Pins Voltages----------------------------------------------------------------------------------------------- −0.3V to 6V
Power Dissipation, PD @ TA = 25°C
SOP-8----------------------------------------------------------------------------------------------------------------- 1. 111W
SOP-8 (Exposed Pad)--------------------------------------------------------------------------------------------- 1.333W
Package Thermal Resistance (Note 2)
SOP-8, θJA ----------------------------------------------------------------------------------------------------------- 90°C/W
SOP-8 (Exposed Pad), θJA --------------------------------------------------------------------------------------- 75°C
SOP-8 (Εxposed Pad), θJC --------------------------------------------------------------------------------------- 15°C
Junction T emperature --------------------------------------------------------------------------------------------- 150°C
Lead T emperature (Soldering, 10 sec.) ----------------------------------------------------------------------- 260°C
Storage T emperature Range ------------------------------------------------------------------------------------- −40°C to 150°C
ESD Susceptibility (Note 3)
HBM (Human Body Mode) --------------------------------------------------------------------------------------- 2kV
MM (Ma chine Mode) ---------------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions (Note 4)
Supply Voltage, VIN ----------------------------------------------------------------------------------------------- 4.5V to 23V
Junction T emperature Range ------------------------------------------------------------------------------------ −40°C to 125°C
Ambient T emperature Range ------------------------------------------------------------------------------------ −40°C to 85°C
Electrical Characteristics
(VIN = 12V, TA = 25°C unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit
Shut down S upply C ur rent VEN = 0V -- 0.5 3 μA
Supply Current ICC V
EN = 3 V, VFB = 1V -- 0.8 1.2 mA
Feedback Voltage VFB 4.5V ≦ VIN ≦ 23V 0.909 0.923 0.937 V
Error Amplifi er Transco n ducta nce GEA ΔIC = ±10μA -- 940 -- μA/V
High Side Switch-On Resistance RDS(ON)1 -- 130 -- mΩ
Low Side Switch-On Resistance RDS(ON)2 -- 130 -- mΩ
High Side Switch Leakage Current VEN = 0V, VSW = 0V -- 0 1 0 μA
Upp er Switch Current Li mi t Min.Duty Cy cl e, VBOOT−SW = 4.8V 3.5 4.5 -- A
Low Switch Current Limit From Drain to Source -- 1.2 -- A
COMP to Current Sense
Transconductance GCS -- 5 -- A/V
O scillator Frequency fOSC1 300 340 380 kHz
Short Circuit O sci lla tion
Frequency fOSC2 V
FB = 0V -- 110 -- kHz
Maximum Duty Cycle DMAX VFB = 0.7V -- 93 -- %
Mini mum On-Time tON -- 100 -- ns
To be continued
RT8284
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DS8284-01 March 2011 www.richtek.com
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θJA is measured in natural convection at TA = 25°C on a high-effective thermal conductivity four-layer test board,refer
to JEDEC 51-7 thermal measurement standard. The measurement case position of θJC is on the exposeed pad for
SOP-8 (Exposed Pad) package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Parameter Symbol Test Conditions Min Typ Max Unit
L o g ic High VIH 2.7 -- 5.5
EN Thr eshold Vol tage Logic Low VIL -- -- 0.4
V
Input Under V oltage Lockout Thr eshol d V IN Rising 3.8 4.2 4.5 V
Input U nder Vol ta ge Lockout Hysteresi s -- 320 -- mV
S o ft -Start Cu rre nt VSS = 0V -- 6 -- μA
S o ft -Sta rt Pe r io d CSS = 0. 1 μF -- 15.5 -- ms
Th ermal Shutdown TSD -- 150 -- °C
RT8284
6DS8284-01 March 2011www.richtek.com
Frequency vs . Temperature
300
310
320
330
340
350
360
370
380
-50 -25 0 25 50 75 100 125
Tem pera tu re ( °C)
Frequency (kHz) 1
Reference Voltage vs. Temperature
0.900
0.905
0.910
0.915
0.920
0.925
0.930
0.935
0.940
-50 -25 0 25 50 75 100 125
Temper ature ( °C)
Refer ence Vo lt ag e (V)
Typical Operating Characteristics
VIN = 12V, VOUT = 3.3V, IOUT = 0A
Output Vo ltage vs. Output Current
3.24
3.25
3.26
3.27
3.28
3.29
3.30
3.31
3.32
3.33
3.34
3.35
3.36
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
Ou tpu t Current (A)
Output Voltage (V)
VOUT = 3.3V
VIN = 4.5V
VIN = 12V
VIN = 23V
Reference Voltage v s. Input Voltage
0.900
0.905
0.910
0.915
0.920
0.925
0.930
0.935
0.940
4 6 81012141618202224
Input Voltage (V)
Refer ence Voltage (V)
VIN = 4.5V to 23V, VOUT = 3.3V, IOUT = 0A
Efficiency vs. Output Current
0
10
20
30
40
50
60
70
80
90
100
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
Output Current (A)
Eff ici ency (%)
VIN = 4.5V
VIN = 12V
VIN = 23V
VOUT = 3.3V
VIN = 12V, VOUT = 3.3V
Frequency vs. Input Voltage
300
310
320
330
340
350
360
370
380
4 6 8 1012141618202224
In put Vo l ta g e (V)
Frequency (k Hz) 1
VOUT = 3.3V, IOUT = 0A
RT8284
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DS8284-01 March 2011 www.richtek.com
Current Limit VS. Temperature
3.0
3.5
4.0
4.5
5.0
5.5
6.0
-50 -25 0 25 50 75 100 125
Temprature (°C)
Current Li mit (A)
VIN = 12V, VOUT = 3.3V
Current Limit vs. Duty cycle
3.0
3.5
4.0
4.5
5.0
5.5
6.0
0 102030405060708090100
Duty Cy cle (% )
Curr ent Lim it (A)
VIN = 4.5V to 23V, VOUT = 3.3V
Time (100μs/Div)
VOUT
(100mV/Div)
IOUT
(1A/Div) VIN = 12V, VOUT = 3.3V, IOUT = 0A to 2A
Load Transient Response
Switching
Time (1μs/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 2A
IL
(1A/Div)
VOUT
(10mV/Div)
VSW
(10V/Div)
Load Transient Response
Time (100μs/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 1A to 2A
IOUT
(1A/Div)
VOUT
(100mV/Div)
Switching
Time (1μs/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 1A
IL
(1A/Div)
VOUT
(10mV/Div)
VSW
(10V/Div)
RT8284
8DS8284-01 March 2011www.richtek.com
Power On from VIN
Time (5ms/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 2A
IL
(2A/Div)
VOUT
(2V/Div)
VIN
(5V/Div)
Power Off from EN
Time (5ms/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 2A
VOUT
(2V/Div)
VEN
(5V/Div)
IOUT
(2A/Div)
Power Off from VIN
Time (5ms/Div)
IL
(2A/Div)
VOUT
(2V/Div)
VIN
(5V/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 2A
Power On from EN
Time (5ms/Div)
VOUT
(2V/Div)
VEN
(5V/Div)
VIN = 12V, VOUT = 3.3V, IOUT = 2A
IOUT
(2A/Div)
RT8284
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DS8284-01 March 2011 www.richtek.com
Application Information
The RT8284 is a synchronous high voltage buck converter
that can support the input voltage range from 4.5V to 23V
a nd the output current can be up to 2A.
Output Voltage Setting
The resistive divider allows the FB pin to sense the output
voltage a s shown in Figure 1.
⎛⎞
+
⎜⎟
⎝⎠
OUT FB R1
V = V1
R2
Where VFB is the feedback reference voltage 0.923V (typ.).
Extern al Bootstra p Diode
Connect a 10nF low ESR cera mic ca pa citor between the
BOOT pin and SW pin. This capacitor provide s the gate
driver voltage for the high side MOSFET.
It is recommended to add an external bootstrap diode
between an external 5V and BOOT pin for efficiency
improvement when input voltage is lower than 5.5V or duty
ratio is higher than 65% .The bootstrap diode can be a
low cost one such a s IN4148 or BAT54. The extern al 5V
can be a 5V fixed input from system or a 5V output of the
RT8284. Note that the external boot voltage must be lower
than 5.5V
Figure 2. External Bootstra p Diode
Figure 1. Output Voltage Setting
Soft-Start
The RT8284 contains an external soft-start clamp that
gradually raises the output voltage. The soft-start timming
can be progra med by the external ca pacitor between SS
pin a nd GND. The chip provides a 6μA charge current for
the external capacitor. If 0.1μF capacitor is used to set
the soft-start, it's period will be 15.5ms (typ.).
Chip Enable Operation
The EN pin is the chip enable input. Pulling the EN pin
low (<0.4V) will shutdown the device. During shutdown
mode, the RT8284 quiescent current drops to lower than
3μA. Driving the EN pin high ( > 2.7V, < 5.5V) will turn on
the device again. For external timing control (e.g.RC),
the EN pin can also be externally pulled high by adding a
REN* resistor and CEN* capacitor from the VIN pin
(see Figure 5).
An external MOSFET ca n be added to imple ment digital
control on the EN pin when no system voltage above 2.5V
is available, as shown in Figure 3. In this ca se, a 100kΩ
pull-up resistor, REN, is connected between VIN and the
EN pin. MOSFET Q1 will be under logic control to pull
down the EN pin.
RT8284
GND
FB
R1
R2
VOUT
The output voltage is set by an external resistive voltage
divider a ccording to the following equation :
SW
BOOT
5V
RT8284 10nF
Figure 3. Enable Control Circuit for Logic Control with
Low V oltage
To prevent en abling circuit when VIN is smaller than the
VOUT target value, a resistive voltage divider can be pla ced
between the input voltage a nd ground a nd connected to
the EN pin to adjust IC lockout threshold, as shown in
Figure 4. For exa mple, if an 8V output voltage is regulated
from a 12V input voltage, the resistor REN2 can be selected
to set input lockout threshold larger tha n 8V.
VIN
EN
GND
BOOT
FB
SW
7
5
2
3
1
L
R1
R2
VOUT
Chip Enable
VIN RT8284
SS
8
CSS COMP CCRC
CP
6
4,
9 (Exposed Pad)
CBOOT
COUT
CIN
REN
Q1
100k
RT8284
10 DS8284-01 March 2011www.richtek.com
OUT OUT
L(MAX) IN(MAX)
VV
L = 1
fI V
⎡⎤⎡ ⎤
×−
⎢⎥⎢ ⎥
×Δ
⎣⎦⎣ ⎦
The inductor's current rating (caused a 40°C temperature
rising from 25°C ambient) should be greater than the
maxi mum load current and its saturation current should
be greater tha n the short circuit peak current limit. Plea se
see Table 2 for the inductor selection reference.
Ta ble 2. Suggested Inductors for Typical
Application Circuit
Compo nen t
Supplier Series Dimension s
(mm)
TDK VLF10045 10 x 9.7 x 4.5
TDK SLF 12565 12.5 x 12.5 x 6.5
TAIYO
YUDEN NR80 40 8 x 8 x 4
OUT IN
RMS OUT(MAX) IN OUT
VV
I = I 1
VV
−
CIN and COUT Selection
The input capacitance, CIN, is needed to filter the
tra pezoidal current at the source of the high side MOSFET .
To prevent large ripple current, a low ESR input ca pacitor
sized for the maximum RMS current should be used. The
RMS current is given by :
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT / 2. This simple worst-case condition is
commonly used for design because even significant
deviations do not offer much relief.
Choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to
meet size or height requirements in the design.
For the input capacitor, one 10μF low ESR ceramic
capacitors are recommended. For the recommended
ca pacitor , plea se refer to table 3 for more detail.
The selection of COUT is determined by the required ESR
to minimize voltage ripple.
Moreover, the amount of bulk capacitance is also a key
for COUT selection to ensure that the control loop is stable.
Loop stability can be checked by viewing the load transient
respon se as described in a later section.
The output ripple, ΔVOUT , is determined by :
OUT L OUT
1
VIESR
8fC
⎡⎤
Δ≤Δ +
⎢⎥
⎣⎦
The output ripple will be highest at the maximum input
voltage since ΔIL increases with input voltage. Multiple
ca pa citors pla ced in parallel may be needed to meet the
ESR and RMS current handling requirement. Dry tantalum,
special polymer, aluminum electrolytic and ceramic
capacitors are all available in surface mount
⎡⎤⎡ ⎤
Δ×−
⎢⎥⎢ ⎥
×
⎣⎦⎣ ⎦
OUT OUT
LIN
VV
I = 1
fL V
Having a lower ripple current reduces not only the ESR
losses in the output ca pacitors but also the output voltage
ripple. High frequency with small ripple current can achieve
highest efficiency operation. However , it requires a large
inductor to achieve this goal.
For the ripple current selection, the value of ΔIL = 0.24(IMAX)
will be a reasonable starting point. The largest ripple
current occurs at the highest VIN. To guarantee that the
ripple current stays below the specified maximum, the
inductor value should be chosen according to the following
equation :
Hiccup Mode
For the RT8284, it provides Hiccup Mode Under Voltage
Protection (UVP). When the FB voltage drops below 0.5V,
VFB, the UVP function will be triggered and the RT8284
will shut down for a period of time and then recover
automatically. The Hiccup Mode UVP can reduce input
current in short-circuit conditions.
Inductor Selection
The inductor value and operating frequency determine the
ripple current according to a specific input and output
voltage. The ripple current ΔIL increases with higher VIN
and decrea ses with higher inducta nce.
Figure 4. The Re sistors ca n be Selected to Set IC
Lockout Threshold
VIN
EN
GND
BOOT
FB
SW
7
5
2
3
1
L
R1
R2
VOUT
VIN
RT8284
SS
8
CSS COMP CCRC
CP
6
4,
9 (Exposed Pad)
CBOOT
COUT
CIN
100k 8V
12V
REN2
REN1 10µF
RT8284
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DS8284-01 March 2011 www.richtek.com
pa ckages.Special polymer ca pacitors offer very low ESR
value. However, it provides lower ca pacitance density than
other types. Although T antalum capacitors have the highest
ca pa citance density , it is i mportant to only use type s that
pass the surge test for use in switching power supplie s.
Aluminum electrolytic ca pacitors have significantly higher
ESR. However, it can be used in cost-sensitive a pplications
for ripple current rating and long term reliability
considerations. Ceramic capacitors have excellent low
ESR characteristics but can have a high voltage coefficient
a nd audible piezoelectric effe cts. The high Q of ceramic
ca pacitors with tra ce inductance can also lead to significant
ringing.
Higher values, lower cost ceramic capacitors are now
becoming available in smaller ca se sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However , care must
be taken when these capacitors are used at input and
output. When a ceramic capacitor is used at the input
a nd the power is supplied by a wall ada pter through long
wires, a loa d step at the output ca n induce ringing at the
input, VIN. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at VIN large enough to da mage the
part.
Checking T ransient Re sponse
The regulator loop response ca n be che cked by looking
at the load transient response. Switching regulators ta ke
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to ΔILOAD (ESR) also begins to charge or discharge
COUT generating a feedba ck error signal for the regulator
to return VOUT to its steady-state value. During this
recovery time, VOUT can be monitored for overshoot or
ringing that would indicate a stability problem.
EMI Consideration
Since para sitic inductance and ca pacitance effects in PCB
circuitry would cause a spike voltage on SW pin when
high-side MOSFET is turned-on/off, this spike voltage on
SW may impact on EMI performance in the system. In
order to enhance EMI performance, there are two methods
to suppress the spike voltage. One is to place an R-C
snubber between SW and GND a nd make them a s close
a s possible to the SW pin (see Figure 5). Another method
is adding a resistor in series with the bootstrap
ca pacitor, CBOOT. But this method will decrea se the driving
capability to the high-side MOSFET. It is strongly
recommended to reserve the R-C snubber during PCB
layout for EMI i mprovement. Moreover , reducing the SW
trace area and keeping the main power in a small loop will
be helpful on EMI performance. For detailed PCB layout
guide, plea se refer to the section of Layout Consideration.
Figure 5. Reference Circuit with Snubber and Enable Timing Control
VIN
EN
GND
BOOT
FB
SW
7
5
2
3
1
L
10µH
10nF
22µFx2
R1
26.1k
R2
10k
VOUT
3.3V/2A
10µF
Chip Enabl e
VIN
4.5V to 23V RT8284
SS
8
CSS
0.1µF COMP
CC
3.3nF RC
13k
CP
NC
6
4,
9 (Exposed Pad)
CBOOT
COUT
CIN
RBOOT*
RS*
CS*
REN*
CEN*
* : Opti onal
RT8284
12 DS8284-01 March 2011www.richtek.com
Figure 7. Derating Curves for RT8284 Package
(a) Copper Area = (2.3 x 2.3) mm2, θJA = 75°C/W
(b) Copper Are a = 10mm2, θJA = 64°C/W
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
0 25 50 75 100 125
Ambient Temperature (°C)
Power Di ssipation (W)
Copper Area
70mm2
50mm2
30mm2
10mm2
Min.Layout
SOP-8
Four-Layer PCB
Thermal Considerations
For continuous operation, do not exceed absolute
maximum operation junction temperature 125°C. The
maximum power dissipation depends on the thermal
resistance of IC package, PCB layout, the rate of
surroundings airflow and temperature difference between
junctions to a mbient. The maximum power dissipation can
be calculated by following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
Where TJ(MAX) is the maximum operation junction
temperature, TA is the a mbient temperature a nd the θJA
is the junction to ambient thermal resista nce.
For recommended operating conditions specification of
RT8284, the maximum junction temperature is 125°C. The
junction to ambient thermal resistance θJA is layout
dependent. For SOP-8 (Exposed Pad) package, the
thermal resistance θJA is 75°C/W on the standard JEDEC
51-7 four layers thermal test board. For SOP-8 package,
the thermal resistance θJA is 90°C/W on the standard
JEDEC 51-7 four layers thermal test board. The maximum
power dissipation at TA = 25°C can be calculated by
following formula :
PD(MAX) = (125°C − 25°C) / (75°C/W) = 1.33W
(min. copper area PCB layout with SOP-8 Exposed Pad)
PD(MAX) = (125°C − 25°C) / (49°C/W) = 2.04W
(70mm2 copper area PCB layout with SOP-8 Exposed
Pad)
PD(MAX) = (125°C − 25°C) / (90°C/W) = 1.11W
(min. copper area PCB layout with SOP-8)
The thermal resistance θJA of SOP-8 (Exposed Pad) is
determined by the pa ck age architecture design and the
PCB layout design. However, the package architecture
design had been designed. If possible, it's useful to increase
thermal performance by the PCB layout copper design.
The thermal resista nce θJA ca n be decre ased by adding
copper area under the exposed pad of SOP-8 (Exposed
Pad) pa ckage.
As shown in Figure 6, the a mount of copper area to which
the SOP-8 (Exposed Pad) is mounted affects thermal
performance. When mounted to the standard SOP-8
(Exposed Pad) pad (Figure 6.a), θJA is 75°C/W . Adding
copper area of pad under the SOP-8 (Exposed Pad) (Figure
6.b) reduces the θJA to 64°C/W . Even further , increasing
the copper area of pad to 70mm2 (Figure 6.e) reduces the
θJA to 49°C/W.
The maximum power dissipation depends on operating
ambient temperature for fixed TJ(MAX) and thermal
resistance θJA. For RT8284 pa ckages, the Figure 7 of de-
rating curves allows the designer to see the effect of rising
a mbient temperature on the maximum power dissipation
allowed.
RT8284
13
DS8284-01 March 2011 www.richtek.com
(c) Copper Area = 30mm2 , θJA = 54°C/W
(d) Copper Are a = 50mm2 , θJA = 51°C/W
Figure 6. Themal Resistance vs. Copper Area Layout
Design
(e) Copper Are a = 70mm2 , θJA = 49°C/W
Layout Consideration
For best performance of the RT8284, the follow layout
giidelines must be strictly followed.
`Input capacitor must be placed as close to the IC as
possible.
`SW should be connected to inductor by wide a nd short
tra ce. Keep sensitive components away from this trace.
`The feedba ck components must be connected as close
to the device a s possible
Figure 8. PCB Layout Guide
VIN
VOUT
GND
CIN
GND
CP
CC
RC
SW
VOUT
COUT L1
R1
R2
Input capacitor must be placed
as close to the IC as possibl e.
SW should be connected to inductor by
wide and short trace. Keep sensitive
components away from this trace.
The feedback components
must be connected as close
to the device as possi bl e.
BOOT
VIN
SW
GND
SS
EN
FB
COMP
GND
2
3
45
6
7
8
9
CSS
RSCS
GND
VIN
REN
Table 3. Suggested Capacitors for CIN and COUT
Location Component Supplier Part No. Capacitance (μF) Case Size
CIN MURATA GRM31CR61E106K 10 1206
CIN TDK C3225X5R1E106K 10 1206
CIN TAIYO YUDEN TMK316BJ106ML 10 1206
COUT MURATA GRM31CR60J476M 47 1206
COUT TDK C3225X5R0J476M 47 1210
COUT MURATA GRM32ER71C226M 22 1210
COUT TDK C3225X5R1C22M 22 1210
RT8284
14 DS8284-01 March 2011www.richtek.com
A
B
J
F
H
M
C
D
I
8-Lead SOP Plastic Package
Dimensions In Millimeters Dimensions In Inches
Symbol
Min Max Min Max
A 4.801 5.004 0.189 0.197
B 3.810 3.988 0.150 0.157
C 1.346 1.753 0.053 0.069
D 0.330 0.508 0.013 0.020
F 1.194 1.346 0.047 0.053
H 0.170 0.254 0.007 0.010
I 0.050 0.254 0.002 0.010
J 5.791 6.200 0.228 0.244
M 0.400 1.270 0.016 0.050
Outline Dimension
RT8284
15
DS8284-01 March 2011 www.richtek.com
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
Richtek Technology Corporation
Headquarter
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Richtek Technology Corporation
Taipei Office (Marketing)
5F, No. 95, Minchiuan Road, Hsintien City
Taipei County, Taiwan, R.O.C.
Tel: (8862)86672399 Fax: (8862)86672377
Email: marketing@richtek.com
A
B
J
F
H
M
C
D
I
Y
X
EXPOSED THERMAL PAD
(Bottom of Package)
8-Lead SOP (Exposed Pad) Plastic Package
Symbol
Dimensions In Millimeters Dimensions In Inches
Min Max Min Max
A 4.801 5.004 0.189 0.197
B 3.810 4.000 0.150 0.157
C 1.346 1.753 0.053 0.069
D 0.330 0.510 0.013 0.020
F 1.194 1.346 0.047 0.053
H 0.170 0.254 0.007 0.010
I 0.000 0.152 0.000 0.006
J 5.791 6.200 0.228 0.244
M 0.406 1.270 0.016 0.050
Option 1 X 2.000 2.300 0.079 0.091
Y 2.000 2.300 0.079 0.091
Option 2 X 2.100 2.500 0.083 0.098
Y 3.000 3.500 0.118 0.138
