HEF4028BPN - NXP Semiconductors / Philips Semiconductors

1. General description

The HEF4028B is a 4-bit BCD to decimal decoder, a 4-bit BCO to octal decoder with

active LOW enable or a n 8-output (Y0 to Y7 ) inverting demultip lexer. The output s are fully

buffered for best performance.

When used as a BCD to decimal decoder a 1-2-4-8 BCD code applied to inputs A0 to A3

causes the selected output to be HIGH. The other nine outputs will be LOW.

To use the HEF4028B as a BCO to octal decoder, input A3 is an active LOW enable pin

and outputs Y8 an d Y9 are not used. A 1-2-4 BCO code applied to input s A0 to A2 causes

the selected output (Y0 to Y7) to be HIGH. The other seven outputs will be LOW. When

A3 is HIGH outputs (Y0 to Y7) will be forced LOW.

When used as an 8-output (Y0 to Y7) inverting demultiplexer A0 to A2 are used as

address inputs and A3 is the data input. Outputs Y8 and Y9 are not used.

It operates over a recommended VDD power supply r ange of 3 V to 15 V referenced to VSS

(usually ground). Unused inputs must be connected to VDD, VSS, or another input. It is

also suitable for use over the full industrial (−40 °C to +85 °C) temperature range.

2. Features

Fully static operation

5 V, 10 V, and 15 V pa rametric ratings

Standardized symmetrical output characteristics

Operates across the full industrial temperature range −40 °C to +85 °C

Complies with JEDEC standard JESD 13-B

3. Applications

Industrial

4. Ordering information

HEF4028B

BCD to decimal decoder

Rev. 06 — 25 November 2009 Product data sheet

Table 1. Ordering information

All types operate from

−

C to +85

Type number Package

Name Description Version

HEF4028BP DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4

HEF4028BT SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1

Product data sheet Rev. 06 — 25 November 2009 2 of 12

NXP Semiconductors HEF4028B

BCD to decimal decoder

5. Functional diagram

Fig 1. Functional di agram

001aae59

DECODER

A0 A1 A2

10 13 12 11

Fig 2. Logic diag ram

001aae600

Product data sheet Rev. 06 — 25 November 2009 3 of 12

NXP Semiconductors HEF4028B

BCD to decimal decoder

6. Pinning information

6.1 Pinning

6.2 Pin description

7. Functional description

Fig 3. Pin configuratio n

HEF4028B

Y4 V

Y2 Y3

Y0 Y1

Y7 A1

Y9 A2

Y5 A3

Y6 A0

001aae599

Table 2. Pin description

Symbol Pin Description

Y0 to Y9 3, 14, 2, 15, 1, 6, 7, 4, 9, 5 output (active HIGH)

VSS 8 ground supply voltage

A0 to A3 10, 13, 12, 11 address input

VDD 16 supply voltage

Table 3. Function table [1]

Inputs Outputs

A3 A2 A1 A0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Y9

L L L LHLLLLLLLLL

L L L HLHLLLLLLLL

L L H LLLHLLLLLLL

L L H HLLLHLLLLLL

L H L LLLLLHLLLLL

L H L HLLLLLHLLLL

L H H LLLLLLLHLLL

L H H HLLLLLLLHLL

H L L LLLLLLLLLHL

Product data sheet Rev. 06 — 25 November 2009 4 of 12

NXP Semiconductors HEF4028B

BCD to decimal decoder

[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care.

[2] Extraordinary states.

8. Limiting values

[1] For DIP16 package: Ptot derates linearly with 12 mW/K above 70 °C.

[2] For SO16 package: Ptot derates linearly with 8 mW/K above 70 °C.

9. Recommended operating conditions

H L L HLLLLLLLL LH

H L H XLLLLLLLLLL [2]

H H X XLLLLLLLLLL [2]

Table 3. Function table [1] …continued

Inputs Outputs

A3 A2 A1 A0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Y9

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

VDD supply voltage −0.5 +18 V

IIK input clamping current VI<−0.5 V or VI>V

DD + 0.5 V - ±10 mA

VIinput voltage −0.5 VDD + 0.5 V

IOK output clamping current VO<−0.5 V or VO>V

DD + 0.5 V - ±10 mA

II/O input/output current - ±10 mA

IDD supply current - 50 mA

Tstg storage temperature −65 +150 °C

Tamb ambient temperature −40 +85 °C

Ptot total power dissipation Tamb = −40 °C to +85 °C

DIP16 package [1] - 750 mW

SO16 package [2] - 500 mW

P power dissipation per output - 100 mW

Table 5. Recommended operating con ditions

Symbol Parameter Conditions Min Typ Max Unit

VDD supply voltage 3 - 15 V

VIinput voltage 0 - VDD V

Tamb ambient temperature in free air −40 - +85 °C

Δt/ΔV input transition rise and fall rate VDD = 5 V - - 6.25 μs/V

VDD = 10 V - - 0.5 μs/V

VDD = 15 V - - 0.08 μs/V

Product data sheet Rev. 06 — 25 November 2009 5 of 12

NXP Semiconductors HEF4028B

BCD to decimal decoder

10. Static characteristics

11. Dynamic characteristics

Table 6. Static chara cteristics

VSS = 0 V; VI = VSS or VDD.

Symbol Parameter Conditions VDD Tamb = −40 °C Tamb = 25 °C Tamb = 85 °CUnit

Min Max Min Max Min Max

VIH HIGH-level input voltage |IO| < 1 μA 5 V 3.5 - 3.5 - 3.5 - V

10 V 7.0 - 7.0 - 7.0 - V

15 V 11.0 - 11.0 - 11.0 - V

VIL LOW-level input voltage |IO| < 1 μA 5 V - 1.5 - 1.5 - 1.5 V

10 V - 3.0 - 3.0 - 3.0 V

15 V - 4.0 - 4.0 - 4.0 V

VOH HIGH-level output voltage |IO| < 1 μA 5 V 4.95 - 4.95 - 4.95 - V

10 V 9.95 - 9.95 - 9.95 - V

15 V 14.95 - 14.95 - 14.95 - V

VOL LOW-level output voltage |IO| < 1 μA 5 V - 0.05 - 0.05 - 0.05 V

10 V - 0.05 - 0.05 - 0.05 V

15 V - 0.05 - 0.05 - 0.05 V

IOH HIGH-level output current VO = 2.5 V 5 V −1.7 - −1.4 - −1.1 - mA

VO = 4.6 V 5 V −0.52 - −0.44 - −0.36 - mA

VO = 9.5 V 10 V −1.3 - −1.1 - −0.9 - mA

VO = 13.5 V 15 V −3.6 - −3.0 - −2.4 - mA

IOL LOW-level output current VO = 0.4 V 5 V 0.52 - 0.44 - 0.36 - mA

VO = 0.5 V 10 V 1.3 - 1.1 - 0.9 - mA

VO = 1.5 V 15 V 3.6 - 3.0 - 2.4 - mA

IIinput leakage current 15 V - ±0.3 - ±0.3 - ±1.0 μA

IDD supply current IO = 0A 5V - 20 - 20 - 150 μA

10 V - 40 - 40 - 300 μA

15 V - 80 - 80 - 600 μA

CIinput capacitance - - - - 7.5 - - pF

Table 7. Dynamic characteristics

VSS = 0 V; Tamb = 25

Symbol Parameter Conditions VDD Extrapolation formula Min Typ Max Unit

tPHL HIGH to LOW

propagation delay An to Yn;

see Figure 4 5V [1] 73 ns + (0.55 ns/pF )C L- 100 200 ns

10 V 29 ns + (0.23 ns/pF ) C L-4080ns

15 V 22 ns + (0.16 ns/pF ) C L-3060ns

tPLH LOW to HIGH

propagation delay An to Yn;

see Figure 4 5V [1] 63 ns + (0.55 ns/pF )C L- 90 180 ns

10 V 29 ns + (0.23 ns/pF ) C L-4080ns

15 V 22 ns + (0.16 ns/pF ) C L-3060ns

Product data sheet Rev. 06 — 25 November 2009 6 of 12

NXP Semiconductors HEF4028B

BCD to decimal decoder

[1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas show n (CL in pF).

12. Waveforms

tttransition time see Figure 4 5V [1] 10 ns + (1.00 ns/pF)CL- 60 120 ns

10 V 9 ns + (0.42 ns/pF)CL-3060ns

15 V 6 ns + (0.28 ns/pF)CL-2040ns

Table 7. Dynamic characteristics …continued

VSS = 0 V; Tamb = 25

Symbol Parameter Conditions VDD Extrapolation formula Min Typ Max Unit

Table 8. Dynamic power dissipation PD

PD can be calculated from the formulas shown. VSS = 0 V; tr = tf

≤

20 ns; Tamb = 25

Symbol Parameter VDD Typical form ula for PD (μW) where:

PDdynamic power

dissipation 5V P

D = 350 × fi + Σ(fo × CL) × VDD2fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

VDD = supply voltage in V;

Σ(fo × CL) = sum of the outputs.

10 V PD = 2200 × fi + Σ(fo × CL) × VDD2

15 V PD = 7350 × fi + Σ(fo × CL) × VDD2

Output shown going high when address input goes low, see Table 3.

Measurement points are given in Table 9.

Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.

Fig 4. Input rise and fall times, propagation delays and output transition times

An input

Yn output

tPLH

tPHL

VSS

VOH

VOL

tTLH

tTHL

90 %

10 %

001aah85

Table 9. Measurement points

Supply voltage Input Output

VDD VMVM

5 V to 15 V 0.5VDD 0.5VDD

Product data sheet Rev. 06 — 25 November 2009 7 of 12

NXP Semiconductors HEF4028B

BCD to decimal decoder

a. Input waveforms

b. Test circuit

Test data is given in Table 10.

Definitions for test circuit:

DUT = Device Under Test;

CL= load capacitance including jig and probe capacitance;

RT= termination resistance should be equal to the output impedance Zo of the pulse generator.

Fig 5. Test circuit for switching time s

10 %

90 %

0 V

negative

pulse

positive

pulse

0 V

90 %

10 %

001aaj78

VDD

VIVO

001aag18

DUT

Table 10. Test data

Supply voltage Input Load

VDD VItr, tfCL

5 V to 15 V VSS or VDD ≤20 ns 50 pF

Product data sheet Rev. 06 — 25 November 2009 8 of 12

NXP Semiconductors HEF4028B

BCD to decimal decoder

13. Package outline

Fig 6. Package outline SOT38-4 (DIP16)

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

SOT38-4 95-01-14

03-02-13

(e )

seating plane

pin 1 index

0 5 10 mm

scale

Note

1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.

UNIT A

max. 12 b1(1) (1) (1)

b2cD E e M Z

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

min. A

max. bmax.

1.73

1.30

0.53

0.38

0.36

0.23

19.50

18.55

6.48

6.20

3.60

3.05 0.2542.54 7.62 8.25

7.80

10.0

8.3 0.764.2 0.51 3.2

inches 0.068

0.051

0.021

0.015

0.014

0.009

1.25

0.85

0.049

0.033

0.77

0.73

0.26

0.24

0.14

0.12 0.010.1 0.3 0.32

0.31

0.39

0.33 0.030.17 0.02 0.13

IP16: plastic dual in-line package; 16 leads (300 mil) SOT38

-4

Product data sheet Rev. 06 — 25 November 2009 9 of 12

NXP Semiconductors HEF4028B

BCD to decimal decoder

Fig 7. Package outline SOT109-1 (SO16)

detail X

vMA

(A )

pin 1 index

UNIT A

max. A1A2A3bpcD

(1) E(1) (1)

ELL

pQZywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

inches

1.75 0.25

0.10

1.45

1.25 0.25 0.49

0.36

0.25

0.19

10.0

9.8

4.0

3.8 1.27 6.2

5.8

0.7

0.6

0.7

0.3 8

0.25 0.1

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Note

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

1.0

0.4

SOT109-1 99-12-27

03-02-19

076E07 MS-012

0.069 0.010

0.004

0.057

0.049 0.01 0.019

0.014

0.0100

0.0075

0.39

0.38

0.16

0.15 0.05

1.05

0.041

0.244

0.228

0.028

0.020

0.028

0.012

0.01

0.25

0.01 0.004

0.039

0.016

0 2.5 5 mm

scale

O16: plastic small outline package; 16 leads; body width 3.9 mm SOT109

-1

Product data sheet Rev. 06 — 25 November 2009 10 of 12

NXP Semiconductors HEF4028B

BCD to decimal decoder

14. Abbreviations

15. Revision history

Table 11. Abbreviations

Acronym Description

BCD Binary Coded Decimal

BCO Binary Coded Octal

Table 12. Revision history

Document ID Release date Data sheet status Change notice Supersedes

HEF4028B_6 20091125 Product data sheet - HEF4028B_5

Modifications: •Section 9 “Recommended operating conditions”, Δt/ΔV values updated.

HEF4028B_5 20090707 Produ ct data sheet - HEF4028B_4

HEF4028B_4 20090304 Product data sheet - HEF4028B_CNV_3

HEF4028B_CNV_3 19950101 Product specification - HEF4028B_CNV_2

HEF4028B_CNV_2 19950101 Product specification - -

Product data sheet Rev. 06 — 25 November 2009 11 of 12

NXP Semiconductors HEF4028B

BCD to decimal decoder

16. Legal information

16.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term ‘short data sheet’ is explained in section “Definitions”.

[3] The product status of de vice(s) descr ibed in th is document m ay have cha nged since thi s document w as publish ed and may di ffe r in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

16.2 Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warrant ies as to t he accuracy or completeness of

information included herein and shall have no liab ility for the consequences of

use of such information.

Short data sheet — A short dat a sheet is an extract from a full data sheet

with the same product type number(s) and tit le. A short data sh eet is intended

for quick reference only and shou ld not b e relied u pon to cont ain det ailed and

full information. For detailed and full informatio n see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales

office. In case of any inconsistency or conflict with the short data sheet, the

full data sheet shall pre va il.

16.3 Disclaimers

General — In formation in this document is beli eved to be accurate and

reliable. However, NXP Semiconductors d oes not give any represent ations or

warranties, expressed or impli ed, as to the accuracy or completeness of such

information and shall have no liability for th e co nsequences of use of such

information.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all informa tion supplied prior

to the publication hereof .

Suitability for use — NXP Semiconductors products are not designed,

authorized or warranted to be suitable for use in medical, military, aircraft,

space or life support equipment, nor in app lications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in personal injury, death or severe property or environmental

damage. NXP Semiconductors accepts no liab ility for inclusion and/or use of

NXP Semiconductors products in such equipment or applications and

therefore such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these

products are for il lustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

specified use without further testing or modification.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ra tings System of IEC 60134) may cause permanent

damage to the device. Limiting values are stress ratings only and operation of

the device at these or any other co nditions above those given in the

Characteristics sections of this document is not implied. Exposure to limiting

values for extended periods may af fect device reliability.

Terms and conditions of sale — NXP Semiconductors products are sold

subject to the general terms and conditions of commercial sale, as published

at http://www.nxp.com/profile/terms, including those pertaining to warranty,

intellectual property rights infringement and limitation of liability, unless

explicitly otherwise agreed to in writing by NXP Semiconductors. In case of

any inconsistency or conflict between inf ormation in this document and such

terms and conditions, the latter will prevail.

No offer to sell or license — Not hing in this document may be interpret ed or

construed as an of fer t o sell product s that is open for accept ance or the gr ant,

conveyance or implication of any license under any copyrights, paten ts or

other industrial or intellectual property right s.

Export control — This document as well as the item(s) described herein

may be subject to export control regulatio ns. Export might require a prior

authorization from national authorities.

16.4 Trademarks

Notice: All refe renced brands, produc t names, service names and trademarks

are the property of their respective ow ners.

17. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Document status[1][2] Product status[3] Definition

Objective [short] data sheet Development This document contain s data from the objective specification for product develop ment.

Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.

Product [short] data sheet Production This document contains the product specification.

NXP Semiconductors HEF4028B

BCD to decimal decoder

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of rele ase: 25 November 2009

Document identifier: HEF4028B_6

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

18. Contents

1 General description. . . . . . . . . . . . . . . . . . . . . . 1

2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

4 Ordering information. . . . . . . . . . . . . . . . . . . . . 1

5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2

6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 3

6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3

7 Functional description . . . . . . . . . . . . . . . . . . . 3

8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4

9 Recommended operating conditions. . . . . . . . 4

10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5

11 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5

12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8

14 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 10

15 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10

16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 11

16.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11

16.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

16.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 11

16.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 11

17 Contact information. . . . . . . . . . . . . . . . . . . . . 11

18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12