AO4882
40V Dual N-Channel MOSFET
General Description Product Summary
V
DS
I
D
(at V
GS
=10V) 8A
R
DS(ON)
(at V
GS
=10V) < 19mΩ
R
DS(ON)
(at V
GS
=4.5V) < 27mΩ
100% UIS Tested
100% R
g
Tested
Symbol
V
DS
The AO4882 uses advanced trench technology to provide
excellent R
DS(ON)
with low gate charge. This is an all
purpose device that is suitable for use in a wide range of
power conversion applications.
V
Maximum UnitsParameter
Absolute Maximum Ratings T
A
=25°C unless otherwise noted
40V
Drain-Source Voltage
40
G2
D2
S2
G1
D1
S1
G1
S1
G2
S2
D1
D2
D2
2
4 5
1
3
8
6
7
Top View
SOIC-8
Top View Bottom View
Pin1
V
DS
V
GS
I
DM
I
AS
E
AS
T
J
, T
STG
Symbol
t ≤ 10s
Steady-State
Steady-State
R
θJL
Maximum Junction-to-Lead °C/W
°C/W
Maximum Junction-to-Ambient
A D
32 90
40
T
A
=25°C
T
A
=70°C
Power Dissipation
B
P
D
Avalanche energy L=0.1mH
C
Pulsed Drain Current
C
Continuous Drain
Current
T
A
=25°C mJ
Avalanche Current
C
11 A15
A
I
D
8
6
40
V
V±20Gate-Source Voltage
Drain-Source Voltage
40
UnitsParameter Typ Max °C/W
R
θJA
48
74 62.5
Maximum Junction-to-Ambient
A
1.3
T
A
=70°C
Junction and Storage Temperature Range -55 to 150 °C
Thermal Characteristics
W
2
Rev 0 : Dec 2011
www.aosmd.com Page 1 of 5
AO4882
Symbol Min Typ Max Units
BV
DSS
40 V
V
DS
=40V, V
GS
=0V 1
T
J
=55°C 5
I
GSS
±100 nA
V
GS(th)
Gate Threshold Voltage 1.4 1.9 2.4 V
I
D(ON)
40 A
15.4 19
T
J
=125°C 22.5 29
21 27 mΩ
g
FS
33 S
V
SD
0.75 1 V
I
S
2.5 A
C
iss
415 pF
C
oss
112 pF
C
rss
11 pF
R
g
1 2.2 3.5 Ω
Q
g
(10V) 6.5 12 nC
Q
g
(4.5V) 3 6 nC
Q
gs
1.2 nC
Q
gd
1.1 nC
t
D(on)
4 ns
t
3
ns
Electrical Characteristics (T
J
=25°C unless otherwise noted)
STATIC PARAMETERS Parameter Conditions
Drain-Source Breakdown Voltage I
D
=250µA, V
GS
=0V
V
GS
=10V, V
DS
=5V
V
GS
=10V, I
D
=8A
R
DS(ON)
Static Drain-Source On-Resistance
I
DSS
µA
V
DS
=V
GS
I
D
=250µA
V
DS
=0V, V
GS
=±20V
Zero Gate Voltage Drain Current
Gate-Body leakage current
mΩ
On state drain current
V
GS
=4.5V, I
D
=4A
Forward Transconductance
Diode Forward Voltage
V
=10V, V
=20V, R
=2.5
Ω
,
Gate resistance V
GS
=0V, V
DS
=0V, f=1MHz
Total Gate Charge
Reverse Transfer Capacitance V
GS
=0V, V
DS
=20V, f=1MHz
I
S
=1A,V
GS
=0V
V
DS
=5V, I
D
=8A
SWITCHING PARAMETERS
Maximum Body-Diode Continuous Current
Input Capacitance
Output Capacitance
Turn-On DelayTime
DYNAMIC PARAMETERS
Turn-On Rise Time
V
GS
=10V, V
DS
=20V, I
D
=8A
Gate Source Charge
Gate Drain Charge
Total Gate Charge
t
r
3
ns
t
D(off)
15 ns
t
f
2 ns
t
rr
12.5 ns
Q
rr
3.5 nC
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Body Diode Reverse Recovery Time
V
GS
=10V, V
DS
=20V, R
L
=2.5
Ω
,
R
GEN
=3Ω
Turn-Off Fall Time
Body Diode Reverse Recovery Charge I
F
=8A, dI/dt=100A/µs
Turn-Off DelayTime
I
F
=8A, dI/dt=100A/µs
Turn-On Rise Time
A. The value of RθJA is measured with the device mounted on 1in2FR-4 board with 2oz. Copper, in a still air environment with TA=25°C. The
value in any given application depends on the user's specific board design.
B. The power dissipation PDis based on TJ(MAX)=150°C, using ≤10s junction-to-ambient thermal resistance.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep
initialTJ=25°C.
D. The RθJA is the sum of the thermal impedence from junction to lead RθJL and lead to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-ambient thermal impedence which is measured with the device mounted on 1in2FR-4 board with
2oz. Copper, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse rating.
Rev 0 : Dec 2011 www.aosmd.com Page 2 of 5
AO4882
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
17
5
2
10
0
18
0
5
10
15
20
0123456
ID(A)
VGS(Volts)
Figure 2: Transfer Characteristics (Note E)
0
10
20
30
40
50
0 3 6 9 12 15
RDS(ON) (mΩ
Ω
Ω
Ω)
ID(A)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage (Note E)
0.8
1
1.2
1.4
1.6
1.8
0 25 50 75 100 125 150 175
Normalized On-Resistance
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
(Note E)
VGS=4.5V
ID=4A
VGS=10V
ID=8A
25°C
125°C
VDS=5V
VGS=4.5V
VGS=10V
0
5
10
15
20
25
30
012345
ID(A)
VDS (Volts)
Fig 1: On-Region Characteristics (Note E)
V
GS
=2.5V
3.5V
10V
4.5V
3V
40
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
1.0E+00
1.0E+01
1.0E+02
0.0 0.2 0.4 0.6 0.8 1.0 1.2
IS(A)
VSD (Volts)
Figure 6: Body-Diode Characteristics (Note E)
25°C
125°C
(Note E)
0
10
20
30
40
50
60
2 4 6 8 10
RDS(ON) (mΩ
Ω
Ω
Ω)
VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
(Note E)
ID=8A
25°C
125°C
Rev 0 : Dec 2011 www.aosmd.com Page 3 of 5
AO4882
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
0
2
4
6
8
10
02468
VGS (Volts)
Qg(nC)
Figure 7: Gate-Charge Characteristics
0
100
200
300
400
500
600
0 10 20 30 40
Capacitance (pF)
VDS (Volts)
Figure 8: Capacitance Characteristics
Ciss
Coss
C
rss
VDS=20V
ID=8A
1
10
100
1000
10000
0.00001 0.001 0.1 10 1000
Power (W)
Pulse Width (s)
Figure 11: Single Pulse Power Rating Junction
-
to
-
TA=25°C
0.0
0.1
1.0
10.0
100.0
0.01 0.1 1 10 100
ID(Amps)
VDS (Volts)
Figure 10: Maximum Forward Biased
Safe Operating Area (Note F)
10
µ
s
10s
1ms
DC
RDS(ON)
limited
TJ(Max)=150°C
TA=25°C
100
µ
10ms
Figure 11: Single Pulse Power Rating Junction
-
to
-
Ambient (Note F)
Safe Operating Area (Note F)
0.001
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
Zθ
θ
θ
θJA Normalized Transient
Thermal Resistance
Pulse Width (s)
Figure 12: Normalized Maximum Transient Thermal Impedance (Note F)
Single Pulse
D=Ton/T
TJ,PK=TA+PDM.ZθJA.RθJA
T
on
T
P
D
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
RθJA=90°C/W
Rev 0 : Dec 2011 www.aosmd.com Page 4 of 5
AO4882
-
+
VDC
Ig
Vds
DUT
-
+
VDC
Vgs
Vgs
10V
Qg
Qgs Qgd
Charge
Gate Charge Test Circuit & Waveform
-
+
VDC
DUT Vdd
Vgs
Vds
Vgs
RL
Rg
Vgs
Vds
10%
90%
Resistive Switching Test Circuit & Waveforms
t t
r
d(on)
t
on
t
d(off)
t
f
t
off
Id
+
L
Vds
BV
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
Vds
DSS
2
E = 1/2 LI
AR
AR
Vdd
Vgs
Vgs
Rg
DUT
-
+
VDC
Vgs
Id
Vgs
I
Ig
Vgs
-
+
VDC
DUT
L
Vgs
Vds
Isd
Isd
Diode Recovery Test Circuit & Waveforms
Vds -
Vds +
I
F
AR
dI/dt
I
RM
rr
Vdd
Vdd
Q = - Idt
t
rr
Rev 0 : Dec 2011 www.aosmd.com Page 5 of 5