Serial-in / Parallel-out Driver Series Serial / Parallel 2-input Drivers BU2098F, BU2090F, BU2090FS No.11051EBT04 Description Serial-in-parallel-out driver is a open drain output driver. It incorporates a built-in shift register and a latch circuit to turn on a maximum of 12 LED by a 2-line interface, linked to a microcontroller. A open drain output provides maximum of 25mA current. Features 1) LED can be driven directly. (Output current 25mA) 2) 8/12 Bit parallel output 3) This product can be operated on low voltage. 2 4) Compatible with I C BUS. (BU2098) Use For AV equipment such as, audio stereo sets, videos and TV sets, PCs, control microcontroller mounted equipment. Line up Parameter BU2098F BU2090F BU2090FS Unit Output current 25 25 mA Output line 8 12 lines Package SOP16 SOP16 SSOP-A16 700 Pd [mW] 600 600 400 Pd [mW] 700 Power dissipation Thermal derating curve Power dissipation 500 BU2098F 300 200 100 BU2090FS 500 400 BU2090F 300 200 100 85 0 25 50 75 100 125 150 0 175 25 50 75 100 125 150 175 Ambient temperature Ta [] www.rohm.com (c) 2011 ROHM Co., Ltd. All rights reserved. 1/12 2011.12 - Rev.B Technical Note BU2098F, BU2090F, BU2090FS Electrical characteristics BU2098F (unless otherwise noted, VDD=5V, Vss=0V, Ta=25) Parameter Symbol Min. Typ. Max. Unit Condition Input High-level voltage VIH 0.7xVDD - - V Input Low-level voltage VIL - - 0.3xVDD V Output Low-level voltage - 0.4 V IOUT=10mA 2.0 A VIN=0 VIN=VDD Output=High impedance VOUT=VDD VOL - Input Low-level current IIL - Input High-level current IIH - - -2.0 A Output leakage current IOZ - - 5.0 A Static dissipation current IDD - - 2.0 A BU2090F/BU2090FS (unless otherwise noted, VDD=5V, VSS=0V, Ta=25) Parameter Symbol Min. Typ. Max. 3.5 Input High-level voltage VIH 2.5 1.5 Input Low-level voltage VIL 0.4 2.0 Output Low-level voltage VOL 1.0 Unit V V V V V V Condition VDD=5V VDD=3V VDD=5V VDD=3V VDD=5V,IOL=20mA VDD=3V,IOL=5mA "H" output disable current IOZH - - 10 A VO=25V "L" output disable current IOZL - - -5.0 5.0 3.0 A A A VO=0V VDD=5V VDD=3V Static dissipation current IDD Operating conditions (Ta=25, VSS=0V) Parameter Power Supply Voltage Output Voltage Limits Symbol BU2098F VDD BU2090F/BU2090FS +2.7 to 5.5 Vo 0 to +15 Unit V 0 to +25 V Absolute maximum ratings BU2098F, BU2090F,BU2090FS Parameter Power supply voltage Symbol VDD Limits BU2098F BU2090F -0.5 to +7.0 1 * Unit BU2090FS -0.3 to +7.0V V 300 1 2 * 500 * 500 *3 650 *4 Power dissipation1 Pd1 300 Power dissipation2 Pd2 - Operating temperature range Topr -40 to +85 Storage temperature range Tstg -55 to +125 mW Output voltage Vo VSS to +18.0 VSS-0.3 to +25V V Input voltage VIN -0.5 to VDD+0.5 VSS-0.3 to VDD+0.3V V Allowable loss of single unit * Reduced by 3mW/ over 25. (BU2098F) *1 Reduced by 3mW/ over 25. *2 Reduced by 5mW/ over 25. *3 Reduced by 5.0mW for each increase in Ta of 1 over 25.(When mounted on a board 70mmx70mmx1.6mm Glass-epoxy PCB) *4 Reduced by 6.5mW for each increase in Ta of 1 over 25.(When mounted on a board 70mmx70mmx1.6mm Glass-epoxy PCB) www.rohm.com (c) 2011 ROHM Co., Ltd. All rights reserved. 2/12 2011.12 - Rev.B Technical Note BU2098F, BU2090F, BU2090FS Pin descriptions BU2098F PIN No. Pin Name I/O 1 A0 I 2 A1 I 3 A2 I 4 Q0 5 Q1 6 Q2 7 Q3 8 VSS 9 Q4 10 Q5 11 Q6 12 Q7 13 Function Address input, internally pull-up O Open drain output - GND O Open drain output N.C. - Non connected 14 SCL I Serial clock input 15 SDA I/O 16 VDD - BU2090F/BU2090FS PIN No. Pin Name Serial data input/output Power supply I/O Function 1 VSS - GND 2 DATA I Serial data input 3 CLOCK I Data shift clock input (rising edge trigger) The shift data is transferred to the output when the input data logic level is high during the falling transition of the clock pulse. 4 Q0 5 Q1 6 Q2 7 Q3 8 Q4 9 Q5 10 Q6 11 Q7 12 Q8 13 Q9 14 Q10 15 Q11 16 VDD Parallel data output (Nch Open Drain FET) O - www.rohm.com (c) 2011 ROHM Co., Ltd. All rights reserved. Latch data Output FET L ON H OFF Power supply 3/12 2011.12 - Rev.B Technical Note BU2098F, BU2090F, BU2090FS Block diagram BU2098F Power-On Reset SDA L a t c h SCL A0 I2C BUS Shift Controller Register 8bit Write Buffer Q0Q7 A1 A2 BU2090F/BU2090FS L a t c h CLOCK Controller 12bit Shift Write Buffer Q0Q11 Register DATA Interfaces BU2090F/BU2090FS DATA, CLOCK BU2090F/BU2090FS Q0Q11 BU2098F Q0Q7 VDD VDD OUT OUT IN GND (VSS) GND (VSS) GND (VSS) BU2098F A0A2 VDD GND (VSS) VDD BU2098F SDA BU2098F SCL IN IN IN GND (VSS) GND (VSS) GND (VSS) www.rohm.com (c) 2011 ROHM Co., Ltd. All rights reserved. VDD VDD VDD GND (VSS) GND (VSS) 4/12 GND (VSS) GND (VSS) GND (VSS) 2011.12 - Rev.B Technical Note BU2098F, BU2090F, BU2090FS BU2098F AC characteristics (Unless otherwise noted, VDD=5V, VSS=0V, Ta=25) 2 Fast mode I C BUS Parameter Symbol Min. Max. SCL clock frequency Bus free time between start-stop condition Hold time start condition Standard mode I2C BUS Min. Max. Unit fSCL 0 400 0 100 kHz tBUS 1.3 - 4.7 - s tHD:STA 0.6 - 4.0 - s Low period of the SCL clock tLOW 1.3 - 4.7 - s High period of the SCL clock tHIGH 0.6 - 4.0 - s Set up time Re-start condition tSU:STA 0.6 - 4.7 - s Data hold time tHD:DAT 0 0.9 0 - s Data set up time tSU:DAT 100 - 250 - ns Rise time of SDA and SCL tR 20+0.1Cb 300 - 1000 ns Fall time of SDA and SCL tF 20+0.1Cb 300 - 300 ns Set up time stop condition tSU:STO 0.6 - 4.0 - s Cb - 400 - 400 pF Capacitive load for SDA line and SCL line Timing chart SDA tBUS tHD:STA tLOW tf tr SCL P S tHD:STA tHD:DAT tSU:DAT tSU:STA Sr tSU:STO P Fig.1 SDA, SCL timing chart www.rohm.com (c) 2011 ROHM Co., Ltd. All rights reserved. 5/12 2011.12 - Rev.B Technical Note BU2098F, BU2090F, BU2090FS Function Start condition The start condition is a "HIGH" to "LOW" transition of the SDA line while SCL is "HIGH". Stop condition The stop condition is a "LOW" to "HIGH" transition of the SDA line while SCL is "HIGH". SDA SCL S P Start condition Stop condition Fig.2 Start / Stop condition Acknowledge The master (p) puts a resistive "HIGH" level on the SDA line during the acknowledge clock pulse. The peripheral (audio processor) that acknowledge has to pull-down ("LOW") the SDA line during the acknowledge clock pulse, so that the SDA line is stable "LOW" during this clock pulse. The slave which has been addressed has to generate an acknowledgement after the reception of each byte, otherwise the SDA line remains at the "HIGH" level during the ninth clock pulse time. In this case the master transmitter can generate the STOP information in order to abort the transfer. clock for acknowledge SCL (from master) 1 8 9 SDA (from master) not confirm SDA (from slave) S confirm ACK signal Fig.3 Acknowledge www.rohm.com (c) 2011 ROHM Co., Ltd. All rights reserved. 6/12 2011.12 - Rev.B Technical Note BU2098F, BU2090F, BU2090FS Write DATA Send the stave address from master following the start condition (S). This address consists of 7 bits. The left 1 bit (the foot bit) is fixed "0". The stop condition (P) is needed to finish the data transferred. But the re-send starting condition (Sr) enables to transfer the data without STOP (P). S slave address R/W ACK DATA ACK P DATA ACK Sr "0" (Write) S slave address R/W ACK slave address R/W ACK DATA ACK P "0" (Write) "0" (Write) Fig.4 DATA transmit Data format The format is following. S A6 A5 A4 A3 A2 A1 A0 R/W ACK D7 D6 D5 SLAVE ADDRESS D4 D3 D2 D1 D0 ACK P WRITE DATA Table 1 for WRITE format Slave address A0A2 Each bit can be defined by the input levels of pins A0A3. A3A6 These 4 bits are fixed. R/W Write Data "0" Write "1" to D0 makes Q0 pin High-impedance. And write "0" makes Q0 pin LOW. D[1:7] and Q[1:7] are same as D0 and Q0. D0D7 Table 2 for (A2, A1, A0) to SLAVE ADDRESS A6 A5 A4 A3 A2 A1 A0 Slave address 0 1 1 1 0 0 0 38H 0 1 1 1 0 0 1 39H 0 1 1 1 0 1 0 3AH 0 1 1 1 0 1 1 3BH 0 1 1 1 1 0 0 3CH 0 1 1 1 1 0 1 3DH 0 1 1 1 1 1 0 3EH 0 1 1 1 1 1 1 3FH Fixed for BU2098F www.rohm.com (c) 2011 ROHM Co., Ltd. All rights reserved. Defined by external pin A0A2 7/12 2011.12 - Rev.B Technical Note BU2098F, BU2090F, BU2090FS Data transmission timing SDA S A6 A5 A4 A3 A2 A1 A0 R/W ACK D7 D6 D5 Slave address D4 D3 D2 D1 D0 ACK P Write data Latch pulse Output (Q7Q0) Output the write data to Q7Q0 at the same time. Fig.5 Timing chart for WRITE Command sample for driving LEDs. These are all off. (terminal A0A2 is open) Power Supply ON LEDs all-ON with power supply ON SDA S 0 1 1 1 1 1 1 0 ACK 1 1 1 Slave address 1 1 1 1 1 ACK P Write data LEDs are all-off by this command. RESET CONDITION After reset, Q0Q7 pins are ON. (LEDs are all ON.) RISING TIME OF POWER SUPPLY VDD must rise within 10ms. If the rise time would exceed 10ms, it is afraid not to reset the BU2098F. VDD GND t10ms Fig.6 Rising time of power supply www.rohm.com (c) 2011 ROHM Co., Ltd. All rights reserved. 8/12 2011.12 - Rev.B Technical Note BU2098F, BU2090F, BU2090FS BU2090F/BU2090FS AC characteristics (unless otherwise noted, VDD=5V, VSS=0V, Ta=25) Limit Parameter Symbol Min. Typ. Minimum clock frequency tw Data shift set up time tSU Data shift hold time tH Data latch set up time tLSUH Data latch hold time tLHH Data latch "L" set up time tLSUL Data latch "L" hold time tLHL Max. Unit Condition 500 - - ns VDD=5V 1000 - - ns VDD=3V 200 - - ns VDD=5V 300 - - ns VDD=3V 200 - - ns VDD=5V 400 - - ns VDD=3V 50 - - ns VDD=5V 100 - - ns VDD=3V 250 - - ns VDD=5V 500 - - ns VDD=3V 200 - - ns VDD=5V 400 - - ns VDD=3V 250 - - ns VDD=5V 500 - - ns VDD=3V Switching time test circuit 25V VDD RL 10k Q0 Pulse Gen. CLOCK 25V Pulse Gen. RL 10k DATA Q11 GND (Vss) Fig.7 Switching time test waveforms tW 90% tW 90% 10% CLOCK tSU 90% VDD 90% 10% tH tLSUL 10% tLHL tLSUH GND (Vss) tLHH VDD 90% DATA 10% 90% 10% 10% 90% GND (Vss) Fig.8 www.rohm.com (c) 2011 ROHM Co., Ltd. All rights reserved. 9/12 2011.12 - Rev.B Technical Note BU2098F, BU2090F, BU2090FS Timing chart BU2098F Slave address SCL Device code External terminal 1 5 2 3 4 6 7 8 9 1 2 3 4 5 6 7 8 9 Start condition Stop condition SDA VCC A6 A5 A4 A3 A2 A1 A0 RW ACK D7 D6 D5 D4 D3 D2 D1 D0 ACK Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Note) Diagram shows a status where a pull-up resistor is connected to output. BU2090F/BU2090FS CLOCK DATA Q11 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Q10 Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Note1) Indicates undefined output. Note2) Output terminal is provided with a pull-up resistor. www.rohm.com (c) 2011 ROHM Co., Ltd. All rights reserved. 10/12 2011.12 - Rev.B Technical Note BU2098F, BU2090F, BU2090FS Notes for use 1. Absolute maximum ratings An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses. 2. Connecting the power supply connector backward Connecting of the power supply in reverse polarity can damage IC. Take precautions when connecting the power supply lines. An external direction diode can be added. 3. Power supply lines Design PCB layout pattern to provide low impedance GND and supply lines. To obtain a low noise ground and supply line, separate the ground section and supply lines of the digital and analog blocks. Furthermore, for all power supply terminals to ICs, connect a capacitor between the power supply and the GND terminal. When applying electrolytic capacitors in the circuit, not that capacitance characteristic values are reduced at low temperatures. 4. GND voltage The potential of GND pin must be minimum potential in all operating conditions. 5. Thermal design Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions. 6. Inter-pin shorts and mounting errors Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any connection error or if pins are shorted together. 7. Actions in strong electromagnetic field Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction. 8. Testing on application boards When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress. Always discharge capacitors after each process or step. Always turn the IC's power supply off before connecting it to or removing it from a jig or fixture during the inspection process. Ground the IC during assembly steps as an antistatic measure. Use similar precaution when transporting or storing the IC. 9. Ground Wiring Pattern When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing a single ground point at the ground potential of application so that the pattern wiring resistance and voltage variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the GND wiring pattern of any external components, either. 10. Unused input terminals Connect all unused input terminals to VDD or VSS in order to prevent excessive current or oscillation. Insertion of a resistor (100k approx.) is also recommended. www.rohm.com (c) 2011 ROHM Co., Ltd. All rights reserved. 11/12 2011.12 - Rev.B Technical Note BU2098F, BU2090F, BU2090FS Ordering part number B U 2 Part No. 0 9 0 F Part No. 2098 2090 S - Package F : SOP16 FS : SSOP-A16 E 2 Packaging and forming specification E2: Embossed tape and reel SOP16 <Tape and Reel information> 10 0.2 (MAX 10.35 include BURR) 9 Embossed carrier tape Quantity 2500pcs Direction of feed E2 The direction is the 1pin of product is at the upper left when you hold ( reel on the left hand and you pull out the tape on the right hand ) 0.3MIN 4.40.2 6.20.3 16 Tape 1 8 0.11 1.50.1 0.15 0.1 0.4 0.1 1.27 0.1 1pin Reel (Unit : mm) Direction of feed Order quantity needs to be multiple of the minimum quantity. SSOP-A16 <Tape and Reel information> 6.6 0.2 (MAX 6.95 include BURR) Tape Embossed carrier tape Quantity 2500pcs 9 Direction of feed 0.3MIN 4.40.2 6.20.3 16 15 14 13 12 11 10 1 2 3 4 5 6 7 E2 The direction is the 1pin of product is at the upper left when you hold ( reel on the left hand and you pull out the tape on the right hand ) 8 0.11 1.50.1 0.15 0.1 0.8 0.1 0.36 0.1 1pin Reel (Unit : mm) www.rohm.com (c) 2011 ROHM Co., Ltd. All rights reserved. 12/12 Direction of feed Order quantity needs to be multiple of the minimum quantity. 2011.12 - Rev.B Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. 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