LM48310 www.ti.com LM48310 SNAS430D - NOVEMBER 2007 - REVISED MAY 2013 Ultra-Low EMI, Filterless, 2.6W, Mono, Class D Audio Power Amplifier with E2S Check for Samples: LM48310 FEATURES DESCRIPTION * The LM48310 is a single supply, high efficiency, mono, 2.6W, filterless switching audio amplifier. The LM48310 features TI's Enhanced Emissions Suppression (E2S) system, that features a unique patent-pending ultra low EMI, spread spectrum, PWM architecture, that significantly reduces RF emissions while preserving audio quality and efficiency. The E2S system improves battery life, reduces external component count, board area consumption, system cost, and simplifying design. 1 2 * * * * * * * * * * * Passes FCC Class B Radiated Emissions with 20 inches of cable E2S System Reduces EMI while Preserving Audio Quality and Efficiency Output Short Circuit Protection with AutoRecovery Stereo Class D Operation No Output Filter Required Internally Configured Gain (12dB) Synchronizable Oscillator for Multi-Channel Operation Low Power Shutdown Mode Minimum External Components "Click and Pop" Suppression Micro-Power Shutdown Available in Space-Saving WSON Package APPLICATIONS * * * Mobile Phones PDAs Laptops KEY SPECIFICATIONS * * * * * * Efficiency at 3.6V, 400mW into 8 85% (typ) Efficiency at 5V, 1W into 8 88% (typ) Quiescent Power Supply Current at 5V 3.2mA Power Output at VDD = 5V, RL = 4, THD+N 10% 2.6W (typ) Power Output at VDD = 5V, RL = 8, THD+N 10% 1.6W (typ) Shutdown current0.01A (typ) The LM48310 is designed to meet the demands of portable multimedia devices. Operating from a single 5V supply, the device is capable of delivering 2.6W of continuous output power to a 4 load with less than 10% THD+N. Flexible power supply requirements allow operation from 2.4V to 5.5V. The LM48310 offers two logic selectable modulation schemes, fixed frequency mode, and an EMI suppressing spread spectrum mode. The E2S system includes an advanced, patent-pending edge rate control (ERC) architecture that further reduce emissions by minimizing the high frequency component of the device output, while maintaining high quality audio reproduction (THD+N = 0.03%) and high efficiency ( = 88%). The LM48310 also features a SYNC_IN input and SYNC_OUT, which allows multiple devices to operate with the same switching frequency, eliminating beat frequencies and any other interference caused by clock intermodulation. The LM48310 features high efficiency compared to conventional Class AB amplifiers, and other low EMI Class D amplifiers. When driving and 8 speaker from a 5V supply, the device operates with 88% efficiency at PO = 1W. The gain of the LM48310 is internally set to 12dB, further reducing external component count. A low power shutdown mode reduces supply current consumption to 0.01A. Advanced output short circuit protection with autorecovery prevents the device from being damaged during fault conditions. Superior click and pop suppression eliminates audible transients on powerup/down and during shutdown. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2007-2013, Texas Instruments Incorporated LM48310 SNAS430D - NOVEMBER 2007 - REVISED MAY 2013 www.ti.com EMI Graph 20in of Speaker Cable 60.0 AMPLITUDE (dBPV/m) 50.0 40.0 30.0 20.0 10.0 30.0 200.0 100.0 400.0 300.0 600.0 500.0 800.0 700.0 1000.0 900.0 FREQUENCY (MHz) Typical Application +2.4V to +5.5V CS CS VDD PVDD SD CIN IN+ OUTA MODULATOR HBRIDGE IN- OUTB CIN SYNC_IN SYNC_OUT OSCILLATOR GND Figure 1. Typical Audio Amplifier Application Circuit 2 Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48310 LM48310 www.ti.com SNAS430D - NOVEMBER 2007 - REVISED MAY 2013 Connection Diagram IN+ 1 10 OUTA IN- 2 9 PVDD VDD 3 8 GND SD 4 7 OUTB SYNC_IN 5 6 SYNC_OUT Figure 2. WSON Package - Top View See Package Number DSC0010 PIN DESCRIPTIONS Pin Name 1 IN+ Non-Inverting Input Description 2 IN- Inverting Input 3 VDD Power Supply 4 SD Active Low Shutdown Input. Connect to VDD for normal operation. 5 SYNC_IN Mode Select and External Oscillator Input. SYNC_IN = VDD: Spread spectrum mode with fS = 300kHz 30% SYNC_IN = GND: Fixed frequency mode with fS = 300kHz SYNC_IN = Clocked: fS = external clock frequency 6 SYNC_OUT 7 OUTB Inverting Output 8 GND Ground 9 PVDD H-Bridge Power Supply 10 OUTA Non-Inverting Output Clock Output These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48310 3 LM48310 SNAS430D - NOVEMBER 2007 - REVISED MAY 2013 www.ti.com ABSOLUTE MAXIMUM RATINGS (1) (2) (3) Supply Voltage 6.0V -65C to +150C Storage Temperature - 0.3V to VDD +0.3V Input Voltage Power Dissipation (4) ESD Rating Internally Limited (5) 2000V ESD Rating (6) 200V Junction Temperature 150C Thermal Resistance (1) (2) (3) (4) (5) (6) JC 8.2C/W JA 49.2C/W "Absolute Maximum Ratings" indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditionsindicate conditions at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified. The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not ensured. If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications. The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, JA, and the ambient temperature, TA. The maximum allowable power dissipation is PDMAX = (TJMAX- TA) / JA or the number given in Absolute Maximum Ratings, whichever is lower. Human body model, applicable std. JESD22-A114C. Machine model, applicable std. JESD22-A115-A. OPERATING RATINGS (1) (2) Temperature Range TMIN TA TMAX -40C TA +85C 2.4V VDD 5.5V Supply Voltage (1) (2) "Absolute Maximum Ratings" indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditionsindicate conditions at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified. The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not ensured. ELECTRICAL CHARACTERISTICS VDD = PVDD = 5V (1) (2) The following specifications apply for AV = 12dB, (RL = 8, SYNC_IN = VDD (Spread Spectrum mode), f = 1kHz, unless otherwise specified. Limits apply for TA = 25C. Symbol VOS IDD Parameter Differential Output Offset Voltage Quiescent Power Supply Current Conditions VIN = 0 3 mV (max) 2.7 3.9 mA (max) VIN = 0, RL = VDD = 5V 3.2 4.4 mA (max) VIN = 0, VDD = 3.6V 2.7 mA VIN = 0, VDD = 5V 3.2 mA 0.01 ISD Shutdown Current VSD = GND VIH Logic Input High Voltage SD input, VDD = 3.6V (3) (4) 4 Units (Limits) 1 Quiescent Power Supply Current (2) Limit (4) (2) VIN = 0, RL = VDD = 3.6V IDD (1) LM48310 Typical (3) 1.0 A 1.4 V (min) The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not ensured. RL is a resistive load in series with two inductors to simulate an actual speaker load. For RL = 8, the load is 15H + 8, +15H. For RL = 4, the load is 15H + 4 + 15H. Typical values represent most likely parametric norms at TA = +25C, and at the Recommended Operation Conditions at the time of product characterization and are not specified. Datasheet min/max specification limits are specified by test or statistical analysis. Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48310 LM48310 www.ti.com SNAS430D - NOVEMBER 2007 - REVISED MAY 2013 ELECTRICAL CHARACTERISTICS VDD = PVDD = 5V(1)(2) (continued) The following specifications apply for AV = 12dB, (RL = 8, SYNC_IN = VDD (Spread Spectrum mode), f = 1kHz, unless otherwise specified. Limits apply for TA = 25C. Symbol Parameter VIL Logic Input Low Voltage TWU Wake Up Time fSW Switching Frequency Conditions LM48310 Typical (3) SD input, VDD = 3.6V Limit (4) (2) Units (Limits) 0.4 V (max) 7.5 ms SYNC_IN = VDD (Spread Spectrum) 30030 kHz SYNC_IN = GND (Fixed Frequency) 300 kHz SYNC_IN = External Clock Minimum Frequency 200 kHz SYNC_IN = External Clock Maximum Frequency 1000 kHz AV Gain 12 11 13 dB (min) dB (max) RIN Input Resistance 20 17 k (min) PO THD+N PSRR CMRR SNR OS Output Power Total Harmonic Distortion + Noise Power Supply Rejection Ratio (Input Referred) Common Mode Rejection Ratio Efficiency Signal to Noise Ratio Output Noise RL = 4, THD = 10% f = 1kHz, 22kHz BW VDD = 5V VDD = 3.6V VDD = 2.5V 2.6 1.3 555 W W mW RL = 8, THD = 10% (max) f = 1kHz, 22kHz BW VDD = 5V VDD = 3.6V VDD = 2.5V 1.6 800 354 W mW mW RL = 4, THD = 1% (max) f = 1kHz, 22kHz BW VDD = 5V VDD = 3.6V VDD = 2.5V 2.1 1 446 W W mW RL = 8, THD = 1% (max) f = 1kHz, 22kHz BW VDD = 5V VDD = 3.6V VDD = 2.5V 1.3 640 286 PO = 200mW, RL = 8, f = 1kHz 0.03 % (max) PO = 100mW, RL = 8, f = 1kHz 0.03 % VRIPPLE = 200mVP-P Sine, fRIPPLE = 217Hz, Inputs AC GND, CIN = 1F, Input referred 82 dB VRIPPLE = 200mVP-P Sine, fRIPPLE = 1kHz, Inputs AC GND, CIN = 1F, Input referred 80 dB VRIPPLE = 1VP-P fRIPPLE = 217Hz 70 dB VDD = 5V, POUT = 1W RL = 8, f = 1kHz 88 % VDD = 3.6V, POUT = 400mW RL = 8, f = 1kHz 85 % VDD = 5V, PO = 1W, Fixed Frequency Mode 97 dB VDD = 5V, PO = 1W, Spread Spectrum Mode 97 dB Input referred, Fixed Frequency Mode, A-weighted Filter 14 V Input referred, Spread Spectrum Mode, Unweighted 28 V 1.1 W (min) mW mW Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48310 5 LM48310 SNAS430D - NOVEMBER 2007 - REVISED MAY 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS THD+N vs Frequency VDD = 3.6V, POUT = 700mW, RL = 4 100 100 10 10 THD+N (%) THD+N (%) THD+N vs Frequency VDD = 2.5V, POUT = 300mW, RL = 4 1 0.1 0.01 0.001 100 1000 10000 100000 10 100 1000 10000 100000 FREQUENCY (Hz) FREQUENCY (Hz) Figure 3. Figure 4. THD+N vs Frequency VDD = 5.0V, POUT = 1.2W, RL = 4 THD+N vs Frequency VDD = 2.5V, POUT = 150mW, RL = 8 100 100 10 10 THD+N (%) THD+N (%) 10 1 0.1 0.01 1 0.1 0.01 0.001 0.001 10 100 1000 10000 100000 10 100 1000 10000 100000 FREQUENCY (Hz) FREQUENCY (Hz) Figure 5. Figure 6. THD+N vs Frequency VDD = 3.6V, POUT = 400mW, RL = 8 THD+N vs Frequency VDD = 5V, POUT = 650mW, RL = 8 100 100 10 10 THD+N (%) THD+N (%) 0.1 0.01 0.001 1 0.1 0.01 1 0.1 0.01 0.001 0.001 10 6 1 100 1000 10000 100000 10 100 1000 10000 FREQUENCY (Hz) FREQUENCY (Hz) Figure 7. Figure 8. Submit Documentation Feedback 100000 Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48310 LM48310 www.ti.com SNAS430D - NOVEMBER 2007 - REVISED MAY 2013 TYPICAL PERFORMANCE CHARACTERISTICS (continued) THD+N vs Output Power f = 1kHz, RL = 4 THD+N vs Output Power f = 1kHz, RL = 8 100 100 VDD = 5V VDD = 5V 10 VDD = 3.6V VDD = 2.5V 1 0.1 VDD = 2.5V 1 0.1 0.01 0.001 0.01 0.1 1 0.01 0.001 10 0.01 0.1 1 OUTPUT POWER (W) OUTPUT POWER (W) Figure 9. Figure 10. Efficiency vs Output Power f = 1kHz, RL = 4 Efficiency vs Output Power f = 1kHz, RL = 8 10 100 100 VDD = 5V 90 VDD = 3.6V 90 80 80 VDD = 3.6V 70 EFFICIENCY (%) EFFICIENCY (%) VDD = 3.6V THD+N (%) THD+N (%) 10 VDD = 2.5V 60 50 40 30 VDD = 5V 70 VDD = 2.5V 60 50 40 30 20 20 10 10 0 0 0 500 1000 1500 2000 0 2500 250 500 750 1000 1250 1500 OUTPUT POWER (mW) OUTPUT POWER (mW) Figure 11. Figure 12. Power Dissipation vs Output Power f = 1kHz, RL = 4 Power Dissipation vs Output Power f = 1kHz, RL = 8 500 200 400 POWER DISSIPATION (mW) POWER DISSIPATION (mW) VDD = 3.6V VDD = 5V VDD = 3.6V 300 VDD = 2.5V 200 100 VDD = 5V 150 50 0 0 500 1000 1500 2000 VDD = 2.5V 100 2500 0 0 250 500 750 1000 1250 1500 OUTPUT POWER (mW) OUTPUT POWER (mW) Figure 13. Figure 14. Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48310 7 LM48310 SNAS430D - NOVEMBER 2007 - REVISED MAY 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) Output Power vs Supply Voltage f = 1kHz, RL = 4 Output Power vs Supply Voltage f = 1kHz, RL = 8 3.5 2 2.5 THD+N = 10% 2 1.5 THD+N = 1% 1 1.5 OUTPUT POWER (W) OUTPUT POWER (W) 3 THD+N = 10% 1 THD+N = 1% 0.5 0.5 0 2.5 3 3.5 4 4.5 5 0 2.5 5.5 4 4.5 5 5.5 Figure 15. Figure 16. PSRR vs Frequency VDD = 3.6V, VRIPPLE = 200mVP-P, RL = 8 PSRR vs Frequency VDD = 5.0V, VRIPPLE = 200mVP-P, RL = 8 0 0 -10 -10 -20 -20 -30 -30 PSRR (dB) PSRR (dB) 3.5 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) -40 -50 -40 -50 -60 -60 -70 -70 -80 -80 -90 10 100 1000 10000 -90 10 100000 100 1000 10000 100000 FREQUENCY (Hz) FREQUENCY (Hz) Figure 17. Figure 18. CMRR vs Frequency VDD = 3.6V, VRIPPLE = 1VP-P, RL = 8 CMRR vs Frequency VDD = 5.0V, VRIPPLE = 1VP-P, RL = 8 0 0 -10 -10 -20 -20 CMRR(dB) -30 PSRR (dB) 3 -40 -50 -30 -40 -50 -60 -60 -70 -70 -80 -90 8 10 100 1000 10000 100000 -80 10 100 1000 10000 FREQUENCY (Hz) FREQUENCY (Hz) Figure 19. Figure 20. Submit Documentation Feedback 100000 Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48310 LM48310 www.ti.com SNAS430D - NOVEMBER 2007 - REVISED MAY 2013 TYPICAL PERFORMANCE CHARACTERISTICS (continued) Spread Spectrum Output Spectrum vs Frequency VDD = 5.0V, VIN = 1VRMS, RL = 8 0 0 -20 -20 AMPLITUDE (dBV) AMPLITUDE (dBV) Fixed Frequency Output Spectrum vs Frequency VDD = 5.0V, VIN = 1VRMS, RL = 8 -40 -60 -80 -100 -60 -80 -100 -120 10 100 1000 10000 -120 10 100000 100 1000 10000 100000 FREQUENCY (Hz) FREQUENCY (Hz) Figure 21. Figure 22. Wideband Fixed Frequency Output Spectrum vs Frequency VDD = 5.0V, RL = 8 Wideband Spread Spectrum Output Spectrum vs Frequency VDD = 5.0V, RL = 8 0 0 -10 -10 -20 -20 -30 -30 AMPLITUDE (dBV) AMPLITUDE (dBV) -40 -40 -50 -60 -70 -40 -50 -60 -70 -80 -80 -90 -90 -100 100 1000 10000 -100 100 1000 10000 FREQUENCY (kHz) FREQUENCY (kHz) Figure 23. Figure 24. Supply Current vs Supply Voltage No Load Shutdown Supply Current vs Supply Voltage No Load 4 0.05 3 SUPPLY CURRENT (PA) SUPPLY CURRENT (mA) SS MODE FF MODE 2 1 0 2.5 3 3.5 4 4.5 5 5.5 0.04 0.03 0.02 0.01 0 2.5 3 3.5 4 4.5 5 5.5 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) Figure 25. Figure 26. Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48310 9 LM48310 SNAS430D - NOVEMBER 2007 - REVISED MAY 2013 www.ti.com APPLICATION INFORMATION GENERAL AMPLIFIER FUNCTION The LM48310 mono Class D audio power amplifier features a filterless modulation scheme that reduces external component count, conserving board space and reducing system cost. With no signal applied, the outputs (VOUTA and VOUTB) switch between VDD and GND with a 50% duty cycle, in phase, causing the two outputs to cancel. This cancellation results in no net voltage across the speaker, thus there is no current to the load in the idle state. With the input signal applied, the duty cycle (pulse width) of the LM48310 outputs changes. For increasing output voltage, the duty cycle of VOUTAincreases, while the duty cycle of VOUTB decreases. For decreasing output voltages, the converse occurs. The difference between the two pulse widths yields the differential output voltage. ENHANCED EMISSIONS SUPPRESSION SYSTEM (E2S) The LM48310 features 's patent-pending E2S system that reduces EMI, while maintaining high quality audio reproduction and efficiency. The E2S system features a synchronizable oscillator with selectable spread spectrum, and advanced edge rate control (ERC). The LM48310 ERC greatly reduces the high frequency components of the output square waves by controlling the output rise and fall times, slowing the transitions to reduce RF emissions, while maximizing THD+N and efficiency performance. The overall result of the E2S system is a filterless Class D amplifier that passes FCC Class B radiated emissions standards with 20in of twisted pair cable, with excellent 0.03% THD+N and high 88% efficiency. FIXED FREQUENCY MODE (SYNC_IN = GND) The LM48310 features two modulations schemes, a fixed frequency mode and a spread spectrum mode. Select the fixed frequency mode by setting SYNC_IN = GND. In fixed frequency mode, the amplifier output switch at a constant 300kHz. In fixed frequency mode, the output spectrum consists of the fundamental and its associated harmonics (see TYPICAL PERFORMANCE CHARACTERISTICS). SPREAD SPECTRUM MODE (SYNC_IN = VDD) The logic selectable spread spectrum mode eliminates the need for output filters, ferrite beads or chokes. In spread spectrum mode, the switching frequency varies randomly by 30% about a 300kHz center frequency, reducing the wideband spectral contend, improving EMI emissions radiated by the speaker and associated cables and traces. Where a fixed frequency class D exhibits large amounts of spectral energy at multiples of the switching frequency, the spread spectrum architecture of the LM48310 spreads that energy over a larger bandwidth (See TYPICAL PERFORMANCE CHARACTERISTICS). The cycle-to-cycle variation of the switching period does not affect the audio reproduction, efficiency, or PSRR. Set SYNC_IN = VDD for spread spectrum mode. EXTERNAL CLOCK MODE (SYNC_IN = CLOCK) Connecting a clock signal to SYNC_IN synchronizes the LM48310 oscillator to an external clock, moving the output spectral components out of a sensitive frequency band, and minimizing audible beat frequencies when multiple LM48310s are used in a single system. The LM48310 accepts an external clock frequency between 200kHz and 1MHz. The LM48310 can be synchronized to a spread spectrum clock, allowing multiple LM48310s to be synchronized in spread spectrum mode (see TYPICAL PERFORMANCE CHARACTERISTICS). SYNC_OUT SYNC_OUT is a clock output for synchronizing external devices. The SYNC_OUT signal is identical in frequency and duty cycle of the amplifier's switching frequency. When the LM48310 is in fixed frequency mode, SYNC_OUT is a fixed, 300kHz clock. When the LM48310 is in spread spectrum mode, SYNC_OUT is an identical spread spectrum clock. When the LM48310 is driven by an external clock, SYNC_OUT is identical to the external clock. If unused, leave SYNC_OUT floating. Multiple LM48310s can be synchronized to a single clock. In Figure 27, device U1 is the master, providing a spread spectrum clock to the slave device (U2). This configuration synchronizes the switching frequencies of the two devices, eliminating any audible beat frequencies. Because SYNC_OUT has no audio content, there is minimal THD+N degredation or crosstalk between the devices, Figure 28 - Figure 30. 10 Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48310 LM48310 www.ti.com SNAS430D - NOVEMBER 2007 - REVISED MAY 2013 VDD 1 PF VDD PVDD U1 LM48310 IN+ OUTA RIGHT CHANNEL DIFFERENTIAL AUDIO INPUT OUTB IN- SYNC_IN SYNC _OUT VDD PVDD 1 PF U2 LM48310 IN+ OUTA LEFT CHANNEL DIFFERENTIAL AUDIO INPUT OUTB IN- SYNC_IN Figure 27. Cascaded LM48310 100 100 10 THD+N (%) THD+N (%) 10 1 SLAVE 1 SLAVE 0.1 0.1 0.01 MASTER MASTER 0.01 0.001 0.01 0.1 1 0.001 10 10 OUTPUT POWER (W) 100 1000 10000 100000 FREQUENCY (Hz) Figure 28. THD+N vs Output Power Figure 29. THD+N vs Frequency Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48310 11 LM48310 SNAS430D - NOVEMBER 2007 - REVISED MAY 2013 www.ti.com 0 CROSSTALK (dB) -20 -40 -60 -80 -100 -120 10 100 1000 10000 100000 FREQUENCY (Hz) Figure 30. Crosstalk vs Frequency DIFFERENTIAL AMPLIFIER EXPLANATION As logic supplies continue to shrink, system designers are increasingly turning to differential analog signal handling to preserve signal to noise ratios with restricted voltage signs. The LM48310 features a fully differential speaker amplifier. A differential amplifier amplifies the difference between the two input signals. Traditional audio power amplifiers have typically offered only single-ended inputs resulting in a 6dB reduction of SNR relative to differential inputs. The LM48310 also offers the possibility of DC input coupling which eliminates the input coupling capacitors. A major benefit of the fully differential amplifier is the improved common mode rejection ratio (CMRR) over single ended input amplifiers. The increased CMRR of the differential amplifier reduces sensitivity to ground offset related noise injection, especially important in noisy systems. POWER DISSIPATION AND EFFICIENCY The major benefit of a Class D amplifier is increased efficiency versus a Class AB. The efficiency of the LM48310 is attributed to the region of operation of the transistors in the output stage. The Class D output stage acts as current steering switches, consuming negligible amounts of power compared to their Class AB counterparts. Most of the power loss associated with the output stage is due to the IR loss of the MOSFET onresistance, along with switching losses due to gate charge. SHUTDOWN FUNCTION The LM48310 features a low current shutdown mode. Set SD = GND to disable the amplifier and reduce supply current to 0.01A. Switch SD between GND and VDD for minimum current consumption is shutdown. The LM48310 may be disabled with shutdown voltages in between GND and VDD, the idle current will be greater than the typical 0.1A value. The LM48310 shutdown input has and internal pulldown resistor. The purpose of this resistor is to eliminate any unwanted state changes when SD is floating. To minimize shutdown current, SD should be driven to GND or left floating. If SD is not driven to GND or floating, an increase in shutdown supply current will be noticed. AUDIO AMPLIFIER POWER SUPPLY BYPASSING/FILTERING Proper power supply bypassing is critical for low noise performance and high PSRR. Place the supply bypass capacitors as close to the device as possible. Typical applications employ a voltage regulator with 10F and 0.1F bypass capacitors that increase supply stability. These capacitors do not eliminate the need for bypassing of the LM48310 supply pins. A 1F capacitor is recommended. 12 Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48310 LM48310 www.ti.com SNAS430D - NOVEMBER 2007 - REVISED MAY 2013 AUDIO AMPLIFIER INPUT CAPACITOR SELECTION Input capacitors may be required for some applications, or when the audio source is single-ended. Input capacitors block the DC component of the audio signal, eliminating any conflict between the DC component of the audio source and the bias voltage of the LM48310. The input capacitors create a high-pass filter with the input resistors RIN. The -3dB point of the high pass filter is found using Equation 1 below. f = 1 / 2RINCIN Where * RIN is the value of the input resistor given in the Electrical Characteristics table (1) The input capacitors can also be used to remove low frequency content from the audio signal. Small speakers cannot reproduce, and may even be damaged by low frequencies. High pass filtering the audio signal helps protect the speakers. When the LM48310 is using a single-ended source, power supply noise on the ground is seen as an input signal. Setting the high-pass filter point above the power supply noise frequencies, 217Hz in a GSM phone, for example, filters out the noise such that it is not amplified and heard on the output. Capacitors with a tolerance of 10% or better are recommended for impedance matching and improved CMRR and PSRR. AUDIO AMPLIFIER GAIN The gain of the LM48310 is internally set to 12dB. The gain can be reduced by adding additional input resistance Figure 31. In this configuration, the gain of the device is given by: AV = 2 x [RF / (RINEXT + RIN)] Where * * * RF is 40k RIN is 20k RINEXT is the value of the additional external resistor (2) RF CIN RIN RINEXT IN+ INCIN RINEXT RIN RF Figure 31. Reduced Gain Configuration SINGLE-ENDED AUDIO AMPLIFIER CONFIGURATION The LM48310 is compatible with single-ended sources. When configured for single-ended inputs, input capacitors must be used to block and DC component at the input of the device. Figure 32 shows the typical single-ended applications circuit. Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48310 13 LM48310 SNAS430D - NOVEMBER 2007 - REVISED MAY 2013 www.ti.com VDD 1 PF VDD PVDD LM48310 SINGLE-ENDED AUDIO INPUT INOUTA OUTB IN+ Figure 32. Single-Ended Input Configuration PCB LAYOUT GUIDELINES As output power increases, interconnect resistance (PCB traces and wires) between the amplifier, load and power supply create a voltage drop. The voltage loss due to the traces between the LM48310 and the load results in lower output power and decreased efficiency. Higher trace resistance between the supply and the LM48310 has the same effect as a poorly regulated supply, increasing ripple on the supply line, and reducing peak output power. The effects of residual trace resistance increases as output current increases due to higher output power, decreased load impedance or both. To maintain the highest output voltage swing and corresponding peak output power, the PCB traces that connect the output pins to the load and the supply pins to the power supply should be as wide as possible to minimize trace resistance. The use of power and ground planes will give the best THD+N performance. In addition to reducing trace resistance, the use of power planes creates parasitic capacitors that help to filter the power supply line. The inductive nature of the transducer load can also result in overshoot on one of both edges, clamped by the parasitic diodes to GND and VDD in each case. From an EMI standpoint, this is an aggressive waveform that can radiate or conduct to other components in the system and cause interference. In is essential to keep the power and output traces short and well shielded if possible. Use of ground planes beads and micros-strip layout techniques are all useful in preventing unwanted interference. As the distance from the LM48310 and the speaker increases, the amount of EMI radiation increases due to the output wires or traces acting as antennas become more efficient with length. Ferrite chip inductors places close to the LM48310 outputs may be needed to reduce EMI radiation. 14 Designator Quantity Description C1 1 10F 10% 16V 500 Tantalum Capacitor (B Case) AVX TPSB106K016R0500 C2, C3 2 1F 10% 16V X7R Ceramic Capacitor (603) Panasonic ECJ-1VB1C105K C4, C5 2 1F 10% 16V X7R Ceramic Capacitor (1206) Panasonic ECJ-3YB1C105K C6 1 Not Installed Ceramic Capacitor (603) R1 1 0 1% resistor (603) JP1 -- JP2 2 3 Pin Headers LM48310SDL 1 LM48310SD (10-pin WSON) Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48310 LM48310 www.ti.com SNAS430D - NOVEMBER 2007 - REVISED MAY 2013 LM48310 Demo Board Schematic PVDD 3 + GND PVDD U1 VDD C1 10 PF VDD PVDD 9 C3 1 PF C2 1 PF PGND 8 IN+ GND OUTA C4 1 IN+ OUTA IN- OUTB 10 1 PF IN- OUTB C5 2 7 1 PF VDD JU1 1 4 2 SD VDD 3 GND JU2 1 2 5 SYNC_IN SYNC_OUT 6 0 3 GND SYNC_IN LM48310SD SYNC_OUT R1 C6 OPEN GND Figure 33. LM48310 DEMO BOARD SCHEMATIC Demo Boards Figure 34. Top Silkscreen Figure 35. Top Layer Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48310 15 LM48310 SNAS430D - NOVEMBER 2007 - REVISED MAY 2013 16 www.ti.com Figure 36. Layer 2 (GND) Figure 37. Layer 3 (VDD ) Figure 38. Bottom Layer Figure 39. Bottom Silkscreen Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48310 LM48310 www.ti.com SNAS430D - NOVEMBER 2007 - REVISED MAY 2013 REVISION HISTORY Rev Date 1.0 11/13/07 Initial release. Description 1.01 02/26/08 Fixed few typos (Pin Description table). 1.02 03/04/08 Text edits under SHUTDOWN FUNCTION (Application Information section). 1.03 06/24/09 Text edits. Changes from Revision C (May 2013) to Revision D * Page Changed layout of National Data Sheet to TI format .......................................................................................................... 16 Submit Documentation Feedback Copyright (c) 2007-2013, Texas Instruments Incorporated Product Folder Links: LM48310 17 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (C) Device Marking (3) (4/5) (6) LM48310SD/NOPB ACTIVE WSON DSC 10 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 GI8 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 Samples PACKAGE MATERIALS INFORMATION www.ti.com 18-Aug-2014 TAPE AND REEL INFORMATION *All dimensions are nominal Device LM48310SD/NOPB Package Package Pins Type Drawing WSON DSC 10 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 1000 178.0 12.4 Pack Materials-Page 1 3.3 B0 (mm) K0 (mm) P1 (mm) 3.3 1.0 8.0 W Pin1 (mm) Quadrant 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 18-Aug-2014 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM48310SD/NOPB WSON DSC 10 1000 210.0 185.0 35.0 Pack Materials-Page 2 MECHANICAL DATA DSC0010A SDA10A (Rev A) www.ti.com IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES "AS IS" AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. 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