LINEAR INTEGRATED CIRCUIT CHIPS GENERAL DESCRIPTION Motorola now offers a very broad selection of linear integrated circuit chips. Among the types of circuits which compose the linear family there are: . Operational Amplifiers Voltage Regulators Comparators . Drivers and Receivers . Sense Amplifiers . D/A and A/D Converters As a general rule of thumb, all linear chips from Motorola are 100% unit probed to the D.C. parameters given in Volume 6 of the Semiconductor Data Library. Far specific information on electrical parameters which are probed contact the nearest Motorola Sales Office. mmooOmp STANDARD FEATURES FOR LINEAR INTEGRATED CIRCUIT CHIPS All linear integrated circuit chips... are 100% electrically tested to sufficient param- eter limits (min/max) to permit distinct identi- fication as either premium or industrial versions @ employ phosphorsilicate passivation which pro- tects the entire active surface area including metallization interconnects during shipping and handling : @ are 100% visually inspected to a modified cri- teria per MIL-STD-883, Method 2010, Condi- tion B @ incorporate a minimum of 4000 A gold backing to ensure positive adherence bonding GENERAL PHYSICAL CHARACTERISTICS OF LINEAR CHIPS The following characteristics represent the vast majority of all Motorola linear chips. Since an indi- vidual chip type may vary slightly, contact your local sales office for information regarding physical charac- teristics critical to a specific application. The overall size and final metallization patterns are shown in the following pages; however the geometries shown and MIC numbers listed are current at the date of print- ing. Since we are constantly striving to improve the quality, performance, and yield of our linear devices we cannot be responsible for changes at future dates. Please contact your local Motorola Sales representative for the most current information. A. Chips thickness: 8 + 1 mil B. Passivation: Phosphorsilicate C. Passivation thickness: 5kA + 1k D. Metallization: Aluminum E. Metallization thickness: 12kA + 2kA F. Back metallization: Gold, alloyed G. Bonding pad dimensions: Typical 4.0 mil x 5.0 mil H. Overall chip dimensions: See pages that follow for individual device type. Tolerance of +5 mils should be allowed. HANDLING PRECAUTIONS Although passivation on all chips provides protec- tion in shipping and handling, care should be exercised to prevent damaging the face of the chip. A vacuum pickup is most useful for this purpose; tweezers are not recommended. There are four basic requirements for handling devices in a prudent manner: 1. Store the chips in a covered or sealed container 2. Store devices in an environment of no more than 30% relative humidity 3. Process the chips in a non-inert atmosphere not exceeding 100C, or in an inert atmosphere not exceeding 400C. 4. Processing equipment should conform to the minimum standards that are normally em- ployed by semiconductor manufacturers. Motorolas engineering staff is available for consul- tation in the event of correlation or processing prob- lems encountered in the use of Motorola linear chips. For assistance, please contact your nearest Motorola sales representative. CHIP AND WAFER PACKAGING Chips Motorolas linear integrated circuit chips come Packaged to the customer in the Multi-Pak carrier. Refer to page 1-11, Figure 7. Wafers Motorolas linear integrated circuit wafers come packaged to the customer in the Wafer-Pak plastic bow. The wafer has been probed and rejects are designated by a red color dot on the die surface. Refer to page 1-8, Figure 2. HOW TO ORDER LINEAR CHIPS OR WAFERS FROM MOTOROLA 1. Remove all suffix package designators from the desired device type. (EXAMPLE: MC1741CP1 now becomes MC1741C) 2. Add a C to the prefix designator if individual chips are desired. (EXAMPLE: MC1741C now is McC1741C) Add a W to the prefix designator if a wafer is de- sired. (EXAMPLE: MC1741C now is MCW1741C) 3. When ordering chips, two options are available: a. The ~1 suffix designator will deliver to you 10 chips per Multi-Pak, up to 1000 chips. (EXAMPLE: MCC1741C-1} 5-2 IATA eT MCC6E6O Series (30 to +75C) Motorolas MHTL integrated circuits are especially designed to meet the requirements of industrial applications because of the outstanding noise immunity. MHTL circuits provide error-free operation in high noise environments far beyond the tolerance of other integrated circuit families. Multifunction packages and broad operating temperature range further tailor this family to the industrial designers requirements. Wafer Chip Mask Size Type Function Set #| (Mils) MCC660 Exp. Dual 4-Input Gate (active pullup) 8MG 45x43 MCC661 Exp. Dual 4-Input Gate (passive pullup) 8MG 45x43 MCC662 Exp. Dual 4-Input Line Driver 1TT 38x44 MCC663 Dual J-K Flip-Flop 2EA 61x62 MCC664 Master Slave R-S Flip-Flop 85M 60x50 MCC665 Triple Level Translator 5MG 40x40 MCC666 Triple Level Translator 4MF 42x49 MCC667 Dual Monostable Multivibrator 1GD 53x57 MCC668 Quad 2-Input Gate (passive pullup) 8MG 45x43 MCC669 Dual 4-Input Expander 59H 30x30) MCC670 Triple 3-Input Gate (passive pullup) 76H 50x58 MCC671 Triple 3-Input Gate (active pullup) 76H 50x58 MCC672 Quad 2-Input Gate (active pullup) 8MG 45x43 MCC673 Dual 2-Input AOI Gate 8MG 45x43 MCC674 Dual 2-Input AOI Gate 8MG 45x43 MCC675 Dual Pulse Stretcher 1MH 55x58 MCC676 BCD-to-Decimal Decoder-Driver 2ME 58x63 MCC677 Hex Inverter With Strobe (active pullup) 95R 52x54 MCC678 Hex Inverter With Strobe (without output resistors) 95R 54x52 MCC679 Dual Lamp Driver 6BE 48x56 MCC680 Hex Inverter 95R 52x54 MCC681 Hex Inverter (O.C.) 95R 52x54 MCC682 Quad Latch 2A4P 64x67 MCC683 Quad 2-Input Exclusive OR 8TJ 53x61 MCC684 Decade Counter 3TA 85x86 MCC685 Binary Counter 3TA 85x86 MCC686 4-Bit Shift Register 3TA 85x86 MCC688 Dual J-K Flip-Flop STW 68x68 MCC689 Hex Inverter (high voltage) 48W 53x55 MCC690 Hex Inverter (active pullup) 48w 53x55 mMcc691 Hex Inverter/Translator 48W 53x55 MCC696 Dual Line Driver Receiver 9DD 58x59 MCC697 Hex Inverter (Passive Pullup) 95R 54x52 MCC699 Dual 2-Input Power AND Gate 3NB 64x66 7-19 MHTL MCC660 Series (continued) MCC684 Decode Counter 85 x 86 (3TA) PIN CONNECTIONS (5) 1qMR ao} 3 (10) (2) 2qso (2) 5ds1 a1 4 (10) 2) 10 _qs$2 Q2/--11 (10) (2) 14_ds3 (1) 6 c a3 13 (10) (1) 7 cE (2) 9 TCj,) Cout{ 12 (10) Vec = Pin 16 GND = Ping ftog = 0.5 MHz min Pp = 480 mW typ/pkg MCC685 Binary Counter 85 x 86 (3TA)} PIN CONNECTIONS (5) 1qmR oof-3 (10) (2) 2-qs0 7 (2) 5ds1 Ql 4 (10) (2) 10 _q $2 14 3 Q2 --11 (10) 8 (2) 4qs (1) 6 c a3 13 (10) (1) 7 CE (2) 9 Tj, COutl 12 (10) 9 Vec = Pin 16 10 GND =Pin8 ftog = 0.5 MHz min 17 12 13 Pp = 480 mW typ/pkg 7-32