SKY65050-372LF - Skyworks Solutions, Inc.

Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com

200967F • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • November 12, 2009 1

DATA SHEET

SKY65050-372LF: 0.45-6.0 GHz Low Noise Transistor

Applications

xWireless infrastructure: WLAN, WiMAX, broadband, cellular base

stations

xTest instrumentation

xLNA for GPS receivers

xSatellite receivers

Features

xExternally matched for wideband operation

xNoise Figure = 0.45 dB @ 2.4 GHz of device only

xNoise Figure = 0.65 dB @ 2.4 GHz including matching network

loss

xGain = 15.5 dB @ 2.4 GHz

xOIP3 = +23.5 dBm @ 2.4 GHz, VDD = 3 V, IDD = 20 mA

xP1dB = +10.5 dBm @ 2.4 GHz, VDD = 3 V, IDD = 20 mA

xAdjustable supply current, 5 to 55 mA

xSmall, SC-70 (4-pin, 2.20 x 1.35 x 1.10 mm) package (MSL3,

260 qC per JEDEC J-STD-020)

Figure 1. SKY65050-372LF Block Diagram

Description

The SKY65050-372LF is a high performance, n-channel low-

noise transistor. The device is fabricated from Skyworks

advanced depletion mode pHEMT process and is provided in a

2.20 x 1.35 x 1.10 mm, 4-pin SC-70 package.

The transistor’s low Noise Figure (NF), high gain, and excellent 3rd

Order Intercept Point (IP3) allow the device to be used in various

receiver and transmitter applications.

A functional block diagram is shown in Figure 1. The pin

configuration and package are shown in Figure 2. Signal pin

assignments and functional pin descriptions are provided in

Table 1.

S1417

SOURCE

DRAIN

SOURCE

GATE

Figure 2. SKY65050-372LF Pinout – 4-Pin SC-70

(Top View)

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Table 1. SKY65050-372LF Signal Descriptions

Pin # Name Description Pin # Name Description

1 SOURCE Source lead. Provides DC self-biasing point

and AC ground.

3 SOURCE Source lead. Provides DC self-biasing point

and AC ground.

2 DRAIN RF output. Requires external matching

network for optimum performance. Supply

voltage required through external RF choke.

4 GATE RF input. Requires external matching

network for optimum performance.

Table 2. Self-Biasing Resistors

Resistor Value (

) Drain Current (mA)

130 5

47 10

27 15

20 20

15 25

10 30

Functional Description

The SKY65050-372LF is a depletion mode pHEMT designed for

low noise, high frequency applications. The SKY65050-372LF has

a typical NF of 0.65 dB tested at the 2.4 GHz wireless LAN

frequency band. A gain of 15.5 dB typical is achieved using the

same circuit. If the frequency of operation is lowered to the 1 GHz

range, NF performance of the device can approach 0.5 dB

including input matching network losses.

De-embedded scattering and noise parameters are provided in

addition to typical circuit topologies for commonly used frequency

bands. With an appropriate circuit, the SKY65050-372LF can be

used for many applications from 450 MHz up to 6 GHz. The

compact SC-70 package makes the SKY65050-372LF an ideal

low noise and low cost solution.

Biasing

To properly bias a depletion mode pHEMT, both the gate and

drain of the device must be properly biased. At VGS = 0 V and

VDS ≥ 2 V, the device is in a saturated state and draws the

maximum amount of current, IDSS. The device typically achieves

the best noise performance at VDS = 3 V and IDSS = 15 mA. To

control IDS, VGS must be biased with a negative voltage supply.

To eliminate the need for a negative DC supply, self-biasing

should be used when a resistor is placed between one of the

source leads and ground. A bypass capacitor should be placed in

parallel to this resistor to provide an RF ground and to ensure

performance remains unchanged at the operating frequency.

When current flows from drain to source and through the resistor,

the source voltage becomes biased above DC ground. The gate

pin of the device should be left unbiased at 0 V, which creates the

desired negative VGS value. This simplifies the design by

eliminating the need for a second DC supply.

Table 2 provides the resistor values used to properly bias the

SKY65050-372LF.

RF Matching Networks

The SKY65050-372LF Evaluation Board assembly diagram is

shown in Figure 12 and a circuit schematic is provided in

Figure 13. The schematic shows the recommended RF matching

network used for the 2.4 GHz wireless LAN frequency band. The

network was designed using de-embedded s- and n-parameters.

The circuit was primarily tuned for gain, NF, and input and output

return loss, while maintaining proper stability.

Optimal noise performance is attained when the impedance

presented to the input of the amplifier is equal to its minimum NF

impedance point. Components C1, C2, C3, L1, and L2 shown in

Figures 12 and 13 provide the necessary impedance match for NF

and input return loss. Circuit board and input matching structure

losses on the input of the amplifier directly add to the overall NF

of the amplifier. It is critical to minimize RF trace lengths and to

use high-Q components to achieve optimal NF performance.

Components R2 and C14 provide self biasing for the device and

RF grounding for one of the two source leads. Components C5

and L3 are placed on the opposing source lead and are used to

tune the transistor’s source inductance.

DATA SHEET • SKY65050-372LF LOW NOISE TRANSISTOR

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The effect of source inductance varies with frequency. Too little

source inductance increases gain and high frequency stability, but

at the cost of decreased in-band stability. Too much source

inductance decreases high frequency stability and gain, but

increases in-band stability. It is very important to find the

optimum tuning of source inductance that balances all of these

variables.

The output matching topology is typical for an RF transistor.

Component L3 is the RF choke that prevents RF signals from

reaching the DC supply. Component C4 is the DC blocking

capacitor. Components C10 and C11 improve output return loss

and 3rd Order Output Intercept Point (OIP3) performance.

Electrical and Mechanical Specifications

The absolute maximum ratings of the SKY65050-372LF are

provided in Table 3. The recommended operating conditions are

specified in Table 4 and electrical specifications are provided in

Table 5.

Performance characteristics for the SKY65050-372LF are

illustrated in Figures 3 through 11.

Table 3. SKY65050-372LF Absolute Maximum Ratings

Parameter Symbol Minimum Typical Maximum Units

Input power PIN +10 dBm

Output power POUT +20 dBm

Drain source voltage VDS 6.0 V

Gate to source voltage VGS –5.0 V

Gate to drain voltage VGD –5.0 V

Drain current IDS 55 mA

Gate current IGS 100 μA

Power dissipation PDIS 240 mW

Channel temperature TCHAN 150 qC

Storage temperature TSTG –65 +125 qC

Operating temperature TOP –40 +85 qC

Note: Exposure to maximum rating conditions for extended periods may reduce device reliability. There is no damage to device with only one parameter set at the limit and all other

parameters set at or below their nominal value. Exceeding any of the limits listed here may result in permanent damage to the device.

CAUTION: Although this device is designed to be as robust as possible, Electrostatic Discharge (ESD) can damage this device. This device

must be protected at all times from ESD. Static charges may easily produce potentials of several kilovolts on the human body

or equipment, which can discharge without detection. Industry-standard ESD precautions should be used at all times.

Table 4. SKY65050-372LF Recommended Operating Conditions

Parameter Symbol Minimum Typical Maximum Units

Supply voltage VDD 2 3 5 V

Supply current IDD 5 20 55 mA

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Table 5. SKY65050-372LF Electrical Specifications (Note 1)

(TOP = +25

C, Characteristic Impedance [ZO] = 50

, VDD = 3 V, IDD = 20 mA, Parameters Include a 2.4 GHz Matching Network, Unless

Otherwise Noted)

Parameter Symbol Test Condition Min Typical Max Units

Saturated drain current IDSS VDS = 2 V, VGS = 0 V 40 55 70 mA

Pinchoff voltage VP VDS = 2 V, IDS = 2.5% of

IDSS

–0.95 –0.80 –0.65 V

Transconductance gM VDS = 2 V,

gM = ΔIDS/ΔVGS,

measured at IDS = 20 % of

IDSS

40 80 120 mS

Gate leakage current IGSS VGD = VGS = –3 V 1 200 μA

Noise Figure NF1 (Note 2)

NF2 (Note 3)

@ 2.4 GHz 0.40

0.65

0.85 dB

Gain |S21| @ 2.4 GHz 13.5 15.5 17.5 dB

Input return loss |S11| @ 2.4 GHz 18.5 dB

Output return loss |S22| @ 2.4 GHz 14 dB

Reverse isolation |S12| @ 2.4 GHz 22.5 dB

3rd Order Output Intercept Point OIP3 POUT = –10 dBm/tone,

ΔF = 1 MHz, @ 2.4 GHz

+23.5 dBm

3rd Order Input Intercept Point IIP3 POUT = –10 dBm/tone,

ΔF = 1 MHz, @ 2.4 GHz

+8 dBm

1 dB Output Compression Point OP1dB @ 2.4 GHz +10.5 dBm

1 dB Input Compression Point IP1dB @ 2.4 GHz –4 dBm

Stability K Unconditionally stable,

DC – 18 GHz

>1 –

Note 1: Performance is guaranteed only under the conditions listed in this Table and is not guaranteed over the full operating or storage temperature ranges. Operation at elevated

temperatures may reduce reliability of the device.

Note 2: NF of device only. Input RF connector, board, and input matching network loss de-embedded from measurement.

Note 3: NF of device and matching network. Input RF connector and board loss de-embedded from measurement.

Typical Performance Characteristics

(TOP = +25

C, Characteristic Impedance [ZO] = 50

, VDD = 3 V, IDD = 20 mA, Includes a 2.4 GHz Matching Network, Unless Otherwise

Noted)

012345

(mA)

0 V

–0.1 V

–0.4 V

–0.2 V

–0.3 V

–0.5 V

–0.6 V

–0.7 V

(V)

Figure 3. Typical IV Curves

1800 1900 2000 2100 2200 2300 2400 2500 2600 2700 2800

Frequency (MHz)

Small Signal Gain (dB)

Figure 4. Small Signal Gain vs Frequency, PIN = –20 dBm

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–50

–45

–40

–35

–30

–25

–20

–15

–10

–5

1800 1900 2000 2100 2200 2300 2400 2500 2600 2700 2800

Frequency (MHz)

Input Return Loss (dB)

Figure 5. Input Return Loss vs Frequency, PIN = –20 dBm

–20

–18

–16

–14

–12

–10

–8

–6

–4

–2

1800 1900 2000 2100 2200 2300 2400 2500 2600 2700 2800

Frequency (MHz)

Output Return Loss (dB)

Figure 7. Output Return Loss vs Frequency, PIN = –20 dBm

10.0

10.5

11.0

11.5

12.0

12.5

13.0

13.5

14.0

14.5

15.0

15.5

16.0

–20 –18 –16 –14 –12 –10 –8 –6 –4 –2 0 +2

Input Power (dBm)

Gain (dB)

Figure 9. Gain vs Input Power, F = 2.4 GHz

–40

–35

–30

–25

–20

–15

–10

–5

1800 1900 2000 2100 2200 2300 2400 2500 2600 2700 2800

Frequency (MHz)

Reverse Isolation (dB)

Figure 6. Reverse Isolation vs Frequency, PIN = –20 dBm

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

2300 2350 2400 2450 2500

Frequency (MHz)

Noise Figure (dB)

Figure 8. NF vs Frequency, Input RF Connector and Board Loss

De-Embedded From Measurement

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

0123456

Frequency (GHz)

Minimum NF (dB)

Associated Gain (dB)

Figure 10. Minimum NF and Associated Gain vs Frequency,

IDD = 15 mA

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0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

0102030405060

Drain Current (mA)

Minimum Noise Figure (dB)

2.5

5.0

7.5

10.0

12.5

15.0

17.5

20.0

22.5

25.0

Associated Gain (dB)

Figure 11. Minimum NF and Associated Gain vs Drain Current,

F = 2.4 GHz

Evaluation Board Description

The SKY65050-372LF Evaluation Board is used to test the

performance of the SKY65050-372LF low noise transistor. An

assembly drawing for the Evaluation Board is shown in Figure 12.

The Evaluation Board schematic diagram is shown in Figure 13.

Table 6 provides the Bill of Materials (BOM) list for Evaluation

Board components.

The board is populated for 2.4 GHz operation and contains a

separate probe footprint for general device testing or source and

load pull characterization. The board is provisioned with two RF

connectors and a 3-pin DC launch. The RF connector and board

loss up to component C1 is approximately 0.15 dB at 2.4 GHz.

Board material is 10 mil thick VT47 FR4 with 1 oz. copper

cladding. RF input and output traces are 50 Ω.

Evaluation Board Test Procedure

Step 1: Connect RF test equipment to amplifier input/output SMA

connectors.

Step 2: Connect DC ground.

Step 3: Connect VDD to a +3 V supply with a current limit of

60 mA. Verify that the board draws approximately 20 mA.

Step 4: Apply RF signal or noise source and verify performance

detailed in Table 5.

Package Dimensions

The PCB layout footprint for the SKY65050-372LF is shown in

Figure 14. Typical case markings are shown in Figure 15.

Package dimensions for the 4-pin SC-70 are shown in Figure 16,

and tape and reel dimensions are provided in Figure 17.

Package and Handling Information

Since the device package is sensitive to moisture absorption, it is

baked and vacuum packed before shipping. Instructions on the

shipping container label regarding exposure to moisture after the

container seal is broken must be followed. Otherwise, problems

related to moisture absorption may occur when the part is

subjected to high temperature during solder assembly.

THE SKY65050-372LF is rated to Moisture Sensitivity Level 3

(MSL3) at 260 qC. It can be used for lead or lead-free soldering.

Care must be taken when attaching this product, whether it is

done manually or in a production solder reflow environment.

Production quantities of this product are shipped in a standard

tape and reel format. For packaging details, refer to the Skyworks

Application Note, Discrete Devices and IC Switch/Attenuators

Tape and Reel Package Orientation, document number 200083.

DATA SHEET • SKY65050-372LF

Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com

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S1410

C15 C13

C9 L5 C11

C12

C10

OUT

VDD

C14

L1 C4

Figure 12. SKY65050-372LF Evaluation Board Assembly Diagram

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RF Output

VDD

RF Input

S1406

C9 C11

C10

C12

C14 C15

Note: Some component labels may be different than the

corresponding component symbol shown here.

Component values, however, as noted in Table 6,

are accurate as of the date of this Data Sheet.

Figure 13. SKY65050-372LF Evaluation Board Schematic

Table 6. SKY65050-372LF (SC-70 Package) Evaluation Board Bill of Materials

Component Value Size Manufacturer/Part Series

C1 20 pF 0402 Murata GJM

C2 8.2 nH 0402 Coilcraft CS

C3 0.1 pF 0402 Murata GJM

C4, C7, C8, C13 DNP

C5 1000 pF 0402 Murata GRM

C6 10 pF 0402 Murata GRM

C9 1.8 pF 0402 Murata GRM

C10 0.2 pF 0402 Murata GJM

C11 3.3 nH 0402 TDK MLG

C12 6.8 nH 0402 TDK MLG

C14 1000 pF 0402 Murata GRM

C15 1000 pF 0402 Murata GRM

L1 1.5 pF 0402 Murata GJM

L2 3.3 nH 0402 Coilcraft CS

L3 1.6 nH 0402 TDK MLG

L4 3 Ω 0402 Panasonic

L5 0 Ω 0402 Panasonic

R1 2.2 nH 0402 TDK MLG

R2 20 Ω 0402 Panasonic

DATA SHEET • SKY65050-372LF LOW NOISE TRANSISTOR

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Exposed Solder Areas

(Hatched Areas)

Package

Outline

4X 0.750

3X 0.400

0.500

0.650

0.822

4X 0.450

0.650

ll dimensions are in millimeters

S1408

Figure 14. SKY65050-372LF PCB Layout Footprint

Top View (Die Down)

Skyworks

Part Number 43

Bottom View (Die Up)

LOT #

Figure 15. Typical Part Markings

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1.80/2.20

Pin 1

0.15/0.30 0.575/0.700

1.80/2.40 1.15/1.35

0.10/0.30

0.10/0.40

0.10/0.18

0.65

0.80/1.00

0.00/0.10

0.80/1.10

0.5

0.65

0.10 A

S1409

Dimensioning and tolerancing according to ASME Y14.5M-1994.

ll measurements are in millimeters

Figure 16. SKY65050-372LF 4-Pin SC-70 Package Dimensions

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Notes:

1. Carrier tape: black conductive polystyrene.

2. Cover tape material: transparent conductive HSA.

3. Cover tape size: 5.40 mm width.

4. Ten sprocket hole pitch cumulative tolerance ±0.20 mm.

5. All measurements are in millimeters.

2.25 ± 0.10 (Ao)

0.30 ± 0.05

2.70 ± 0.10 (Bo)

8.00 +0.30/–0.10

4.00 (Note 4)

4.00 ± 0.10

Pin 1

location

3.50 ± 0.05

2.00 ± 0.05 1.75 ± 0.10

1.20 ± 0.10 (Ko)

∅1.50+ 0.10/–0.00

∅1.00 Min.

R0.30 Typ.

S1620

Figure 17. SKY65050-372LF Tape and Reel Dimensions

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Ordering Information

Model Name Manufacturing Part Number Evaluation Board Part Number

SKY65050-372LF Low Noise Transistor SKY65050-372LF (Pb-free and Green package) SKY65050-372LF (2400 MHz)

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