ST0201 package
Features
Low clamping voltage:
11 V (IEC 61000-4-2 contact discharge at 30 ns)
Bidirectional diode
Low leakage current
ST0201 package
Complies with the following standards: IEC 61000-4-2 level 4 (exceeds level 4)
±30 kV (air discharge)
±30 kV (contact discharge)
Application
Where transient over voltage protection in ESD sensitive equipment is required, such
as:
Smartphones, mobile phones and accessories
Tablet, PC, netbooks and notebooks
Portable multimedia devices and accessories
Digital cameras and camcorders
Communication and highly integrated systems
Description
The ESD051-1BF4 is a bidirectional single line TVS diode designed to protect the
power line against EOS and ESD transients.
The device is ideal for applications where board space saving is required.
Product status link
ESD051-1BF4
5 V low clamping single line bidirectional ESD protection
ESD051-1BF4
Datasheet
DS12643 - Rev 3 - June 2019
For further information contact your local STMicroelectronics sales office.
www.st.com
1Characteristics
Table 1. Absolute maximum ratings (Tamb = 25 °C)
Symbol Parameter Value Unit
Vpp Peak pulse voltage IEC 61000-4-2 contact discharge
IEC 61000-4-2 air discharge
±30
±30 kV
Ppp Peak pulse power (8/20 μs) 110 W
Ipp Peak pulse current (8/20 μs) 10 A
TjOperating junction temperature range -55 to 150
°C
Tstg Storage junction temperature range -65 to 150
TLMaximum lead temperature for soldering during 10 s 260
Figure 1. Electrical characteristics (definitions)
Symbol Parameter
V=Breakdown voltage
I=Leakage current @V
V=Stand-off voltage
I=Peak pulse current
R
BR
RM RM
RM
PP
V=Clamping voltage
CL
D=Dynamic resistance
IR=Breakdown current
VCLVBR VRM
IRM
IR
IPP
V
I
IRM
IR
IPP
VRMVBR VCL
V
I
Table 2. Electrical characteristics (values) (Tamb = 25° C)
Symbol Parameter Test condition Min. Typ. Max. Unit
VRM Reverse working voltage 5 V
VBR Breakdown voltage IR = 1 mA 5.8 V
IRM Leakage current VRM = 5 V 70 nA
VCL Clamping voltage IEC 61000-4-2, 8 kV
contact measured at 30 ns 11 V
RDDynamic resistance, pulse duration 100 ns(1) 0.145
CLINE Line capacitance VLINE = 0 V, F = 1 MHz, VOSC = 30 mV 45 pF
1. More information are available in ST application note: AN4022
ESD051-1BF4
Characteristics
DS12643 - Rev 3 page 2/10
1.1 Characteristics (curves)
Figure 2. Variation of leakage current versus junction
temperature
IR(n A)
Tj(°C)
1
10
100
25 50 75 100 125 150
VR =VRM = 5 V
Figure 3. Junction capacitance versus frequency
0
10
20
30
40
50
60
0.00 1.00 2.00 3.00 4.00 5.00 6.00
C(pF)
F=1 MHz
Vosc=30 mVRMS
Tj=25 °C
VR(V)
Figure 4. ESD response to IEC 61000-4-2 (+8 kV contact
discharge)
9 V
4
23 V
1
11 V
2
11 V
3
2
V : Peak clamping voltage
CL
V :clamping voltage at 30 ns
CL
V :clamping voltage at 60 ns
CL
V :clamping voltage at 100 ns
CL
1
2
3
4
20 ns/div
5 V/div
Figure 5. ESD response to IEC 61000-4-2 (-8 kV contact
discharge)
V : Peak clamping voltage
CL
V :clamping voltage at 30 ns
CL
V :clamping voltage at 60 ns
CL
V :clamping voltage at 100 ns
CL
1
2
3
4
-9 V
4
20 ns/div
5 V/div
-21 V
1
-11
-12 V
3
2
Figure 6. TLP
-30
-20
-10
0
10
20
30
-15 -10 -5 0 5 10 15
TLP Current (A)
I-V TLP
TLP Voltage (V)
Figure 7. S21 attenuation
-50
100K 1M 10M 100M 1G 10G
-45
-40
-35
-30
-25
-20
-15
-10
-5
0S21 (dB)
F (Hz)
ESD051-1BF4
Characteristics (curves)
DS12643 - Rev 3 page 3/10
2Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
status are available at: www.st.com. ECOPACK is an ST trademark.
2.1 ST0201 package information
Figure 8. ST0201 package outline
Table 3. ST0201 package mechanical data
Ref.
Dimensions
Millimeters Inches
Min. Typ. Max. Min. Typ. Max.
A 0.280 0.300 0.320 0.0110 0.0118 0.0126
b 0.125 0.140 0.155 0.0049 0.0055 0.0061
D 0.570 0.600 0.630 0.0224 0.0236 0.0248
D1 0.350 0.0138
E 0.270 0.300 0.330 0.0106 0.0118 0.0130
E1 0.175 0.190 0.205 0.0069 0.0075 0.0081
fD 0.040 0.055 0.070 0.0015 0.0021 0.0028
fE 0.040 0.055 0.070 0.0115 0.0021 0.0028
ESD051-1BF4
Package information
DS12643 - Rev 3 page 4/10
Figure 9. Marking
Pin 1 Pin 2
5
Note: Marking can be rotated by 90° or 180° to differentiate assembly location.
Figure 10. Tape and reel specification
Bar indicates Pin 1
ESD051-1BF4
ST0201 package information
DS12643 - Rev 3 page 5/10
3Recommendation on PCB assembly
3.1 Footprint
Figure 11. Footprint in mm
0.243
(0.0096)
0.170
(0.0067)
0.300
(0.0118)
0.243
(0.0096)
0.656
(0.0258)
3.2 Stencil opening design
1. Recommended design reference
a. Stencil opening dimensions: 75 µm
Figure 12. Stencil opening recommendations
0.285
0.183
0.230
Stencil apertures
ESD051-1BF4
Recommendation on PCB assembly
DS12643 - Rev 3 page 6/10
3.3 Solder paste
1. Halide-free flux qualification ROL0 according to ANSI/J-STD-004.
2. “No clean” solder paste is recommended.
3. Offers a high tack force to resist component movement during high speed.
4. Use solder paste with fine particles: powder particle size 20-48 µm.
3.4 Placement
1. Manual positioning is not recommended.
2. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering
3. Standard tolerance of ±0.05 mm is recommended.
4. 1.0 N placement force is recommended. Too much placement force can lead to squeezed out solder paste
and cause solder joints to short. Too low placement force can lead to insufficient contact between package
and solder paste that could cause open solder joints or badly centered packages.
5. To improve the package placement accuracy, a bottom side optical control should be performed with a high
resolution tool.
6. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder
paste printing, pick and place and reflow soldering by using optimized tools.
3.5 PCB design preference
1. To control the solder paste amount, the closed via is recommended instead of open vias.
2. The position of tracks and open vias in the solder area should be well balanced. A symmetrical layout is
recommended, to avoid any tilt phenomena caused by asymmetrical solder paste due to solder flow away.
3.6 Reflow profile
Figure 13. ST ECOPACK® recommended soldering reflow profile for PCB mounting
Note: Minimize air convection currents in the reflow oven to avoid component movement. Maximum soldering profile
corresponds to the latest IPC/JEDEC J-STD-020.
ESD051-1BF4
Solder paste
DS12643 - Rev 3 page 7/10
4Ordering information
Figure 14. Ordering information scheme
ESD 05 1 - B F4
ESD Array
Breakdown voltage
5 = 5.8 V typ.
Number of lines
Package
F4 = ST0201
Directionnal
B = Bidirectional
Table 4. Ordering information
Order code Marking Weight Base qty. Delivery mode
ESD051-1F4 5 0.12 mg 15000 Tape and reel
ESD051-1BF4
Ordering information
DS12643 - Rev 3 page 8/10
Revision history
Table 5. Document revision history
Date Revision Changes
04-Jul-2018 1 First issue.
15-May-2019 2 Updated Table 2.
03-Jun-2019 3 Updated Table 2 and Figure 6.
ESD051-1BF4
DS12643 - Rev 3 page 9/10
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST
products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST
products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service
names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2019 STMicroelectronics – All rights reserved
ESD051-1BF4
DS12643 - Rev 3 page 10/10