Features
• Ultra small surface mount package
• Minimal height: 2.5 mm
•V
CC from 2.7 to 3.6 volts
• Withstands > 100 mVp-p power supply ripple
• LED supply voltage can range from 2.7 to 6.0
volts
• Low shutdown current
– 20 nA typical
• Lead-free and RoHS compliant
• Complete shutdown
– TxD, RxD, PIN diode
• One optional external component
• Temperature range:
-25°C to 85°C
• 32 mA LED drive current
• Integrated EMI shield
• IEC825-1 Class 1 eye safe
• Edge detection input
– Prevents the LED from long turn on time
IrDA 1.4
LOW POWER
IrDA 1.0/1.4
STANDARD OR
LOW POWER
30° ILLUMINATION CONE
CELL PHONES
PAGERS
PDAs
CAMERAS
CELL PHONES
PAGERS
PRINTERS
PCs
PDAs
CAMERAS
20 CM TO LOW POWER DEVICES
30 CM TO STANDARD DEVICES
HSDL-3201
IrDA® Data 1.4 Low Pow er Compliant
115.2 kb/s Infrared Transceiv er
Data Sheet
2
Description
The HSDL-3201 is one of a new
generation of low-cost Infrared (IR)
transceiver modules from Avago
Technologies. It features the smallest
footprint in the industry at 2.5 H x 8.0
W x 3.0 D mm. Although the supply
voltage can range from 2.7 V to 3.6 V,
the LED drive current is internally
compensated to a constant 32 mA to
assure that link distances meet the
IrDA Data 1.4 (low power) physical
layer specifications.
The HSDL-3201 meets the 20 cm link
distance to other IrDA 1.4 low power
devices, and a 30 cm link distance to
IrDA 1.4 standard devices.
Application Circuit
HSDL-3201#021 Pinout,
Rear View
VLED
TXD 7
LED
CURRENT
SOURCE
RXD 6
SHUT DOWN 5
RX PULSE
SHAPER
TXD
8 VLED
4 AGND
SD
RXD
V
CC
3V
CC
2NC
1 GND
C1
1.0 µF
SHIELD
87654321
HSDL-3201#008 Pinout,
Rear View
87654321
Applications
• Mobile telecom
– Cellular phones
– Pagers
– Smart phones
• Data communication
– PDAs
– Portable printers
• Digital imaging
– Digital cameras
– Photo-imaging printers
I/O Pins Configuration Table
Pin Symbol Description Notes
1 GND Ground Connect to system ground.
2 NC No Connection This pin must be left unconnected.
3V
CC Supply Voltage Regulated: 2.7 to 3.6 Volts
4 AGND Analog Ground Connect to a “quiet” ground.
5 SD Shut Down This pin must be driven either high or
Active High low. Do NOT float the pin.
6 RXD Receiver Data Output is a low pulse for 2.4 µs
Output. Active Low. when a light pulse is seen.
7 TXD Transmitter Data Logic high turns the LED on. If held
Input. Active High. high longer than ~ 20 µs, the LED is
turned off. TXD must be driven high
or low. Do NOT float the pin.
8 VLED LED Voltage May be unregulated: 2.7 to 6.0 volts.
- SHIELD EMI Shield Connect to system ground via a low
inductance trace. For best
performance, do not directly connect
to GND or AGND at the part.
3
Recommended Application Circuit Components
Component Recommended Value Note
C1 1.0 µF1
Absolute Maximum Ratings
For implementations where case to ambient thermal resistance is ≤ 50°C/W.
Parameter Symbol Min. Max. Units
Storage Temperature TS-40 100 °C
Operating Temperature TA-25 85 °C
LED Supply Voltage VVLED -0.5 7 V
Supply Voltage VCC -0.5 7 V
Input Voltage: TXD, SD VI0V
CC + 0.5 V
Output Voltage: RXD VO-0.5 VCC + 0.5 V
Solder Reflow See Reflow Profile, page 19
Temperature Profile
Transceiver I/O Truth Table
The LED and RXD outputs are
controlled by the combination of the
TXD and SD pins and light falling on
the receiver. As shown in the table
below, the transmitter is non-
inverting; the LED is on when the TXD
pin is high and off when TXD is low.
The receiver is inverting; the RXD pin
is low during IrDA signal pulses and
high when the receiver does not see
any light. When shutdown (SD pin
high), the LED is off (the state of the
TXD pin does not matter), and the
RXD pin is pulled high with a weak
internal pullup.
Shutdown Mode Notes
When the HSDL-3201 is in Shutdown
Mode (SD pin high), the part presents
different impedances to the rest of the
circuit than when it is in normal mode.
RXD Pin: This pin is NOT Tri-state.
During shutdown the equivalent circuit
is a weak pullup (~300 kΩ) to VCC. The
ESD protection diodes to VCC and
Ground are also present.
TXD Pin: Input protection diodes are
present.
VLED Pin: Possible leakage current of
1.5 nA.
SD Pin: Will draw approximately 16 nA
when driven high.
Marking Information
The unit is marked with the letter “A”
and “YWWLL” on the shield for front
options where Y is the last digit of the
year, WW is the workweek, and LL is the
lot information. For top options, the
part is marked as “YWW” where Y is the
last digit of the year, and WW is the
workweek.
Ordering Information
Specify the part number followed by
an option number.
HSDL-3201#XXX
There are two options available:
Front Options
#021 Taped and 13” Reel
Packaging, 2500 per reel
Top Options
#008 Taped and 13” Reel
Packaging, 2500 per reel
SD TXD LED Receiver RXD Notes
High On Don’t care Not Valid 2, 3
Low Low Off IrDA Signal Low 4, 5
No Signal High
High Don’t care Off Don’t care High 6
Caution: The BiCMOS inherent to this design of this component increases
the component’s susceptibility to damage from electrostatic discharge
(ESD). It is advised that normal static precautions be taken in handling and
assembly of this component to prevent damage and/or degradation which
may be induced by ESD.
4
RXD Output Waveform
LED Optical Waveform
TXD “Stuck ON” Protection
Receiver Wakeup Time Definition
Transmitter Wakeup Time Definition
t
f
V
OH
90%
50%
10%
V
OL
t
pw
t
r
t
f
LED OFF
90%
50%
10%
LED ON
t
pw
t
r
t
pw (MAX.)
TXD
LED
RX
LIGHT
t
RW
RXD
SD
TX
LIGHT
tTW
TXD
SD
Recommended Operating Conditions
Parameter Symbol Min. Max. Units Conditions Notes
Operating Temperature TA-25 85 °C
Supply Voltage VCC 2.7 3.6 V
LED Supply Voltage VLED 2.7 6.0 V
TXD, SD Input Logic High VIH 2/3 VCC VCC V
Voltage Logic Low VIL 0 1/3 VCC V
Receiver Input Logic High EIH0.0081 500 mW/cm2For in-band signals. 7
Irradiance Logic Low EIL0.3 µW/cm2For in-band signals. 7
Receiver Data Rate 2.4 115.2 kb/s
5
Electrical & Optical Specifications
Specifications hold over the recommended operating conditions unless otherwise noted. Unspecified test conditions
may be anywhere in their operating range. All typical values are at 25°C and 3.0 V unless otherwise noted.
Parameter Symbol Min. Typ. Max. Units Conditions Note
Receiver
Viewing Angle 2f1/2 30 °
Peak Sensitivity lp 880 nm
Wavelength
RXD Output Logic High VOH VCC -0.2 VCC VI
OH=-200 µA, EI ≤ 0.3 µW/cm2
Voltage Logic Low VOL 00.4VI
OL=200 µA8
RXD Pulse Width tPW 2.0 2.45 3.0 µs8
RXD Rise Time tR11 20 ns tPW (EI)=1.6 µs, CL =10 pF
RXD Fall Time tF16 25 ns tPW (EI)=1.6 µs, CL =10 pF
Receiver Latency Time tL25 50 µs9
Receiver Wake Up Time tRW 28 40 µs10
Transmitter
Radiant Intensity EIH4 9 28.8 mW/Sr TA = 25°C, q1/2 ≤ 15°, TXD ≥ 2/3 VCC
Viewing Angle 2q1/2 30 60 °
Peak Wavelength lp875 nm
Spectral Line Half Width Dl1/2 35 nm
Optical Pulse Width tOPW 1.41 1.6 2.23 µst
PW (TXD) = 1.6 µs
Max. Optical Pulse Width tOPWM 20 30 µs TXD pin stuck high
Optical Rise Time tOR 180 600 ns tPW (TXD) = 1.6 µs
Optical Fall Time tOF 180 600 ns tPW (TXD) = 1.6 µs
TXD Logic High VIH 2/3 VCC VCC V
Levels Low VIL 0 1/3 VCC V
TXD Input High IH25 nA VI ≥ 2/3 VCC
Current Low IL-15 nA 0 ≤ VI ≤ 1/3 VCC
LED On IVLED 32 mA VVLED=VCC=3.6 V, VI(TXD) ≥ 2/3 VCC
Current Off IVLED 1.5 nA VVLED=VCC=3.6 V, VI(TXD) ≤ 1/3 VCC
Shutdown IVLED 1.5 nA VI(SD) ≥ 2/3 VCC
Transmitter Wake Up Time tTW 12 20 µs11
Transceiver
SD Logic High VIH 2/3 VCC VCC V
Levels Low VIL 0 1/3 VCC V
SD Input High IH16 nA VI ≥ 2/3 VCC
Current Low IL-150 nA 0 ≤ VI ≤ 1/3 VCC
DC Supply Shutdown ICC1 20 200 nA VCC=3.6 V,VSD ≥ VCC - 0.5, TA=25°C
Current Idle ICC2 100 µAV
CC=3.6 V, VI(TXD) ≤ 1/3 VCC, EI=0
AC Supply Active, ICC3 0.8 3.0 mA VCC=3.6 V, VI(TXD) ≤ 1/3 VCC 12,13
Current Receive
Active, ICC4 9.0 mA VCC=3.6 V, VI(TXD) ≥ 2/3 VCC 14
Transmit
Notes at top of next page.
6
Notes on Supply Current
The supply current for the
HSDL-3201 has two different
components, DC and AC.
The DC component is measured in
two states, normal (idle mode) and
shutdown. This current is present
whenever power is applied to the
part.
The AC component is either the extra
current drawn from the VCC pin by the
photodiode when it sees light, or the
current needed by the LED current
circuit. The values in the table are peak
values. Since IrDA data is transmitted
with a 3/16 duty cycle, the average
value is 3/16 of the peak. The AC
current is not drawn when no light is
present.
Notes:
1. C1 must be placed within 0.7 cm of the HSDL-3201 to obtain optimum noise immunity.
2. If TXD is stuck in the high state, the LED will turn off after about 20 µs.
3. RXD will echo the TXD signal while TXD is transmitting data.
4. In-Band IrDA signals and data rates ≤ 115.2 Kb/s.
5. RXD Logic Low is a pulsed response. The pulse width is 2.4 µs, independent of data rate.
6. RXD Logic High during shutdown is a weak pullup resistor (300 kΩ).
7. An in-band optical signal is a pulse/sequence where the peak wavelength, lp, is defined as 850 nm ≤ lp ≤ 900 nm, and the pulse characteristics
are compliant with the IrDA Serial Infrared Physical Layer Link Specification.
8. For in band signals ≤115.2 Kb/s where 8.1 µW/cm2 ≤ EI ≤ 500 mW/cm2.
9. Latency is defined as the time from the last TXD light output pulse until the receiver has recovered full sensitivity.
10. Receiver wake up time is measured from the SD pin high to low transition or VCC power on, to a valid RXD output.
11. Transmitter wake up time is measured from the SD pin high to low transition or VCC power on, to a valid light output in response to a TXD pulse.
12. Typical values are at EI = 10 mW/cm2
13. Maximum value is at EI = 500 mW/cm2.
14. Current is due to internal stages of the LED current mirror. This current is in addition to the ILED current.
Figure 1. LED current vs. VCC. Figure 2. LED current vs. VLED.
ILED – mA
34.0
V
CC
– VOLTS
32.5
3.1 3.4
31.0
31.5
2.7 3.6
33.0
2.8 3.2
33.5
32.0
2.9 3.0 3.3 3.5
VLED = 3.6 VOLTS
ILED – mA
34.0
VLED – VOLTS
32.5
3.1 3.4
31.0
31.5
2.7 3.6
33.0
2.8 3.2
33.5
32.0
2.9 3.0 3.3 3.5
VCC = 3.6 VOLTS
VCC = 3.3 VOLTS
VCC = 3.0 VOLTS
VCC = 2.7 VOLTS
Distances between Units to
See a 10 mW/cm2 Light
Level
Type of
Transceiver Distance (cm)
Typical HSDL-3201 1.0
Max. Brightness 1.7
HSDL-3201
Typical SIR 2.0
Typical FIR 3.2
The 500 mW/cm2 light level is for the
maximum brightness IrDA unit at 1
cm.
7
HSDL-3201#021 Package Dimensions
;;
2.85
MOUNTING
CENTER 4.0
1.025
UNIT: mm
TOLERANCE: ± 0.2 mm
COPLANARITY = 0.1 mm MAX.
C
L
2.5
4.0
8.0
2.05
2.55
EMITTERRECEIVER
0.35
0.65
0.80
C
L
3.325
6.65
0.6
2.93.0 1.85
;;
;
;
;;
;
;
;;
1.05
1.25
1.175
2.2
PIN 1
8
HSDL-3201#021 Tape and Reel Dimensions
16.4 + 2
0
21 ± 0.8
UNIT: mm
BC
∅ 13.0 ± 0.5
2.0 ± 0.5
2.0 ± 0.5
LABEL
3.4 ± 0.1
8.4 ± 0.1
8.0 ± 0.1
4.0 ± 0.1
1.5 ± 0.1
7.5 ± 0.1 16.0 ± 0.2
1.75 ± 0.1
∅ 1.5+ 0.1
0
0.4 ± 0.05
2.8 ± 0.1
POLARITY
PIN 8: VLED
PIN 1: GND
OPTION # "B" "C" QUANTITY
001
021
178
330
60
80
500
2500
EMPTY PARTS MOUNTED LEADER
EMPTY
(40 mm MIN.) (400 mm MIN.)
(40 mm MIN.)
PROGRESSIVE DIRECTION
R 1.0
DETAIL A
DETAIL A
UNIT: mm
9
HSDL-3201#008 Package Dimensions
Pin Symbol Description
1 GND Ground
2 NC No Connection
3V
CC Supply Voltage
4 AGND Analog Ground
5 SD Shutdown (Active High)
6 RxD Receive Data
7 TxD Transmit Data
8 VLED LED Voltage
9 EMI Shield EMI Shield
C
L
5.1
7.5
2.8
3.325
0.95 x 7 = 6.65 ± 0.15
0.6 ± 0.15
0 ± 0.05 (MAX.)
+0.05
-0.2
1.8+0.05
-0.2
22
3.6
1.55
2.35
C
L
;
UNIT: mm
TOLERANCE: ± 0.2 mm
COPLANARITY = 0.1 mm MAX.
0.4 ± 0.15
0.95 ± 0.1
0.7 ± 0.1
2.8 3.35
1.55
;;
;
;
;;
;
;;
;
0.3
10
HSDL-3201#008 Tape and Reel Dimensions
Bo
P1
Po
W
E
1.5
Ko
Do
F
P2
D1 B
B
5°(MAX.)
;;;
5°(MAX.)
Ao
AA
A-A SECTION
B-B SECTION
SYMBOL Ao Bo Ko Po P1 P2 T
SPEC 3.65 ± 0.10 7.90 ± 0.10 2.75 4.00 ± 0.10 8.00 ± 0.10 2.00 ± 0.10 0.40 ± 0.10
SYMBOL E F Do D1 W 10Po
SPEC 1.75 ± 0.10 7.50 ± 0.10 1.55 ± 0.05 1.50 (MIN.) 16.00 ± 0.30 40.00 ± 0.20
UNIT: mm
5°3.1 ± 0.1
;;
;;
;;
5°
2.6
+0.05
- 0.10
16.0 +0.5
-0
∅ 13.1
DETAIL A
(5/1)
+0.5
-0
120°
60°TYP.
∅ 99.5 ± 1
∅ 330 ± 1
∅ 264
NOTES:
1. 10 SPROKET HOLE PITCH CUMULATIVE TOLERANCE IS ± 0.2 mm.
2. CARRIER CAMBER SHALL NOT BE MORE THAN 1 mm PER 100 mm THROUGH A LENGTH OF 250 mm.
3. Ao AND Bo MEASURED ON A PLACE 0.3 mm ABOVE THE BOTTOM OF THE PACKET.
4. Ko MEASURED FROM A PLACE ON THE INSIDE BOTTOM OF THE POCKET TO TOP SURFACE OF CARRIER.
5. POCKET POSITION RELATIVE TO SPROCKET HOLE MEASURED AS TRUE POSITION OF POCKET, NOT POCKET HOLE.
PS
2
1
3
T
11
Moisture Proof Packaging
The HDSL-3201 is shipped in moisture
proof packaging. Once opened,
moisture absorption begins.
This part is compliant to JEDEC Level
4.
Recommended Storage
Conditions
Storage 10°C to 30°C
Temperature
Relative below 60% RH
Humidity
Time from Unsealing to
Soldering
After removal from the bag, the parts
should be soldered within three days
if stored at the recommended storage
conditions.
Baking
If the parts are not stored in dry
conditions, they must be baked
before reflow to prevent damage to
the parts.
Package Temp. Time
In reels 60°C≥ 48 hours
100°C≥ 4 hours
In bulk 125°C≥ 2 hours
150°C≥ 1 hour
Baking should only be done once.
Recommended Land Pattern for HSDL-3201#021
(Front Options)
0.60
1.25
1.75
1.35
0.10
0.475 1.425 2.375 3.325
C
L
MOUNTING
CENTER
SHIELD
SOLDER PAD
FIDUCIAL
2.05
0.775
UNIT: mm
Recommended Land Pattern for HSDL-3201#008
(Top Options)
0.60
0.9
;;
;;
2.20
3.625
MOUNTING CENTER 0.575
1.60
;;
;;
;;
;;
;;
;;
;;
;;
;;
;;
;;
;;
;;
;;
PITCH 7 x 0.95
;;;
;;
;;
;;
1.275
1.45
12
Recommended Metal Solder
Stencil Aperture
It is recommended that only a 0.127
mm (0.005 inches) or a 0.11 mm (0.004
inches) thick stencil be used for solder
paste printing. This is to ensure
adequate printed solder paste volume
and no shorting. See the table below
the drawing for combinations of metal
stencil aperture and metal stencil
thickness that should be used.
Aperture opening for shield pad is 2.7
mm x 1.25 mm as per land pattern.
Aperture Size (mm)
Stencil Thickness, t (mm) length, l width, w
0.127 mm 1.75 ± 0.05 0.55 ± 0.05
0.11 mm 2.4 ± 0.05 0.55 ± 0.05
Appendix A: HSDL-3201#021
SMT Assembly Application Note
METAL STENCIL
FOR SOLDER PASTE
PRINTING
LAND
PATTERN
PCB
STENCIL
APERTURE
SOLDER
MASK
APERTURES AS PER
LAND DIMENSIONS
lw
t
Solder Pad, Mask, and Metal Stencil
13
0.2
3.0
8.2
2.6
SOLDER MASK
UNITS: mm
Adjacent Land Keep-Out and
Solder Mask Areas
Adjacent land keep-out is the
maximum space occupied by the unit
relative to the land pattern. There
should be no other SMD components
within this area.
The minimum solder resist strip width
required to avoid solder bridging
adjacent pads is 0.2 mm.
It is recommended that two fiducial
crosses be place at mid-length of the
pads for unit alignment.
Note: Wet/Liquid Photo-Imageable
solder resist/mask is recommended.
14
PCB Layout Suggestion
The following PCB layout shows a
recommended layout that should
result in good electrical and EMI
performance. Things to note:
1. The ground plane should be
continuous under the part, but
should not extend under the
shield trace.
2. The shield trace is a wide, low
inductance trace back to the
system ground.
3. The AGND pin is connected to the
ground plane and not to the shield
tab.
4. C1 is an optional VCC filter
capacitor; it may be left out if the
Vcc is clean.
5. VLED can be connected to either
unfiltered or unregulated power.
If C1 is used, and if VLED is
connected to VCC, the connection
should be before the C1 cap.
Component Side
Circuit Side
VLED
TXD
RXD
SHUTDOWN
V
CC
SHIELD
GROUND
C1
15
Recommended Solder
Paste/Cream Volume for
Castellation Joints
Based on calculation and experi-ment,
the printed solder paste volume
required per castellation pad is 0.22
cubic mm (based on either no-clean
or aqueous solder cream types with
typically 60% to 65% solid content by
volume). Using the recommended
stencil results in this volume of solder
paste.
Pick and Place
Misalignment Tolerance
and Self-Alignment after
Solder Reflow
If the printed solder paste volume is
adequate, the HSDL-3201 will self
align after solder reflow. Units should
be properly reflowed in IR/Hot Air
convection oven using the recom-
mended reflow profile. The direction
of board travel does not matter.
Direction Definition
Tolerance for X-axis Alignment of
Castellation
Misalignment of castellation to the
land pad should not exceed 0.2 mm
or about one half the width of the
castellation during placement of the
unit. The castellations will self-align to
the pads during solder reflow.
Tolerance for Rotational (q)
Misalignment
Mounted units should not be rotated
more than ±3 degrees with reference
to center X-Y as shown in the direction
definition. Units that are rotated more
than ±3 degrees will not self align
after solder reflow. Units with less than
a ±3 degree misalign-ment will self-
align after solder reflow.
Allowable Misalignment
Direction Tolerance
X≤ 0.2 mm
Y See text
q≤ ± 3 degrees
Y
θ
X
MINIMUM 1/2 THE LENGTH
OF THE LAND PAD
EDGE
FIDUCIAL
Y-axis Misalignment of
Castellation
In the Y direction, the HSDL-3201 does
not self align after solder reflow. Avago
recommends that the part be placed
in line with the fiducial mark (mid-
length of land pad.) This will enable
sufficient land length (minimum of
one half of the land pad) to form a
good joint. See the drawing below.
16
Recommended Reflow Profile
Process Zone Symbol DT Maximum DT/Dtime
Heat Up P1, R1 25°C to 160°C4°C/s
Solder Paste Dry P2, R2 160°C to 200°C 0.5°C/s
Solder Reflow P3, R3 200°C to 255°C (260°C at 10 seconds max.) 4°C/s
P3, R4 255°C to 200°C-6°C/s
Cool Down P4, R5 200°C to 25°C-6°C/s
The reflow profile is a straight-line
representation of a nominal tem-
perature profile for a convective
reflow solder process. The tempera-
ture profile is divided into four process
zones, each with different DT/Dtime
temperature change rates. The DT/
Dtime rates are detailed in the above
table. The temperatures are measured
at the component to printed circuit
board connections.
In process zone P1, the PC board and
HSDL-3201 castellation I/O pins are
heated to a temperature of 160°C to
activate the flux in the solder paste.
The temperature ramp up rate, R1, is
limited to 4°C per second to allow for
even heating of both the PC board
and HSDL-3201 castellation I/O pins.
Process zone P2 should be of
sufficient time duration (60 to 120
seconds) to dry the solder paste. The
temperature is raised to a level just
below the liquidus point of the solder,
usually 200°C (392°F).
Process zone P3 is the solder reflow
zone. In zone P3, the temperature is
quickly raised above the liquidus
point of solder to 255°C (491°F) for
optimum results. The dwell time
above the liquidus point of solder
should be between 20 and 60
seconds. It usually takes about 20
seconds to assure proper coalescing
of the solder balls into liquid solder
and the formation of good solder
connections. Beyond a dwell time of
60 seconds, the intermetallic growth
within the solder connections
becomes excessive, resulting in the
formation of weak and unreliable
connections. The temperature is then
rapidly reduced to a point below the
solidus temperature of the solder,
usually 200°C (392°F), to allow the
solder within the connections to
freeze solid.
Process zone P4 is the cool down
after solder freeze. The cool down
rate, R5, from the liquidus point of the
solder to 25°C (77°F) should not
exceed 6°C per second maximum.
This limitation is necessary to allow
the PC board and HSDL-3201
castellation I/O pins to change
dimensions evenly, putting minimal
stresses on the HSDL-3201 transceiver.
0
t-TIME (SECONDS)
T – TEMPERATURE – (°C)
230
200
160
120
80
50 150100 200 250 300
180
220
255
P1
HEAT
UP
P2
SOLDER PASTE DRY P3
SOLDER
REFLOW
P4
COOL
DOWN
25
R1
R2
R3 R4
R5
60 sec.
MAX.
ABOVE
220°C
MAX. 260°C
17
Window Design
To insure IrDA compliance, some
constraints on the height and width
of the window exist. The minimum
dimensions ensure that the IrDA cone
angles are met without vignetting.
The maximum dimensions minimize
the effects of stray light. The minimum
size corresponds to a cone angle of
30 degrees, the maximum, to a cone
angle of 60 degrees.
Minimum and Maximum Window Sizes
Dimensions are in mm.
Depth (Z) Y min. X min. Y max. X max.
0 1.70 6.80 3.66 8.76
1 2.23 7.33 4.82 9.92
2 2.77 7.87 5.97 11.07
3 3.31 8.41 7.12 12.22
4 3.84 8.94 8.28 13.38
5 4.38 9.48 9.43 14.53
6 4.91 10.01 10.59 15.69
7 5.45 10.55 11.74 16.84
8 5.99 11.09 12.90 18.00
9 6.52 11.62 14.05 19.15
10 7.06 12.16 15.21 20.31
Window Height Y vs. Module Depth Z
Window Width X vs. Module Depth Z
;;;;;
;;;;
Y
X
Z
WINDOW HEIGHT Y – mm
16
MODULE DEPTH Z – mm
6
48
0
2
14
010
10
26
12
8
4
ACCEPTABLE
RANGE
60° CONE
30° CONE
WINDOW WIDTH X – mm
22
MODULE DEPTH Z – mm
12
48
6
8
20
010
16
26
18
14
10
ACCEPTABLE
RANGE
60° CONE
30° CONE
X is the width of the window, Y is the
height of the window, and Z is the
distance from the HSDL-3201 to the
back of the window. The distance
from the center of the LED lens to the
center of the photodiode lens is 5.1
mm. The equations for the size of the
window are as follows:
X = 5.1 +2(Z + D) tan q
Y = 2(Z + D) tan q
Where q is the required half
angle for viewing. For the IrDA
minimum, it is 15 degrees, for the IrDA
maximum it is 30 degrees. (D is the
depth of the LED image inside the
part, 3.17 mm). These equations result
in the following tables and graphs:
18
Shape of the Window
From an optics standpoint, the
window should be flat. This ensures
that the window will not alter either
the radiation pattern of the LED, or
the receive pattern of the photodiode.
If the window must be curved for
mechanical design reasons, place a
curve on the back side of the window
that has the same radius as the front
side. While this will not completely
eliminate the lens effect of the front
curved surface, it will reduce the
effects. The amount of change in the
radiation pattern is dependent upon
the material chosen for the window,
the radius of the front and back
curves, and the distance from the
back surface to the transceiver. Once
these items are known, a lens design
can be made which will eliminate the
effect of the front surface curve.
The following drawings show the
effects of a curved window on the
radiation pattern. In all cases, the
center thickness of the window is 1.5
mm, the window is made of
polycarbonate plastic, and the
distance from the transceiver to the
back surface of the window is 3 mm.
Flat Window
(First choice)
Curved Front, Flat Back
(Do not use)
Curved Front and Back
(Second choice)
19
Test Methods
Background Light and
Electromagnetic Field
There are four ambient interference
conditions in which the receiver is to
operate correctly. The conditions are
to be applied separately:
1. Electromagnetic field:
3 V/m maximum (please refer to
IEC 801-3, severity level 3 for
details).
2. Sunlight:
10 kilolux maximum at the optical
port. This is simulated with an IR
source having a peak wavelength
within the range of 850 nm to 900
nm and a spectral width of less
than 50 nm biased to provide 490
µW/cm2 (with no modulation) at
the optical port. The light source
faces the optical port.
This simulates sunlight within the
IrDA spectral range. The effect of
longer wavelength radiation is
covered by the incandescent
condition.
3. Incandescent Lighting: 1000 lux
maximum. This is produced with
general service, tungsten-filament,
gas-filled, inside frosted lamps in
the 60 Watt to 100 Watt range to
generate 1000 lux over the
horizontal surface on which the
equip-ment under test rests. The
light sources are above the test
area. The source is expected to
have a filament temperature in the
2700 to 3050 Kelvin range and a
spectral peak in the 850 to 1050
nm range.
4. Fluorescent Lighting:
1000 lux maximum. This is
simulated with an IR source having
a peak wavelength within the
range of 850 nm to 900 nm and a
spectral width of less than 50 nm
biased and modulated to provide
an optical square wave signal
(0 µW/cm2 minimum and
0.3 µW/cm2 peak amplitude with
10% to 90% rise and fall times less
than or equal to 100 ns) over the
horizontal surface on which the
equipment under test rests. The
light sources are above the test
area. The frequency of the optical
signal is swept over the frequency
range from 20 kHz to 200 kHz.
Due to the variety of fluorescent
lamps and the range of IR
emissions, this condition is not
expected to cover all circum-
stances. It will provide a common
floor for IrDA operation.
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http://optodatabook.liteon.com/databook/databook.aspx
Data subject to change. Copyright © 2007 Lite-On Technology Corporation. All rights reserved.